CN102593139A - CMOS (Complementary Metal-Oxide-Semiconductor Transistor) image sensor - Google Patents
CMOS (Complementary Metal-Oxide-Semiconductor Transistor) image sensor Download PDFInfo
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- CN102593139A CN102593139A CN2012100493419A CN201210049341A CN102593139A CN 102593139 A CN102593139 A CN 102593139A CN 2012100493419 A CN2012100493419 A CN 2012100493419A CN 201210049341 A CN201210049341 A CN 201210049341A CN 102593139 A CN102593139 A CN 102593139A
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Abstract
The invention relates to a CMOS (complementary metal-oxide-semiconductor transistor) image sensor, comprising a substrate, a photodiode, a transmission transistor, a reset transistor, a floating diffusion region and an MOS (metal oxide semiconductor) capacitor, wherein the photodiode, the transmission transistor and the reset transistor are located on the substrate; the floating diffusion region is arranged in the substrate and between the transmission transistor and the reset transistor and is provided with a junction capacitor; and the MOS capacitor is connected with the junction capacitor of the floating diffusion region in parallel and comprises a grid electrode, a dielectric layer and a doping region, the grid electrode is located on the substrate, the dielectric layer is located between the grid electrode and the substrate, and the doping region is located in the substrate. With the adoption of the technical scheme, the image sensor has wider dynamic ranges.
Description
Technical field
The present invention relates to technical field of semiconductors, relate in particular to cmos image sensor.
Background technology
Imageing sensor belongs to the photoelectric cell class in the opto-electronics; Along with developing rapidly of digital technology, semiconductor fabrication and network; Existing market and industry all are faced with the arrival in the video signal of crossing over each platform, audio-visual, big integration epoch of communication, and cropping the beautiful scenery of following human daily life.With its application in daily life, to belong to the digital camera product undoubtedly, its development speed can be used to make rapid progress and describe.Short several years, digital camera developed into 400,5,000,000 pixels even higher just by the hundreds of thousands pixel.Its key components and parts-image sensor products becomes the object that current and following industry is paid close attention to, and is attracting numerous manufacturers to drop into.Distinguish with product category; Image sensor products mainly is divided into charge-coupled image sensor (Charge-coupled Device image sensor; The abbreviation ccd image sensor), complementary metal oxide imageing sensor (Complementary Metal Oxide Semiconductor image sensor is called for short cmos sensor).
Fig. 1 is the electrical block diagram of the cmos image sensor of existing 4T structure; Fig. 2 is the schematic layout pattern of the cmos image sensor of prior art shown in Figure 1; In conjunction with reference to figure 1 and Fig. 2, the cmos image sensor of existing 4T structure comprises: transistor M3, row gate transistor M4 are followed in the transmission transistor M1, reset transistor M2, the source that are positioned at substrate 70.The operation principle of 4T structural images transducer is: transmission transistor M1 is used for the light induced electron of light sensitive diode PD is transferred to floating diffusion region FD; Reset transistor M2 is used for floating diffusion region FD is resetted, and the source is followed transistor M3 and is used for the signal of telecommunication of floating diffusion region FD is amplified output.Its course of work is: reset transistor M2 opens, and FD is changed to high potential with floating diffusion region; Turn-off reset transistor M2 then; Open transmission transistor M1; Light induced electron in the light sensitive diode 20 is transferred to floating diffusion region FD; Floating diffusion region FD produces pressure drop, and this pressure drop is followed the be expert at output out of gate transistor M4 of transistor M3 through the source and read, and this pressure drop of reading is the output signal.
When needs are used high dynamic imageing sensor; The image sensor dynamic range of prior art is little; Under the more weak situation of the stronger situation of illumination and illumination; The sensitivity meeting of imageing sensor has greatly changed, and causes under the different light situation, and the picture signal of imageing sensor output is inaccurate.
In the prior art, many patent and patent applications about cmos image sensor are arranged, a kind of manufacture method of effective high-dynamics image transducer all is not provided.The one Chinese patent application file that for example July 4, disclosed publication number was CN1992305A in 2007, yet all less than solving above technical problem.
Summary of the invention
The problem that the present invention solves is that the cmos image sensor dynamic range of prior art is little when needs are used high dynamic imageing sensor.
For addressing the above problem, the present invention provides a kind of cmos image sensor, comprising:
Substrate;
Be positioned at light sensitive diode, transmission transistor and the reset transistor of said substrate;
Floating diffusion region, in said substrate, between said transmission transistor and the said reset transistor, said floating diffusion region has junction capacitance;
The mos capacitance parallelly connected with the junction capacitance of said floating diffusion region, said mos capacitance comprises: the grid on the said substrate, between said grid and said substrate dielectric layer, be arranged in the doped region of said substrate.
Optional, said mos capacitance is positioned at the both sides or a side of said floating diffusion region, and is positioned at the not homonymy of said floating diffusion region with said transmission transistor, reset transistor.
Optional, said substrate comprises substrate and is positioned at said suprabasil doped layer.
Optional, said doped layer is well region or epitaxial loayer.
Optional, said doped region is the part of said doped layer or is the P type doped region that is positioned at said doped layer.
Optional, said floating diffusion region comprises first doped region, is positioned at the said doped layer of part of said first doped region below, and the doping type of said doped layer and said first doped region is opposite.
Optional, said first doped region is the N+ doped region.
Optional, said light sensitive diode comprises:
Be arranged in second doped region of said doped layer;
Be positioned at the said doped layer of part of said second doped region below, the doping type of said second doped region and doped layer is opposite.
Optional, also comprise be arranged on said second doped region, the 3rd doped region of said doped layer, said doped layer is identical with the doping type of the 3rd doped region.
Optional; Said transmission transistor comprises: be positioned at grid and gate dielectric layer on the said substrate; Said gate dielectric layer is between said grid and said substrate, and said first doped region, second doped region lay respectively at the both sides of said grid, as source electrode, the drain electrode of said transmission transistor.
Optional; Said reset transistor comprises: be positioned at grid and gate dielectric layer on the said substrate; Said gate dielectric layer is positioned at source electrode, the drain electrode of said grid both sides between said grid and said substrate, said first doped region is as the source electrode of said transmission transistor.
Optional, also comprise: the source that is positioned at said substrate is followed transistor and is selected transistor.
Compared with prior art, the present invention has the following advantages:
The cmos image sensor of the specific embodiment of the invention, to the floating diffusion region paralleling MOS capacitor, said mos capacitance comprises: the grid on the said substrate, between said grid and said substrate dielectric layer, be arranged in the doped region of said substrate.A little less than illumination, the light induced electron Q that light sensitive diode produces more after a little while, the parallelly connected total capacitance C of the junction capacitance of floating diffusion region and mos capacitance
FdLess; Stronger in illumination, the light induced electron Q that light sensitive diode produces more for a long time, the parallelly connected total capacitance C of the junction capacitance of floating diffusion region and mos capacitance
FdBigger.By Δ V=Q/C
FdCan know, under the different light situation, can guarantee that the pressure drop Δ V of floating diffusion region changes in scope of design, the too small output signal that makes of Δ V can not occur can't survey, and perhaps Δ V crosses ambassador and exports signal and occur saturated and distortion.Therefore, with the variation of intensity of illumination, the output signal of imageing sensor has wider linear zone, thereby imageing sensor has bigger dynamic range.
Description of drawings
Fig. 1 is the electrical block diagram of the cmos image sensor of existing 4T structure;
Fig. 2 is the schematic layout pattern of the cmos image sensor of prior art shown in Figure 1;
Fig. 3 is the schematic layout pattern of the cmos image sensor of the specific embodiment of the invention;
Fig. 4 is a cmos image sensor shown in Figure 3 cross-sectional view along the A-A direction;
Fig. 5 is the cross-sectional view of the cmos image sensor of the specific embodiment of the invention along the B-B direction;
Fig. 6 is the simulation sketch map of relation of cmos image sensor intensity of illumination and output voltage of cmos image sensor and the prior art of the specific embodiment of the invention;
Fig. 7 is the simulation sketch map of relation of cmos image sensor intensity of illumination and the output voltage of the specific embodiment of the invention.
Embodiment
Fig. 2 is the schematic layout pattern of the cmos image sensor of prior art shown in Figure 1; In conjunction with reference to figure 1 and Fig. 2; Substrate 70 comprises substrate 71 and is positioned at the epitaxial loayer 72 in the substrate 71; Floating diffusion region FD comprises doped region 73, is positioned at the part doped layer 72 under the doped region 73, and the operation principle of floating diffusion region FD is: doped region 73 has formed electric capacity with part doped layer 72 under it, when the light induced electron in the light sensitive diode when transmission transistor transfers to floating diffusion region; Can produce pressure drop at floating diffusion region, the size of this pressure drop is the electric capacity of light induced electron divided by floating diffusion region.The inventor finds; In the prior art; The electric capacity of floating diffusion region is junction capacitance, and the quantity of the light induced electron that light sensitive diode produces has bigger variation under the more weak situation of the stronger situation of illumination and illumination, like this pressure drop Δ V (the Δ V=Q/c of floating diffusion region; Q is the light induced electron that light sensitive diode produces; C is the electric capacity of floating diffusion region) under the more weak situation of the stronger situation of illumination and illumination, have bigger variation, occurring the too small output signal that makes of Δ V easily can't survey, and perhaps Δ V crosses ambassador and exports signal and saturated phenomenon occurs.Thereby caused cmos image sensor output signal inaccurate.
Based on above discovery, the present invention is to the junction capacitance paralleling MOS capacitor of floating diffusion region, the light induced electron Q that light sensitive diode produces more after a little while, the parallelly connected total capacitance C of floating diffusion region and mos capacitance
FdLess; Stronger in illumination, the light induced electron Q that light sensitive diode produces more for a long time, the parallelly connected total capacitance C of floating diffusion region and mos capacitance
FdBigger.By Δ V=Q/C
FdCan know, under the different light situation, can guarantee that the pressure drop Δ V of floating diffusion region changes in scope of design.The too small output signal that makes of Δ V can not occur can't survey, and perhaps Δ V crosses ambassador and exports signal and occur saturated and distortion.Therefore, with the variation of intensity of illumination, the output signal of imageing sensor has wider linear zone, thereby has bigger dynamic range.
For make above-mentioned purpose of the present invention, feature and advantage can be more obviously understandable, does detailed explanation below in conjunction with the accompanying drawing specific embodiments of the invention.
Set forth detail in the following description so that make much of the present invention.But the present invention can be different from alternate manner described here and implements with multiple, and those skilled in the art can do similar popularization under the situation of intension of the present invention.Therefore the present invention does not receive the restriction of following disclosed embodiment.
Fig. 3 is the schematic layout pattern of the cmos image sensor of the specific embodiment of the invention; Fig. 4 is a cmos image sensor shown in Figure 3 cross-sectional view along the A-A direction; Fig. 5 is a cmos image sensor shown in Figure 3 cross-sectional view along the B-B direction; In conjunction with reference to figure 3, Fig. 4 and Fig. 5, the cmos image sensor of the specific embodiment of the invention comprises:
In the specific embodiment of the invention, substrate 10 comprises substrate 11, is positioned at the doped layer 12 of substrate 11, and this doped layer 12 is well region or epitaxial loayer.Floating diffusion region FD comprises at first doped region 31 between transmission transistor M1 and the reset transistor M2, is positioned at the part doped layer 12 below first doped region 31.Floating diffusion region FD is a rectangular region; Certainly; Rectangular region described herein is not strict rectangular region, doped layer 12 is being carried out ion doping when forming first doped region 31, and the shape of first doped region 31 might not be strict rectangular region; Ion can spread, so floating diffusion region FD also can be the rectangle like zone.Accordingly; Floating diffusion region FD has four sides, and wherein, transmission transistor M1 and reset transistor M2 are positioned at the two opposite sides of floating diffusion region; And light sensitive diode and transmission transistor M1 are positioned at the same side; Mos capacitance 20 is positioned at other both sides or the side of floating diffusion region FD, that is to say that mos capacitance 20 is positioned at both sides or the side of said floating diffusion region FD, and is positioned at the not homonymy of said floating diffusion region FD with said transmission transistor M1, reset transistor M2.Among the embodiment in Fig. 3, mos capacitance 20 is positioned at the both sides of floating diffusion region FD, and among the present invention, mos capacitance 20 can be positioned at the both sides of floating diffusion region FD, also can be positioned at the side of floating diffusion region FD, can confirm according to the actual requirements.
In the specific embodiment of the invention, the material of substrate 10 is monocrystalline silicon, monocrystalline germanium or monocrystalline germanium silicon, III-V group element compound, monocrystalline silicon carbide; The material of second Semiconductor substrate 73 is monocrystalline silicon, monocrystalline germanium or monocrystalline germanium silicon, III-V group element compound, monocrystalline silicon carbide.。
With reference to figure 4; In the specific embodiment of the invention; Mos capacitance 20 comprises: the grid 23 on the said substrate 10, between said grid 23 and said substrate 10 dielectric layer 22, be arranged in the doped region 21 of said substrate 10, concrete doped region 21 is arranged in doped layer 12.Wherein, the material of grid 23 is metal or polysilicon, and dielectric layer is silicon oxide layer or silicon nitride layer, but is not limited to silicon oxide layer or silicon nitride layer.
In the specific embodiment of the invention; The doping type of first doped region 21, doped region 31 and doped layer 12 is opposite; Wherein doped layer 12 is the P trap, and doped region 31 is the N+ doped region, and first doped region 21 is for the part of doped layer 12 or for being positioned at the P type well region of doped layer 12.
In conjunction with reference to figure 3 and Fig. 5, said light sensitive diode PD comprises: the doping type of second doped region 41, part doped layer 12, the second doped regions 41 that are positioned at said second doped region 41 belows and doped layer 12 is opposite, and both constitute PN junction and form light sensitive diode.In the specific embodiment of the invention; On second doped region 41, has the 3rd doped region 42; The doping type of said doped layer 12, the 3rd doped region 42 is identical, and the 3rd doped region 42 buries light sensitive diode PD in substrate 10, the just so-called type light sensitive diode that buries.But among the present invention, light sensitive diode is not limited to bury the type light sensitive diode, also can not have the 3rd doped region 42.
In conjunction with reference to figure 3 and Fig. 5; In the specific embodiment of the invention; Transmission transistor M2 comprises: be positioned at grid 51 and gate dielectric layer 52 on the said substrate 10; Said gate dielectric layer 52 is between said grid 51 and said substrate 10, and said first doped region 31, second doped region 41 lay respectively at the both sides of said grid 51, as source electrode, the drain electrode of said transmission transistor M1.
In conjunction with reference to figure 3 and Fig. 5; In the specific embodiment of the invention; Said reset transistor M2 comprises: be positioned at grid 61 and gate dielectric layer 62 on the said substrate 10; Said gate dielectric layer 62 is arranged in source electrode, the drain electrode 63 of said grid 61 both sides, substrate 10 between said grid 61 and said substrate 10, first doped region 31 of said floating diffusion region is as the source electrode of reset transistor M2.
In conjunction with reference to figure 3 and Fig. 5, in the specific embodiment of the invention, also comprise: the source that is positioned at said substrate 10 is followed transistor M3 and is selected transistor M4.The source is followed transistor M3 and is selected transistor M4 to include grid and gate dielectric layer, and gate dielectric layer is arranged in grid both sides, the source electrode of substrate 10, drain electrode between grid and substrate 10.
Fig. 6 is the total capacitance C of floating diffusion region
FdVoltage V with floating diffusion region
FdSimulation curve figure, abscissa is represented the voltage V of floating diffusion region
Fd, ordinate is represented the total capacitance C of floating diffusion region
Fd, the floating diffusion region initial voltage is resetting voltage Vrst, after electronics imported floating diffusion region into from light sensitive diode, floating diffusion region voltage was reduced by high potential Vrst gradually.Curve A is represented the total capacitance of floating diffusion region in the prior art and the simulation curve figure of voltage; Curve B is represented the total capacitance of floating diffusion region in the specific embodiment of the invention and the simulation curve figure of voltage; Can know from curve A: the prior art, the total capacitance C of floating diffusion region
FdVoltage V with floating diffusion region
FdBe the gradual change relation; Can know from curve B: the present invention, there is a critical value C in the voltage of floating diffusion region, the voltage V of floating diffusion region
FdScope is between resetting voltage Vrst and critical value C the time, voltage V
FdAnd capacitor C
FdBe the gradual change relation, as voltage V
FdDuring less than critical value C, capacitor C
FdUndergo mutation, increase suddenly, that is to say, among the present invention, when intensity of illumination by little when increasing gradually, voltage V
FdAnd capacitor C
FdOriginally be gradual change relation, in intensity of illumination during greater than a certain critical value, capacitor C
FdUndergo mutation, increase suddenly.
Can find based on above analysis; The operation principle and the prior art of the cmos image sensor of the specific embodiment of the invention are basic identical; Increased the mos capacitance parallelly connected on the basis of existing technology with the junction capacitance of floating diffusion region; The light induced electron Q that light sensitive diode produces more after a little while, the parallelly connected total capacitance C of the junction capacitance of floating diffusion region and mos capacitance
FdLess; Stronger in illumination, the light induced electron Q that light sensitive diode produces more for a long time, the parallelly connected total capacitance C of the junction capacitance of floating diffusion region and mos capacitance
FdBigger.By Δ V=Q/C
FdCan know, under the different light situation, can guarantee that the pressure drop Δ V of floating diffusion region changes in scope of design, the too small output signal that makes of Δ V can not occur can't survey, and perhaps Δ V crosses ambassador and exports signal and occur saturated and distortion.Therefore, with the variation of intensity of illumination, the output signal of imageing sensor has wider linear zone, thereby has bigger dynamic range.
Fig. 7 is the simulation sketch map of the relation of cmos image sensor intensity of illumination and output voltage, and among Fig. 7, abscissa is represented intensity of illumination, and ordinate is represented output voltage V out.Curve D is represented the cmos image sensor intensity of illumination of the specific embodiment of the invention and the relation curve of output voltage, and curve C is represented the cmos image sensor intensity of illumination of prior art and the relation of output voltage.The output voltage of curve C is saturated when intensity of illumination a1, and the output voltage of curve D just begins to occur saturated phenomenon when intensity of illumination a2.The linear district of the output voltage of curve D scope is bigger, so imageing sensor has bigger dynamic range.
The specific embodiment of the invention is that example describes with the cmos image sensor of 4T structure; But among the present invention; Cmos image sensor is not limited to the cmos image sensor of 4T structure; Also can other comprise the cmos image sensor of floating diffusion region, light sensitive diode, transmission transistor and reset transistor for cmos image sensor of 3T structure etc., can the invention essence to the floating diffusion region shunt capacitance be applied to these cmos image sensors and have bigger dynamic range.
Though the present invention with preferred embodiment openly as above; But it is not to be used for limiting the present invention; Any those skilled in the art are not breaking away from the spirit and scope of the present invention; Can utilize the method and the technology contents of above-mentioned announcement that technical scheme of the present invention is made possible change and modification, therefore, every content that does not break away from technical scheme of the present invention; To any simple modification, equivalent variations and modification that above embodiment did, all belong to the protection range of technical scheme of the present invention according to technical spirit of the present invention.
Claims (12)
1. a cmos image sensor is characterized in that, comprising:
Substrate;
Be positioned at light sensitive diode, transmission transistor and the reset transistor of said substrate;
Floating diffusion region, in said substrate, between said transmission transistor and the said reset transistor, said floating diffusion region has junction capacitance;
The mos capacitance parallelly connected with the junction capacitance of said floating diffusion region, said mos capacitance comprises: the grid on the said substrate, between said grid and said substrate dielectric layer, be arranged in the doped region of said substrate.
2. cmos image sensor as claimed in claim 1 is characterized in that, said mos capacitance is positioned at the both sides or a side of said floating diffusion region, and is positioned at the not homonymy of said floating diffusion region with said transmission transistor, reset transistor.
3. cmos image sensor as claimed in claim 1 is characterized in that, said substrate comprises substrate and is positioned at said suprabasil doped layer.
4. cmos image sensor as claimed in claim 1 is characterized in that, said doped layer is well region or epitaxial loayer.
5. cmos image sensor as claimed in claim 3 is characterized in that, said doped region is the part of said doped layer or is the P type doped region that is positioned at said doped layer.
6. cmos image sensor as claimed in claim 3 is characterized in that, said floating diffusion region comprises first doped region, is positioned at the said doped layer of part of said first doped region below, and the doping type of said doped layer and said first doped region is opposite.
7. cmos image sensor as claimed in claim 6 is characterized in that, said first doped region is the N+ doped region.
8. cmos image sensor as claimed in claim 6 is characterized in that, said light sensitive diode comprises:
Be arranged in second doped region of said doped layer;
Be positioned at the said doped layer of part of said second doped region below, the doping type of said second doped region and doped layer is opposite.
9. cmos image sensor as claimed in claim 8 is characterized in that, also comprise be arranged on said second doped region, the 3rd doped region of said doped layer, said doped layer is identical with the doping type of the 3rd doped region.
10. cmos image sensor as claimed in claim 8; It is characterized in that; Said transmission transistor comprises: be positioned at grid and gate dielectric layer on the said substrate; Said gate dielectric layer is between said grid and said substrate, and said first doped region, second doped region lay respectively at the both sides of said grid, as source electrode, the drain electrode of said transmission transistor.
11. cmos image sensor as claimed in claim 8; It is characterized in that; Said reset transistor comprises: be positioned at grid and gate dielectric layer on the said substrate; Said gate dielectric layer is positioned at source electrode, the drain electrode of said grid both sides between said grid and said substrate, said first doped region is as the source electrode of said transmission transistor.
12. cmos image sensor as claimed in claim 1 is characterized in that, also comprises: the source that is positioned at said substrate is followed transistor and is selected transistor.
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| CN108417593A (en) * | 2018-02-27 | 2018-08-17 | 上海集成电路研发中心有限公司 | Imaging sensor, dot structure and its control method |
| CN110459549A (en) * | 2018-05-07 | 2019-11-15 | 豪威科技股份有限公司 | The floating diffusion portion of imaging sensor with low current leakage |
| CN113725238A (en) * | 2020-05-25 | 2021-11-30 | 爱思开海力士有限公司 | Image sensing device |
| CN114641981A (en) * | 2020-12-15 | 2022-06-17 | 深圳市大疆创新科技有限公司 | Image sensor, image processor, imaging apparatus, and method of controlling image sensor |
| WO2022227862A1 (en) * | 2021-04-30 | 2022-11-03 | 宁波飞芯电子科技有限公司 | Pixel unit, image sensor, and detecting device |
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| CN108417593A (en) * | 2018-02-27 | 2018-08-17 | 上海集成电路研发中心有限公司 | Imaging sensor, dot structure and its control method |
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