CN109256957B

CN109256957B - Three-phase AC voltage stabilizer for rail transit

Info

Publication number: CN109256957B
Application number: CN201811355991.XA
Authority: CN
Inventors: 凌云; 张海军; 谭华容; 刘飞; 宋建波; 陈刚
Original assignee: Zhuzhou Zhonggui Track Equipment Co ltd; Hunan University of Technology
Current assignee: Zhuzhou Zhonggui Track Equipment Co ltd; Hunan University of Technology
Priority date: 2018-11-15
Filing date: 2018-11-15
Publication date: 2021-04-23
Anticipated expiration: 2038-11-15
Also published as: CN109256957A

Abstract

A rail transit three-phase alternating current voltage stabilizer comprises a self-coupling compensation type three-phase main circuit unit, a compensation control unit, a trigger unit and a protection driving unit; the compensation control unit consists of three compensation control circuits including a sampling comparison circuit, a delay protection circuit, a trigger gating control circuit and an error detection judging circuit, and is used for respectively sampling voltages of three-phase alternating current power supplies and outputting corresponding three-phase trigger control signals, three-phase non-trigger area control signals and three-phase trigger gating control value judging signals; the protection driving unit judges whether the signal is effective or not according to the input three-phase trigger gating control value to break the input side power supply voltage of the three-phase autotransformer, so that the three-phase thyristor switch group is protected. The voltage stabilizer realizes interlocking control, and simultaneously protects the thyristor switch group by judging whether a logic error occurs in the control circuit, thereby effectively strengthening the protection force aiming at the abnormity of the working process of the voltage stabilizer and ensuring more stable and reliable work.

Description

Three-phase AC voltage stabilizer for rail transit

Technical Field

The invention relates to the technical field of power supplies, in particular to a three-phase alternating current voltage stabilizer for rail transit.

Background

The existing compensation type single-phase and three-phase AC voltage stabilizer has the advantages of wide voltage stabilizing range, almost no distortion of waveform, high efficiency of the whole machine and strong load adaptability. The principle is that switching of different winding coils of a primary winding on a compensation transformer is automatically controlled according to the high-low condition of input voltage, bidirectional multi-gear voltage compensation is provided by utilizing the transformation ratio relation of a primary side working winding and a secondary winding or by adjusting the voltage applied to the primary winding, and therefore the purpose of voltage regulation and stabilization is achieved.

The alternating current power supply for supplying power to rail traffic occasions or equipment such as a subway control center, railway signal indication and the like is reliable, stable and safe. The existing compensation type alternating current voltage stabilizer adopts a motor to control the movement of a carbon brush so as to change that the carbon brush is easy to wear and often has faults when different voltages are applied to an excitation coil of a compensation transformer; switching different winding coils of a primary winding on a compensation transformer by adopting an electronic switch switching mode, or when voltage applied to the primary winding is adjusted, the delayed turn-off of the electronic switch is easy to cause a power supply short-circuit fault; when the electronic switch is controlled to be switched by adopting a program mode of a singlechip, a PLC and the like, the problems of program runaway, dead halt and the like can also cause the failure of the voltage stabilizer or cause the short-circuit fault of a power supply due to the error of control logic.

Disclosure of Invention

In order to solve the problems of the conventional alternating current voltage stabilizer for rail transit, the invention provides a three-phase alternating current voltage stabilizer for rail transit, which comprises a self-coupling compensation type three-phase main circuit unit, a compensation control unit, a trigger unit and a protection driving unit. Each phase main circuit of the self-coupling compensation type three-phase main circuit unit comprises a compensation transformer, a self-coupling transformer, a thyristor switch group and a relay protection circuit; the compensation control unit outputs a three-phase trigger control signal to the trigger unit; the trigger unit sends a three-phase trigger signal to the self-coupling compensation type three-phase main circuit unit according to an input three-phase trigger control signal to control the on-off of the thyristors in the three-phase thyristor switch group; the compensation control unit simultaneously outputs a three-phase non-triggering area control signal and a three-phase triggering gating control value judging signal to the protection driving unit, the protection driving unit starts/stops protection of the three-phase thyristor switch group according to whether the input three-phase triggering gating control value judging signal is effective or not, and simultaneously controls a power supply of the triggering unit according to whether the three-phase triggering gating control value judging signal is effective or not and whether the three-phase non-triggering area control signal is effective or not.

The compensation control unit consists of three compensation control circuits with the same structure; the three compensation control circuits respectively carry out voltage sampling on the voltage of the three-phase alternating current power supply and output a three-phase trigger control signal, a three-phase non-trigger area control signal and a three-phase trigger gating control value judgment signal.

The compensation control circuit of each phase comprises a sampling comparison circuit, a delay protection circuit, a trigger gating control circuit and an error detection judging circuit, wherein the delay protection circuit of each phase has the same function and structure, the sampling comparison circuit of each phase has the same function and structure, the trigger gating control circuit of each phase has the same function and structure, and the error detection judging circuit of each phase has the same function and structure. In each phase compensation control circuit, a sampling comparison circuit samples the voltage of the alternating current power supply phase voltage and outputs a trigger gating control value; the delay protection circuit inputs a trigger gating control value and outputs a delayed trigger gating control value and a non-trigger area control signal; the trigger gating control circuit inputs the delayed trigger gating control value and outputs a trigger control signal; the error detection judging circuit inputs the delayed trigger gating control value, judges whether the delayed trigger gating control value is effective or not, and outputs a trigger gating control value judging signal.

The trigger gating control value of each phase is an M-bit binary value; in each phase of compensation control circuit, the basis of judging whether the input trigger gating control value is effective or not by the error detection judging circuit is that the trigger gating control value is effective when only one bit is effective in M-bit binary values of the trigger gating control value; otherwise, the trigger gating control value is invalid. The bit in the trigger gating control value is 1 valid and 0 invalid, namely the high level in the trigger gating control value signal is valid and the low level is invalid; or, the bit in the trigger gating control value is 0 valid and 1 invalid, that is, the low level in the trigger gating control value signal is valid and the high level is invalid; a total of M trigger strobe control values are valid. And M is an integer greater than or equal to 2.

The voltage of the alternating current power supply phase voltage fluctuation interval range of each phase is divided into M voltage grade intervals, and the M voltage grade intervals correspond to M effective trigger gating control values one by one. In each phase, the sampling comparison circuit comprises an alternating current power supply phase voltage sampling circuit and a multi-interval voltage comparator circuit, and the alternating current power supply phase voltage sampling circuit converts an alternating current power supply phase voltage effective value into an alternating current power supply phase voltage sampling value; the input voltage of the multi-interval voltage comparator circuit is an alternating current power supply voltage sampling value, the alternating current power supply voltage sampling value is compared with M-1 threshold voltages to obtain an M-bit comparison output value, and the M-bit comparison output value forms a trigger gating control value.

In each phase, the multi-interval voltage comparator circuit comprises M-1 comparators, compares input voltage with M-1 different threshold voltages and outputs M-bit comparison output values; and the M-1 comparators are all powered by a positive single power supply. M-1 different threshold voltages are respectively connected to the inverting input ends of the M-1 comparators, and the input voltage is simultaneously connected to the non-inverting input ends of the M-1 comparators. The high level of the M-bit comparison output value output by the multi-interval voltage comparator is effective, and only one of the M-bit comparison output value is effective. Among the M-1 comparators, the comparator with the highest threshold voltage directly adopts a positive single power supply to supply power, and other comparators adopt controllable power supplies to supply power; when the comparator is powered by the controllable power supply, the controllable power supply supplies power to the positive power supply end of the comparator only when all the comparators with the threshold voltages higher than the threshold voltages output low levels, otherwise, the controllable power supply stops supplying power to the positive power supply end of the comparator. The comparator adopts a controllable power supply to supply power, and outputs low level when the controllable power supply stops supplying power to the positive power supply end. The M-bit comparison output value consists of output values of M-1 comparators and a minimum interval judgment value; and when all the output values of the M-1 comparators are at low level, the lowest interval judgment value is at high level, otherwise, the lowest interval judgment value is at low level. The M-1 different threshold voltages are respectively M-1 intermediate separation voltage values of the M interval voltages.

In each phase, the multi-interval voltage comparator circuit comprises M comparators for comparing the input voltage with M different threshold voltages and outputting M comparison output values; the M comparators are all powered by a positive single power supply. The M different threshold voltages are respectively connected to the inverting input ends of the M comparators, and the input voltage is simultaneously connected to the non-inverting input ends of the M comparators. The high level of the M-bit comparison output value output by the multi-interval voltage comparator is effective, and only one of the M-bit comparison output value is effective. Among the M comparators, the comparator with the highest threshold voltage directly adopts a positive single power supply to supply power, and other comparators adopt controllable power supplies to supply power; when the comparator is powered by the controllable power supply, the controllable power supply supplies power to the positive power supply end of the comparator only when all the comparators with the threshold voltages higher than the threshold voltages output low levels, otherwise, the controllable power supply stops supplying power to the positive power supply end of the comparator. The comparator adopts a controllable power supply to supply power, and outputs low level when the controllable power supply stops supplying power to the positive power supply end. The M-bit comparison output value consists of the output values of the M comparators. The M different threshold voltages are respectively the interval voltage lowest values of the M interval voltages.

In each phase, when the comparator is powered by a controllable power supply, the output end of the comparator is connected with a pull-down resistor, the controllable power supply supplies power to the positive power supply end of the comparator only when all the comparators with the threshold voltages higher than the threshold voltages output low levels, and otherwise, the controllable power supply stops supplying power to the positive power supply end of the comparator. The positive power supply end of the comparator is connected to the output end of the NOR gate, and the input end of the NOR gate is respectively connected to the output ends of the comparators with the threshold voltages higher than that of the NOR gate.

The comparators in the multi-interval voltage comparator circuit preferably adopt a low-power-consumption rail-to-rail operational amplifier powered by a single power supply.

The voltage grade interval of each phase corresponds to the voltage compensation state one by one. In each phase, different voltage compensation states are controlled by different on-off combination states of the thyristors in the thyristor switch group of the phase, and the trigger gating control value controls the on-off combination states of the thyristors in the thyristor switch group; and controlling the on-off combined state of the thyristors in the thyristor switch group to select 0 or 1 or superposition of a plurality of output voltages of the phase autotransformer as the excitation coil voltage of the phase compensation transformer, thereby realizing the voltage compensation state corresponding to the voltage grade interval. In each phase, the trigger gating control circuit comprises a diode trigger gating matrix; the trigger gating control circuit is used for selecting and enabling the corresponding trigger control signal to be effective through the diode trigger gating matrix according to the effective trigger gating control value, and controlling the on-off combination state of the thyristors in the thyristor switch group of the phase.

The thyristor switch group of each phase has N thyristors in total. In each phase, the diode triggering gating matrix comprises M triggering gating control column lines, N triggering driving row lines and a plurality of diodes; m triggering gating control column lines correspond to M bit triggering gating control values one by one, and an effective triggering gating control value correspondingly enables a signal of one triggering gating control column line to be effective; the N trigger driving row lines correspond to the N thyristors one by one, and the effective correspondence of a trigger driving row line signal enables a trigger control signal of one thyristor to be effective; triggering the control signal to effectively enable the corresponding thyristor to be conducted; when each trigger gating control column line signal is effective, the on-off combination state of the thyristor in the corresponding thyristor switch group is controlled; when each trigger gating control column line is effective, a diode is arranged between the trigger driving row lines which are in a corresponding on-off combination state and need to control the conduction of the thyristor for connection, and when a certain trigger gating control column line is effective, the diode enables the trigger driving row line signals which need to control the conduction of the thyristor to be effective; and N is an integer greater than or equal to 4.

In each phase, one trigger driving row line signal is effective and corresponds to a trigger control signal of one thyristor, and the method is that N trigger driving row line signals are directly used as the trigger control signals of N thyristors in a one-to-one correspondence manner; a trigger driving row line signal is effective and corresponds to a method for enabling a trigger control signal of a thyristor to be effective, or the trigger gating control circuit also comprises a trigger control signal driving circuit; the input of the trigger control signal driving circuit is N signals for triggering and driving the row lines, and the output is trigger control signals of N thyristors in one-to-one correspondence.

In each phase, the voltage fluctuation of the alternating current power supply phase changes a trigger gating control value, so that when the on-off combination state of the thyristors in the thyristor switch group needs to be changed, one non-trigger area time is maintained between 2 different on-off combination states of the thyristors in the thyristor switch group, and all the thyristors in the thyristor switch group are turned off; maintaining a no-trigger zone time is accomplished by a no-trigger zone control signal. In each phase, controlling a control signal of the non-trigger area to output a single pulse after a trigger gating control value is changed; the no-trigger area control signal is active during the output of a single pulse and inactive during the non-output of a single pulse. Further, after the trigger gating control value is changed, the width time of a single pulse in the non-trigger area control signal is selected from 10ms to 30 ms.

In each phase, in the delay protection circuit, the change time of the delayed trigger gating control value signal is later than the leading edge time of a single pulse in the non-trigger area control signal after the trigger gating control value is changed and is earlier than the trailing edge time of the single pulse in the non-trigger area control signal after the trigger gating control value is changed.

The specific method for starting/stopping the protection of the three-phase thyristor switch group by the protection driving unit according to the fact that whether the input three-phase trigger gating control value judging signal is effective or not is that when one or more than one of the three-phase trigger gating control value judging signals are ineffective, the input side power supply voltage of all autotransformers in three phases is controlled to be cut off to enable the three-phase thyristor switch group to be in a protection state. When the three-phase thyristor switch group is in a protection state and the three-phase trigger gating control value judging signals are all recovered to be effective, the protection driving unit automatically stops the protection state of the three-phase thyristor switch group.

The specific method for controlling the power supply of the trigger unit by the protection driving unit according to the fact that whether the three-phase trigger gating control value judging signal is effective or not and whether the three-phase non-trigger area control signal is effective or not is that when one or more than one of the three-phase trigger gating control value judging signals are ineffective, the power supply of all three-phase trigger circuits in the trigger unit is controlled to be disconnected; when the three-phase trigger gating control value judging signals are all effective, in each phase, if the control signal of the non-trigger area is effective, the power supply of the phase trigger circuit in the trigger unit is switched off, otherwise, the power supply of the phase trigger circuit in the trigger unit is switched on, the phase trigger circuit works normally, and the trigger pulse is sent out according to the input trigger control signal.

The thyristors in the three-phase thyristor switch group are bidirectional thyristors or thyristor alternating current switches formed by connecting 2 unidirectional thyristors in reverse parallel.

The invention has the beneficial effects that: the rail transit three-phase alternating current voltage stabilizer adopting the compensation transformer bank and the thyristor switch bank for voltage compensation adopts only one effective and different trigger gating control value, realizes gating control of different on-off combination states of the thyristors in each phase of thyristor switch bank by the diode trigger gating matrix, and ensures that the thyristors at the same side in the thyristor switch bank are not conducted simultaneously, namely realizes interlocking control of the thyristors. Meanwhile, under the condition that the sampling comparison circuit outputs an invalid trigger gating control value by mistake, the trigger pulse is stopped being sent out and the three-phase thyristor switch group is protected, so that the protection strength of the rail transit three-phase alternating current voltage stabilizer against the abnormal working process is effectively enhanced, the fault of the control circuit is prevented from being further expanded to be a short circuit fault of a main circuit, the damage of the voltage stabilizer is reduced, and the cost for maintaining the voltage stabilizer is reduced; when the three-phase thyristor switch group is in the protection state, if the three-phase trigger gating control values are all recovered to be effective, the protection state of the three-phase thyristor switch group can be automatically stopped and the three-phase thyristor switch group is enabled to be in the compensation working state again. The three-phase alternating current voltage stabilizer for the rail transit does not adopt program modes such as a single chip microcomputer and a PLC (programmable logic controller) to control on-off switching of a thyristor, so that the faults of the voltage stabilizer caused by the problems of program runaway, crash and the like are avoided. The three-phase alternating current voltage stabilizer for the rail transit has the advantages of being stable and reliable in work.

Drawings

FIG. 1 is a system composition block diagram of a rail transit three-phase AC voltage stabilizer;

FIG. 2 is a block diagram of the A-phase compensation control circuit;

FIG. 3 is a schematic diagram of the A-phase main circuit of the embodiment 1 of the self-coupled compensated three-phase main circuit unit;

FIG. 4 is a schematic diagram of the A-phase main circuit of embodiment 2 of the self-coupled compensated three-phase main circuit unit;

FIG. 5 shows a sampling comparison circuit in the A-phase compensation control circuit in embodiment 1;

FIG. 6 shows a sampling comparison circuit of embodiment 2 of the A-phase compensation control circuit;

FIG. 7 is a block diagram of an embodiment of an A-phase delay protection circuit;

FIG. 8 is a circuit diagram of an embodiment 1 of the delay detection circuit for triggering the strobe control value signal Y11 for phase A in the delay detection module;

FIG. 9 is a circuit diagram of an embodiment 2 of the delay detection circuit for triggering the strobe control value signal Y11 for phase A in the delay detection module;

FIG. 10 is a circuit diagram of embodiment 3 of the delay detection circuit for triggering the strobe control value signal Y11 for phase A in the delay detection module;

FIG. 11 is a block diagram of an embodiment of an A-phase no-trigger area control signal generation module;

FIG. 12 is a diagram of a portion of related waveforms in the phase A delay protection circuit;

FIG. 13 is an embodiment of a trigger circuit in the trigger unit for triggering the triac SR1 in the phase A main circuit;

FIG. 14 shows an embodiment 1 of the phase A trigger strobe control unit;

FIG. 15 shows an embodiment 2 of the phase A trigger strobe control unit;

FIG. 16 shows an embodiment 3 of the phase A trigger strobe control unit;

FIG. 17 shows an embodiment of a phase A error detection and determination unit;

fig. 18 is a protection drive unit embodiment.

Detailed Description

The invention is further described below with reference to the accompanying drawings.

Fig. 1 is a block diagram of a system of a three-phase ac voltage regulator for rail transit, in which a compensation control unit outputs a three-phase trigger control signal P5 to a trigger unit, and the three-phase trigger control signal P5 is composed of a-phase, B-phase, and C-phase trigger control signals P5A, P5B, and P5C; the trigger unit sends a three-phase trigger signal P6 to the self-coupling compensation type three-phase main circuit unit according to an input three-phase trigger control signal to control the on-off of the bidirectional thyristor in the A, B, C three-phase main circuit thyristor switch group. The compensation control unit simultaneously outputs a three-phase non-trigger area control signal P4 and a three-phase trigger gating control value judging signal P7 to the protection driving unit, the three-phase non-trigger area control signal P4 comprises A-phase, B-phase and C-phase non-trigger area control signals P4A, P4B and P4C, and the three-phase trigger gating control value judging signal P7 comprises A-phase, B-phase and C-phase A-phase trigger gating control value judging signals P7A, P7B and P7C; the protection driving unit judges whether the signal is effective or not according to the input three-phase trigger gating control value to start/stop the protection of the three-phase thyristor switch group, and simultaneously judges whether the signal is effective or not and whether the three-phase non-trigger area control signal is effective or not according to the three-phase trigger gating control value to control the power supply of the trigger unit.

The compensation control unit consists of A, B, C three-phase compensation control circuits, fig. 2 is a block diagram of an A-phase compensation control circuit, and the sampling comparison circuit samples the voltage of an A-phase alternating-current power supply phase voltage and outputs an A-phase trigger gating control value P2A; the delay protection circuit inputs an A-phase trigger gating control value P2A and outputs a delayed A-phase trigger gating control value P3A and an A-phase non-trigger area control signal P4A; the trigger gating control circuit inputs the delayed A-phase trigger gating control value P3A and outputs an A-phase trigger control signal P5A; the error detection judging circuit judges whether the input A-phase trigger strobe control value P3A is effective or not, and outputs an A-phase trigger strobe control value judging signal P7A. The structure, function and control logic of the B-phase and C-phase compensation control circuits are the same as those of the A-phase, voltage sampling and control are respectively carried out on the B-phase alternating current power supply phase voltage and the C-phase alternating current power supply phase voltage, B-phase and C-phase trigger control signals P5B and P5C are output, B-phase and C-phase non-trigger area control signals P4B and P4C and B-phase and C-phase A-phase trigger gating control value judging signals P7B and P7C are output.

Fig. 3 is an a-phase main circuit in an embodiment 1 of the self-coupling compensation type three-phase main circuit unit, which includes a compensation transformer TB1 and a self-coupling transformer TB2, 6 bidirectional thyristors SR1-SR6 jointly form an a-phase thyristor switch group, and a fuse FU1, a relay normally-open switch KA-1 and a relay normally-closed switch KA-2 form an a-phase successive electrical appliance protection circuit.

In fig. 3, the compensation coil of the compensation transformer TB1 is connected in series to the phase line a, where the input end of the phase line is L1A and the output end is L2A. The voltage on the excitation coil of TB1 is controlled by the A-phase thyristor switch group. The autotransformer TB2 is provided with 3 output taps C1, C2 and C3, one ends of bidirectional thyristors SR1, SR3 and SR5 are connected in parallel and then connected to one end of a TB1 excitation coil, and the other ends of SR1, SR3 and SR5 are connected to taps C1, C2 and C3 respectively; one ends of the bidirectional thyristors SR2, SR4 and SR6 are connected in parallel and then connected to the other end of the excitation coil of TB1, and the other ends of SR2, SR4 and SR6 are respectively connected to taps C1, C2 and C3. The output voltage U12 between a tap C1 and a tap C2 of the autotransformer TB2 is different from the output voltage U23 between a tap C2 and a tap C3, and the voltage U23 is 2 times of the voltage U12; the thyristor switch group has 6 excitation coil voltage compensation states of forward U12, forward U23, forward U12+ U23, reverse U12, reverse U23 and reverse U12+ U23 at most, and a0 voltage compensation state when the input voltage is within a normal range is applied, so that the alternating current power supply phase voltage input by the phase line input end L1A of phase A can be divided into 7 voltage intervals for compensation control at most. In fig. 3, N is a zero line, and G11, G12 to G61, and G62 are trigger signal input terminals of the triacs SR1 to SR6, respectively. In fig. 3, the bidirectional thyristors SR1, SR3, and SR5 constitute the same-side thyristor, and the bidirectional thyristors SR2, SR4, and SR6 constitute the other same-side thyristor; in order to avoid short circuit, 2 or more than 2 thyristors in the thyristors at the same time can not be conducted simultaneously; for example, SR1, SR3 cannot be turned on simultaneously, SR4, SR6 cannot be turned on simultaneously, and so on.

Fig. 4 is an a-phase main circuit in an embodiment 2 of the self-coupling compensation type three-phase main circuit unit, which includes a compensation transformer TB1 and a self-coupling transformer TB2, 8 bidirectional thyristors SR1-SR8 jointly form an a-phase thyristor switch group, and a fuse FU1, a relay normally-open switch KA-1 and a relay normally-closed switch KA-2 form an a-phase successive electrical appliance protection circuit.

In fig. 4, the compensation coil of the compensation transformer TB1 is connected in series to the phase line a, where the input end of the phase line is L1A and the output end is L2A. The voltage on the excitation coil of TB1 is controlled by the thyristor switch group. The autotransformer TB2 is provided with 4 output taps C1, C2, C3 and C4, one ends of the bidirectional thyristors SR1, SR3, SR5 and SR7 are connected in parallel and then connected to one end of a TB1 excitation coil, and the other ends of the SR1, SR3, SR5 and SR7 are respectively connected to the taps C1, C2, C3 and C4; one ends of the bidirectional thyristors SR2, SR4, SR6 and SR8 are connected in parallel and then connected to the other end of the excitation coil of TB1, and the other ends of the SR2, SR4, SR6 and SR8 are respectively connected to the taps C1, C2, C3 and C4. The output voltage U12 between a tap C1 and a tap C2 of an autotransformer TB2, the output voltage U23 between C2 and C3, and the output voltage U34 between C3 and C4 are different from each other, the voltage U23 is 3 times of the voltage U12, and the voltage U34 is 2 times of the voltage U12; the thyristor switch group comprises 12 excitation coil voltage compensation states of forward U12, forward U23, forward U34, forward U12+ U23, forward U23+ U34, forward U12+ U23+ U34, reverse U12, reverse U23, reverse U34, reverse U12+ U23, reverse U23+ U34 and reverse U12+ U23+ U34, when an input voltage is in a normal range, the 0 voltage compensation state is applied, and the A power supply alternating-current phase voltage input by the phase line input end L1A can be divided into at most 13 voltage intervals for compensation control. In fig. 4, N is a zero line, and G11, G12 to G81, and G82 are trigger signal input terminals of the triacs SR1 to SR8, respectively. In fig. 4, the bidirectional thyristors SR1, SR3, SR5 and SR7 constitute the same-side thyristor, and the bidirectional thyristors SR2, SR4, SR6 and SR8 constitute the other same-side thyristor; in order to avoid short circuit, 2 or more than 2 thyristors in the thyristors at the same time can not be conducted simultaneously; for example, SR1, SR7 cannot be turned on simultaneously, SR4, SR8 cannot be turned on simultaneously, and so on.

Each of the triacs of fig. 3, 4 may be replaced with 2 antiparallel triacs. In fig. 3 and 4, the relay normally open switch and the relay normally closed switch form a relay protection switch.

The self-coupling compensation type three-phase main circuit unit is a three-phase four-wire system circuit, the A, B, C three-phase main circuits respectively compensate the phase voltage of A, B, C phases by adopting the same circuit structure and form, namely B, C two phases respectively compensate the phase voltage of B, C phases by adopting the same circuit structure and compensation form as the A-phase main circuit.

Fig. 5 shows an embodiment 1 of a sampling comparison circuit in an a-phase compensation control circuit, which performs compensation control on an embodiment 1 of a self-coupling compensation type three-phase main circuit unit. Dividing the voltage of the A-phase alternating-current power supply phase voltage fluctuation interval range into M voltage grade intervals, carrying out voltage sampling on the A-phase alternating-current power supply phase voltage by an A-phase sampling comparison circuit to obtain an A-phase alternating-current power supply phase voltage sampling value, comparing the A-phase alternating-current power supply phase voltage sampling values by M comparators, and outputting an A-phase trigger gating control value formed by M binary digits; when the phase voltage of the A-phase alternating-current power supply is in one of the M voltage grade intervals, the M-bit A-phase triggers that one corresponding bit in the gating control value is valid, and other bits are invalid. The effective bit of the M-bit A-phase trigger gating control value is high level, namely binary 1; the invalid bit is low level, i.e. binary 0; or, the effective bit of the M-bit A-phase trigger gating control value is low level, namely binary 0; the invalid bit is high, i.e. binary 1.

In the ac power supply phase voltage sampling circuit shown in fig. 5, the a-phase ac power supply phase voltage input from the a-phase line L1A and the neutral line N is stepped down by the transformer TV, rectified by the rectifier bridge composed of the diodes DV1-DV4, filtered by the capacitor CV1, and divided by the resistors RV1 and RV2, so as to obtain the a-phase ac power supply phase voltage sampling value U1 in direct proportion to the effective value of the input a-phase ac power supply phase voltage.

In the multi-interval voltage comparator circuit shown in fig. 5, resistors RF1-RF8 form a voltage divider circuit, and 7 threshold voltages UF1-UF7 are obtained after voltage division of the power supply + VCC 1. The 7 comparators FA1-FA7 realize the comparison of the A-phase AC power supply phase voltage sampling value U1 and 7 threshold voltages UF1-UF7, the output A-phase trigger gate control value P2A is composed of the output Y11-Y17 of the 7 comparators FA1-FA7, and the voltage in the fluctuation range of the A-phase AC power supply phase voltage is divided into 7 voltage level intervals 1-7. The operational amplifier FA0 forms a follower, and an A-phase alternating-current power supply phase voltage sampling value U1 is driven by the follower FA0 and then is simultaneously sent to the non-inverting input end of the comparator FA1-FA 7; the sampled value U1 of the phase voltage of the A-phase alternating current power supply can also be directly and simultaneously sent to the non-inverting input ends of the comparators FA1-FA7 without being driven by the follower FA 0; the 7 threshold voltages UF1-UF7 are respectively supplied to the inverting inputs of the comparators FA1-FA 7. In fig. 5, the power supply + VCC1 may be replaced by another precision power supply, and the voltage divider circuit divides the precision power supply to make the threshold voltage more accurate. The operational amplifier FA0 and the comparators FA1-FA7 are preferably low-power single-power-supply rail-to-rail operational amplifiers, for example, single-channel rail-to-rail operational amplifiers with the static working power supply current smaller than 1mA, such as OPA317, AD8517, MCP6291, TLV2450, TLV2451, TLV2460 and TLV2461, are selected.

In FIG. 5, the NOR gates FH1-FH6 constitute controllable power supplies for the comparators FA1-FA6, i.e., the power supplies for the comparators FA1-FA6 are controlled by the outputs Y12-Y17, respectively; the resistors RB1-RB6 are pull-down resistors of the outputs Y11-Y16 respectively, and when the power supply of the corresponding comparator is close to 0V and the output of the corresponding comparator is in a high-impedance state, the level is pulled to be low. The power supply of the comparator FA7 is connected to the power supply + VCC1, and is in a normal working state, and the output Y17 controls the power supplies of the comparators FA1-FA 6. For example, when the input a-phase ac power supply voltage is high and is in the highest voltage class section 7 of 7 voltage class sections, Y17 outputs high level, all the outputs of nor gates FH1-FH6 are low level, all the single-power-supply power supplies of comparators FA1-FA6 are close to 0V, all the outputs are close to 0V or high impedance state, and resistors RB1-RB6 pull the outputs Y11-Y16 low level, respectively. When the input A-phase alternating-current power supply phase voltage is not in the highest voltage grade section 7 of 7 voltage grade sections, Y17 outputs low level, NOR gate FH6 outputs high level to provide power supply for comparator FA6, at this time, if the input A-phase alternating-current power supply phase voltage is in voltage grade section 6, Y16 outputs high level, NOR gates FH1-FH5 all output low level, single-power supply for comparators FA1-FA5 all output 0V or high resistance state, and resistors RB1-RB5 respectively pull output Y11-Y15 low level. When the input alternating current power supply phase voltage is lower than a voltage grade interval 6, Y17 and Y16 both output low level, NOR gates FH6 and FH5 both output high level and respectively provide power supplies for comparators FA6 and FA5, at the moment, if the input alternating current power supply phase voltage is in a voltage grade interval 5, Y15 outputs high level, NOR gates FH1-FH4 all output low level, single power supply of comparators FA1-FA4 are all close to 0V, the outputs are all close to 0V or high resistance state, and resistors RB1-RB4 respectively pull the outputs Y11-Y14 to low level. By analogy, when the input a-phase alternating-current power supply phase voltage is in the voltage class interval 4, Y14 outputs a high level, and the other outputs are low levels; when the input A-phase alternating-current power supply phase voltage is in a voltage class interval 3, Y13 outputs high level, and other outputs are low level; when the input A-phase alternating-current power supply phase voltage is in a voltage class interval 2, Y12 outputs high level, and other outputs are low level; when the input a-phase ac power supply phase voltage is in voltage class section 1, Y11 outputs a high level, and the other outputs are low levels. When the nor gate FH1-FH6 selects a 74HC series high-speed CMOS gate, for example, when the 8-input nor gate 74HC4078, the three-input nor gate 74HC27, the four-input nor gate 74HC02, etc. are selected, or when the nor gate function is realized by a 74HC series high-speed CMOS or nor gate, the high-level driving current of the 74HC series high-speed CMOS can reach 4mA, which is enough to drive a single-channel rail-to-rail operational amplifier with the static operating power supply current less than 1 mA. The power supply of the NOR gate FH1-FH6 is power supply + VCC 1.

The fluctuation range of the input A-phase alternating current power supply phase voltage is set to be 220V +/-10%, and the input A-phase alternating current power supply phase voltage is required to be stabilized within the range of 220V +/-2% for output. By adopting the sampling comparison circuit embodiment 1 in fig. 5, the voltage input between 242V and 198V can be divided into 7 voltage class intervals with the interval voltage size of 6.4V, wherein the voltage of 3 voltage class intervals is higher than the required output voltage range, and voltage reduction compensation is required; the voltage of the 3 voltage class intervals is lower than the required output voltage range, and boosting compensation is needed; the 1 voltage class interval is within the required output voltage range, and 0 voltage compensation is carried out, namely no compensation is carried out. The voltage interval of 6.4V is not more than 220V +/-1.5 percent, and the requirement that the output is controlled within 220V +/-2 percent is met; the fluctuation interval of the alternating current power supply voltage corresponding to 7 voltage class intervals of 6.4V is 242.4V to 197.6V, and the actual fluctuation range is covered. The compensation is performed by using the a-phase main circuit in the embodiment 1 of the auto-coupling compensation type three-phase main circuit unit shown in fig. 3, the input voltage of the auto-coupling transformer TB2 is ac 220V, when the output voltage U12 is used as the excitation coil voltage of TB1, the TB1 compensation voltage is 6.4V, and when the output voltage U23 is used as the excitation coil voltage of TB1, the TB1 compensation voltage is 12.8V; when the output voltages U12 and U23 are used as the excitation coil voltage of TB1, the compensation voltage of TB1 is 19.2V. The selection of the threshold voltage UF1-UF7 is related to the proportion of the sampled value U1 of the phase voltage of the A alternating current power supply to the phase voltage of the A alternating current power supply; setting the proportion of an A-phase alternating current power supply phase voltage sampling value U1 to an A-phase alternating current power supply phase voltage to be 0.01, namely setting an A-phase alternating current power supply phase voltage sampling value U1 to be 1% of an effective value of the A-phase alternating current power supply phase voltage, and setting a corresponding voltage sampling value range of phase voltages input between 242V and 198V to be 2.42V to 1.98V; dividing the phase voltage of the A-phase alternating current power supply into 7 threshold voltages UF7-UF1 of 7 voltage class intervals with interval voltage of 6.4V, wherein the 7 threshold voltages UF7-UF1 are respectively 2.36V, 2.296V, 2.232V, 2.168V, 2.104V, 2.04V and 1.98V and respectively correspond to voltage sampling values for dividing the range voltage of 242.4V to 197.6V into lower limit values of 7 voltage class intervals; the size of the resistors RF1-RF8 can be calculated according to the size of the 7 threshold voltages UF1-UF7 and + VCC 1.

Since the compensation mode of the self-coupled compensation type three-phase main circuit unit embodiment 1 automatically has the schmitt characteristic, the comparator FA1 to the comparator FA7 do not constitute a schmitt comparator. The phase a trigger strobe control value output in fig. 5 is active high; and a stage of inverter is added at the output ends of the comparators FA1-FA7, and the output A-phase trigger gating control value becomes active low.

In embodiment 1 of the sampling comparison circuit in fig. 5, when the input a-phase ac power supply phase voltage is higher than the range of the maximum voltage level interval, the output signal corresponding to the maximum voltage level interval in the output a-phase trigger gate control value is valid, that is, the output is Y17 valid; at the moment, the main circuit performs corresponding voltage reduction compensation according to the condition that the voltage of the input alternating current power supply is in the maximum voltage grade interval. When the input alternating current power supply phase voltage is lower than the minimum voltage level interval range, all signals in the output A-phase trigger gating control value are invalid, and the main circuit does not perform voltage compensation at the moment. If the comparator FA1 in the sampling comparison circuit embodiment 1 of fig. 5 is removed, the 6 threshold voltages UF7-UF2 of the comparators FA 7-FA 2 are unchanged, and are 6 intermediate separation voltage values of the phase voltage sampling values corresponding to the alternating-current power supply voltage values separated by 7 voltage class intervals; the output signal of the nor gate FH1, namely the lowest interval judgment value Y11-1, is directly used as Y11 in the a-phase trigger gating control value, so that when the voltage of the input alternating-current power supply is in or below the range of the minimum voltage level interval, the output of Y11 is effective, and the main circuit performs corresponding voltage boosting compensation according to the condition that the voltage of the input a-phase alternating-current power supply is in the minimum voltage level interval.

In the sample comparator circuit embodiment 1 of fig. 5, compensation control may be performed on the self-coupled compensation type three-phase main circuit unit embodiment 2, and in this case, it is necessary to divide the voltage in the ac power supply phase voltage fluctuation interval range of each phase into more voltage class intervals. For example, when the voltage of the fluctuation interval range of the a-phase ac power supply phase voltage is divided into 13 voltage class intervals, the circuit of fig. 5 should be extended to 13 comparators for comparison with 13 threshold voltages of different sizes; or 12 comparators are adopted to compare with 12 threshold voltages with different sizes; the output phase a toggle strobe control value P2A will consist of 13 bits, e.g., Y11-Y113.

The phase a sampling comparison circuit embodiment 1 of fig. 5 is used for compensation control of the self-coupling compensation type three-phase main circuit unit embodiment 1 or the self-coupling compensation type three-phase main circuit unit embodiment 2, and the sampling comparison circuit with the same structure and function as those of the phase a is used for the phase B and the phase C; A. b, C the threshold voltage of the three-phase sampling comparison circuit can be provided by the same voltage division circuit or by respective voltage division circuits.

Fig. 6 shows an embodiment 2 of a sampling comparison circuit in an a-phase compensation control circuit, which performs compensation control on an embodiment 2 of a self-coupling compensation type three-phase main circuit unit. In fig. 6, FD1 is a true effective value detection device LTC1966, a transformer TV1, a capacitor CV2, and a capacitor CV3 constitute an ac power supply phase voltage sampling circuit, and the effective value of the a ac power supply phase voltage inputted from an a phase line L1A and a zero line N is measured to obtain an ac power supply phase voltage sampling value U2. UIN1 and UIN2 of LTC1966 are alternating voltage differential input terminals, USS is a negative power input terminal capable of being grounded, UDD is a positive power input terminal, GND is a ground terminal, EN is a low-level effective enable control input terminal, UOUT is a voltage output terminal, and COM is an output voltage return terminal.

In fig. 6, FD2, resistor RD1, resistor RD2, and inverters FB1-FB10 form a multi-section voltage comparator circuit; FD2 is a 10-stage comparison display driver LM3914, which contains 10 internal divider circuits with 1k Ω precision resistors connected in series, and forms 10 comparison threshold voltages connected to the positive input terminals of 10 comparators, respectively, and divides the voltage in the fluctuation range of the a-phase ac power supply phase voltage into 10 voltage class intervals 1-10. Pin 6 is the high end of the internal divider circuit and is connected to the internal standard power supply output VREF of pin 7 through a resistor RD 1; pin 4 is the low end of the internal voltage divider circuit and is connected to the ground through a resistor RD 2; pin 8 is the low end of the internal standard power supply and is connected to the ground; pin 2 is a negative power supply end and is connected to the ground; pin 3 is a positive power supply terminal and is connected to a power supply + VCC 1; a pin 5 is a signal input end, is connected to an A-phase alternating-current power supply phase voltage sampling value U2 and is internally connected to the negative input ends of 10 comparators; signals L10-L1 output by pins 10-18 and 1 of LM3914 are output results of 10 comparators, wherein the comparison threshold voltage of L10 is the highest and is reduced in sequence, and the comparison threshold voltage of L1 is the lowest; L1-L10 are all active low; the mode control terminal of the 9 pins is floating, so that the point-like output from L1 to L10 is realized, namely, single low level output is effective. In fig. 6, the high side of the inner divider circuit can also be connected to other power supplies, such as power supply + VCC1, via resistor RD 1.

In fig. 6, 10 inverters FB1-FB10 are used to invert the output signals L1-L10, respectively, to obtain the high-level and effective a-phase trigger gate control value P2A composed of 10-bit binary Y11-Y110. When the a-phase ac mains phase voltage is in one of 10 voltage class intervals 1-10, the corresponding one of the bits Y11-Y110 is at a high level and the other bits are at a low level. For example, when the input a-phase ac power supply phase voltage is in the voltage class section 10, Y110 outputs a high level, and the other outputs are low levels; when the input A-phase alternating-current power supply phase voltage is in a voltage level interval 9, Y19 outputs high level, and other outputs are low level; when the input A-phase alternating-current power supply phase voltage is in a voltage level interval 5, Y15 outputs high level, and other outputs are low level; when the input a-phase ac power supply phase voltage is in voltage class section 1, Y11 outputs a high level, and the other outputs are low levels. The A-phase trigger gate control value is active low when the inverters FB1-FB10 in FIG. 5 are eliminated and the output signals L1-L10 are used directly as the A-phase trigger gate control values Y11-Y110. The inverters FB1-FB10 are all powered by the power supply + VCC 1.

In fig. 6, 10 comparators out of 10 comparators in LM3914 are used to compare the a-phase ac power supply phase voltages into 10 voltage class intervals. The fluctuation range of the phase voltage of the A-phase alternating current power supply is set to be 220V + 10% to 220V-20%, and the A-phase alternating current power supply is required to be stabilized within the range of 220V +/-2% for output. By adopting the sampling comparison circuit embodiment 2 of fig. 6, the voltage input between 242V and 176V is divided into 10 voltage class intervals with the interval voltage size of 7V, wherein the voltage of 3 voltage class intervals is higher than the required output voltage range, and voltage reduction compensation is required; the voltage of the 6 voltage class intervals is lower than the required output voltage range, and boosting compensation is needed; the 1 voltage class interval is within the required output voltage range, and 0 voltage compensation is carried out, namely no compensation is carried out. The voltage interval of 7V is 220V +/-1.6%, the requirement that the output is controlled within 220V +/-2% is met, the alternating current power supply voltage fluctuation interval corresponding to 10 voltage class intervals of 7V is 244.5V to 174.5V, and the actual fluctuation range is covered. The compensation is carried out by adopting the A-phase main circuit in the embodiment 2 of the auto-coupling compensation type three-phase main circuit unit shown in FIG. 4, the input voltage of an auto-transformer TB2 is alternating current 220V, and when the output voltage U12 is used as the excitation coil voltage of TB1, the compensation voltage of TB1 is 7V; when the output voltage U23 is only used as the excitation coil voltage of TB1, the TB1 compensation voltage is 21V; when the output voltage U34 is only used as the excitation coil voltage of TB1, the TB1 compensation voltage is 14V; meanwhile, when the output voltages U12 and U23 are used as the excitation coil voltage of TB1, the compensation voltage of TB1 is 28V; and so on. The selection of the threshold voltage is related to the proportion between the sampled value U2 of the phase voltage of the A-phase alternating current power supply and the phase voltage of the A-phase alternating current power supply; setting the proportion of the A-phase alternating current power supply phase voltage sampling value U2 to the A-phase alternating current power supply phase voltage to be 0.005, namely setting the A-phase alternating current power supply phase voltage sampling value U2 to be 0.5% of the effective value of the A-phase alternating current power supply phase voltage, and setting the phase voltage sampling value range corresponding to the phase voltage input between 242V and 176V to be 1.21V to 0.88V; dividing the phase voltage of the A-phase alternating-current power supply into 10 voltage class intervals with interval voltage of 7V, wherein the 10 threshold voltages of the 10 voltage class intervals are 1.1875V, 1.1525V, 1.1175V, 1.0825V, 1.0475V, 1.0125V, 0.9775V, 0.9425V, 0.9075V and 0.8725V respectively and correspond to voltage sampling values of a lower limit value for dividing the voltage in a range from 244.5V to 174.5V into 10 voltage class intervals respectively; the voltage at the high end of the inner voltage divider circuit is connected to the positive input end of the highest comparator, so that the voltage at the 6 pin is 1.1875V. From the 10 threshold voltages and the magnitude of the internal standard power supply output VREF (1.2V or 1.25V), the magnitudes of the resistances RD1, RD2 can be calculated. If the precision of voltage compensation is required to be improved or the fluctuation range of the input voltage is required to be larger, when the embodiment 2 of the a-phase sampling comparison circuit in fig. 6 is required to divide the voltage class into more voltage class intervals, for example, when the voltage in the fluctuation range of the phase voltage of the a-phase ac power supply needs to be divided into 13 voltage class intervals, 2 LM3914 can be adopted to implement the method, and the inner voltage divider circuits in the 2 LM3914 are connected in series to form 20 comparison threshold voltages, so as to form a 20-stage comparator circuit; selecting 13 of the comparison outputs, the output phase a toggle strobe control value will consist of 13 bits, e.g., Y11-Y113.

In embodiment 2 of the sampling comparison circuit in fig. 6, when the input a-phase ac power supply phase voltage is higher than the range of the maximum voltage class section, the output a-phase trigger gate control value is valid as the output signal corresponding to the maximum voltage class section, that is, the output is valid as Y110, and the main circuit performs corresponding voltage step-down compensation according to the fact that the a-phase ac power supply phase voltage is in the maximum voltage class section. When the input A-phase alternating-current power supply phase voltage is lower than the minimum voltage level interval range, all signals in the output A-phase trigger gating control value are invalid, and the main circuit does not perform voltage compensation at the moment.

In fig. 6, 10 comparators out of 10 comparators in LM3914 are used to compare the a-phase ac power supply phase voltages into 10 voltage class intervals. Only 9 comparators in 10 comparators in LM3914 can be adopted to compare and divide the phase voltage of the A-phase alternating current power supply into 10 voltage class intervals; for example, the comparison threshold voltage of each comparator is not changed, and the comparison threshold voltages of 9 comparators are 9 middle separation voltage values of the phase voltage sampling values corresponding to the alternating current power supply voltage values separated by 10 voltage class intervals; instead of using the inverted output L1 of LM3914 in FIG. 6 as Y11 in the A-phase trigger gate control value, Y11 is generated by Y12-Y110 in the A-phase trigger gate control value, namely Y11 is enabled when all Y12-Y110 are disabled, otherwise Y11 is disabled; at the moment, when the input A-phase alternating-current power supply phase voltage is in or higher than the range of the maximum voltage level interval, the output A-phase trigger gating control value is Y110 valid, and the main circuit performs corresponding voltage reduction compensation according to the condition that the A-phase alternating-current power supply phase voltage is in the maximum voltage level interval; when the input A-phase alternating-current power supply phase voltage is in or below the minimum voltage class interval range, Y11 output is effective, and the main circuit performs corresponding voltage boosting compensation according to the condition that the input A-phase alternating-current power supply phase voltage is in the minimum voltage class interval range.

The a-phase sampling comparison circuit embodiment 2 in fig. 6 can also be used to perform compensation control on the self-coupling compensation type three-phase main circuit unit embodiment 1, and at this time, only the voltages in the fluctuation interval range of the input ac power phase voltage need to be divided into intervals of no more than 7 voltage levels, and the comparison output of no more than 7 levels is selected.

In the embodiment 2 of the a-phase sampling comparison circuit in fig. 6, both the B-phase and the C-phase adopt sampling comparison circuits having the same structure and function as those of the a-phase, regardless of whether the embodiment 1 of the self-coupled compensation type three-phase main circuit unit or the embodiment 2 of the self-coupled compensation type three-phase main circuit unit is used for compensation control.

In addition to the embodiment of the a-phase sampling comparison circuit shown in fig. 5 or fig. 6, compensation control is performed on the embodiment 1 or the embodiment 2 of the self-coupled compensation type three-phase main circuit unit, and the three-phase sampling comparison circuit may also select another ac power supply phase voltage sampling circuit and comparison circuit to implement the functions required by the sampling comparison circuit. The ac power supply voltage sampling value U1 output by the ac power supply phase voltage sampling circuit of fig. 5 may be sent to the multi-interval voltage comparator circuit of fig. 6 for comparison, and a trigger gating control value is output; the ac power source voltage sampling value U2 output by the ac power source voltage sampling circuit of fig. 6 may be sent to the multi-interval voltage comparator circuit of fig. 5 for comparison, and a trigger gating control value is output.

Fig. 7 is a block diagram of an embodiment of an a-phase delay protection circuit, in which a delay detection module YC1 performs signal delay on input M-bit a-phase trigger gate control values Y11-Y1M to obtain delayed a-phase trigger gate control values Y21-Y2M, and Y21-Y2M form P3A; the YC1 module simultaneously and respectively carries out edge detection on the M-bit Y11-Y1M signals to obtain M-bit edge detection signals Y31-Y3M; the no-trigger zone control signal generation module YC2 converts the input edge detection signals Y31-Y3M into the a-phase no-trigger zone control signal P4A for output. In the block diagram of the embodiment in fig. 7, when the input of the delay detection module YC1 is the a-phase trigger gating control value output by the a-phase compensation control circuit in fig. 5 sampling comparison circuit embodiment 1, M is equal to 7. In the block diagram of the embodiment in fig. 7, when the input of the delay detection module YC1 is the a-phase trigger strobe control value output by the a-phase compensation control circuit in fig. 6 sampling comparison circuit embodiment 2, M is equal to 10. The phase B and the phase C adopt the same delay protection circuit as the phase A.

Fig. 8 is a circuit embodiment 1 of the delay detection circuit for triggering the gating control value signal Y11 for phase a in the delay detection module. The resistor RY0, the capacitor CY0 and the driving gate FY0 realize signal delay of Y11, and a delayed signal Y21 of Y11 is obtained. The resistor RY1, the capacitor CY1, the diode DY1 and the inverter FY1 form a rising edge detection circuit for the input signal Y11, and a single pulse in the form of a negative pulse corresponding to the rising edge of Y11 is output in the output signal YP1 of the inverter FY 1. The resistor RY2, the capacitor CY2, the diode DY2, the inverters FY2 and FY3 constitute a falling edge detection circuit for the input signal Y11, and a single pulse in the form of a negative pulse corresponding to the falling edge of Y11 is output in the output signal YP2 of the inverter FY 3. The nand gate FY4 implements a nor (negative logic) function, in which a positive pulse is generated in the edge detection signal Y31 output by the nand gate FY4 when a negative pulse is generated in the input signals YP1 and YP2, that is, a single pulse in the form of a positive pulse is output by the nand gate FY4 when the input signal Y11 changes. In fig. 8, the drive gate FY0, inverter FY1, inverter FY3 are preferably devices with schmitt inputs, e.g., inverter select 74HC14, CD40106, etc.; the drive gate FY0 may consist of 2 inverters with schmitt inputs.

Fig. 9 shows an embodiment 2 of the delay detection circuit of the delay detection module for triggering the strobe control value signal Y11 for phase a. The inverter FY5, the resistor RY3 and the capacitor CY3 invert and delay the input signal Y11 to obtain a delayed inverted signal YP0 of Y11; the inverter FY6 inverts YP0 to obtain a delayed Y11 signal Y21. The signal input by the nand gate FY7 is a delayed inverted signal YP0 of Y11 and Y11, and a single pulse in the form of a negative pulse corresponding to the rising edge of Y11 is generated in the output signal YP 1; the or gate FY8 receives the inverted signals YP0 of Y11 and Y11, and the output signal YP2 generates a single pulse in the form of a negative pulse corresponding to the falling edge of Y11. The nand gate FY9 implements a nor (negative logic) function, in which a positive pulse is generated in the edge detection signal Y31 output by the nand gate FY9 when a negative pulse is generated in the input signals YP1 and YP2, that is, a single pulse in the form of a positive pulse is output by the nand gate FY9 when the input signal Y11 changes. In fig. 9, inverter FY6, nand gate FY7, or gate FY8 are preferably devices with schmitt inputs, e.g., inverter select 74HC14, CD40106, etc.; nand gate select 74HC132, CD4093, etc.; or gate select 74HC7032 or 2 inverters with schmitt inputs and 1 nand gate to implement the or gate function.

Fig. 10 is a delay detection circuit embodiment 3 of the delay detection module for triggering the gate control value signal Y11 for the a phase, in which a rising edge detection circuit for the input signal Y11 is composed of the resistor RY1, the capacitor CY1, the diode DY1 and the inverter FY1, and a falling edge detection circuit for the input signal Y11 is composed of the resistor RY2, the capacitor CY2, the diode DY2, the inverter FY2 and the FY3, and a circuit for outputting the edge detection signal Y31 by using the nand gate FY4 is the same as in embodiment 1 of fig. 8. In fig. 10, the signal delay of Y11 is realized by inverters FY11, FY12, FY13, and FY14, and a delayed signal Y21 of Y11 is obtained.

The delay detection circuit for the signal Y11 in the A-phase trigger strobe control value can select any one of the embodiments 1-3 in the figures 8, 9 and 10; generally, the same delay detection circuit is used for all signals in A, B, C three-phase trigger gating control value. For example, if the a-phase trigger gating control values of M equal to 7, A, B, C three phases are all composed of 7-bit binary values, 21 delay detection circuits are required in total; the 21 delay detection circuits may be all employed in embodiment 1 of fig. 8, or all employed in embodiment 2 of fig. 9, or all employed in embodiment 3 of fig. 10. The delay detection circuit may also adopt other circuits meeting the requirements to realize the functions thereof.

The function of the no-trigger area control signal generation module of each phase is to output a single pulse in the no-trigger area control signal of the phase when the single pulse related to the edge is generated in any one or more of the edge detection signals which are input to the trigger gating control value of the phase A. Fig. 11 shows an embodiment of the a-phase no-trigger area control signal generation module, in which a nor gate FY10 including M inputs performs corresponding functions, and the input signals of the nor gate FY10 are the a-phase edge detection signals Y31-Y3M, and the output signal is an a-phase no-trigger area control signal P4A. In the embodiment of fig. 11, the single pulse output by the phase a non-trigger area control signal is a negative pulse, i.e. the low level of the non-trigger area control signal is active; when the nor gate FY10 is changed to an or gate, the single pulse that does not trigger the zone control signal output is a positive pulse. If the single pulse associated with an edge generated in the input edge detection signals Y31-Y3M is a negative pulse, the nor gate in fig. 11 should be changed to a nand gate or an and gate to implement an or logic function under negative logic.

All gates in the delay protection circuit are powered by a single power supply + VCC 1. Fig. 12 is a diagram illustrating a part of relevant waveforms in the delay protection circuit. From the principle and requirements of the sampling comparison circuit, when the output A-phase trigger gating control value is normally changed, 2 bits are changed every time. In fig. 12, Y11 in the a-phase trigger strobe control value has a rising edge change and a falling edge change, respectively, and Y21 is the a-phase trigger strobe control value after Y11 delays by T1; in embodiment 1 of the delay detection circuit in fig. 8, T1 is determined by the magnitude of the product of the resistor RY0 and the capacitor CY0 (i.e., the magnitude of the time constant); in embodiment 2 of the delay detection circuit of fig. 9, T1 is determined by the product of the resistor RY3 and the capacitor CY 3; in the delay detection circuit embodiment 3 of fig. 10, T1 is determined by the gate delay time of the inverters FY11, FY12, FY13, and FY14 themselves. In fig. 12, the negative pulse width of the signal YP1 due to the rising edge of Y11 is T2; in the delay detection circuit embodiment 1 of fig. 8 and the delay detection circuit embodiment 3 of fig. 10, T2 is determined by the magnitude of the product of the resistor RY1 and the capacitor CY 1; in embodiment 2 of the delay detection circuit in fig. 9, T2 is determined by the product of the resistor RY3 and the capacitor CY 3. In fig. 12, the negative pulse width generated by the falling edge of Y11 in the signal YP2 is T3; in the delay detection circuit embodiment 1 of fig. 8 and the delay detection circuit embodiment 3 of fig. 10, T3 is determined by the magnitude of the product of the resistor RY2 and the capacitor CY 2; in embodiment 2 of the delay detection circuit in fig. 9, T3 is determined by the product of the resistor RY3 and the capacitor CY 3. In fig. 12, 2 positive pulses in the edge detection signal Y31 correspond to a negative pulse due to a rising edge of Y11 in the signal YP1 and a negative pulse due to a falling edge of Y11 in the signal YP2, respectively. When Y11 in the a-phase trigger strobe control value in fig. 12 changes in rising edge, Y12 in the a-phase trigger strobe control value changes in falling edge, and the corresponding edge detection signal Y32 generates a positive pulse correspondingly; when Y11 changes in the falling edge, Y12 in the a-phase trigger gate control value changes in the rising edge at the same time, and a positive pulse is generated in the corresponding edge detection signal Y32; during this period, the other trigger gate control value signals except Y11 and Y12 are unchanged, and the edge detection signals corresponding to the other trigger gate control value signals except Y11 and Y12 are all at low level, which is not shown in fig. 12. According to the logical or function of the non-trigger area control signal generation module, the width of the single pulse output by the non-trigger area control signal generation module is the same as the widest pulse width of the input pulses in the input edge detection signals, and the width difference is caused by the difference between the resistance and capacitance values of T2 and T3 determined in the different delay detection circuits. In fig. 12, the 1 st positive pulse in Y31 is wider than the 1 st positive pulse in Y32, the 2 nd positive pulse in Y31 is narrower than the 2 nd positive pulse in Y32, the 1 st negative pulse width in the no-trigger-region control signal P4A coincides with the 1 st positive pulse width in the edge-detection signal Y31, and the 2 nd negative pulse width in the no-trigger-region control signal P4A coincides with the 2 nd positive pulse width in the edge-detection signal Y32.

In the embodiment 1 of the delay detection circuit in the delay protection circuit of fig. 8, the delay time for the change of the trigger gating control value of the phase a to the leading edge of the single pulse of the corresponding control signal of the non-trigger area is the sum of the delay times of the gates FY1 and FY4 and FY10 in fig. 11, or the sum of the delay times of the gates FY3 and FY4 and FY10 in fig. 11; the selection range of the signal delay time T1 of the a-phase trigger gating control value determined by the product of the resistor RY0 and the capacitor CY0 is ms order of magnitude, obviously, is greater than the delay time of the a-phase trigger gating control value changing to the leading edge of the corresponding single pulse of the no-trigger area control signal, that is, the time of the delay change of the gradation coding value signal is later than the leading edge time of the single pulse output after the a-phase trigger gating control value is changed. Strictly speaking, T1 actually includes the sum of the delay time caused by resistor RY0 and capacitor CY0, and the delay time of gate FY 0. In embodiment 1 of fig. 8, when selecting parameters, the value of T2 and the value of T3 are both larger than the value of T1, so that the time when the gradation code value signal changes with delay meets the requirement that the time is earlier than the time of the trailing edge of the output single pulse after the a-phase trigger strobe control value changes.

In the embodiment 2 of the delay detection circuit in the delay protection circuit in fig. 9, the delay time for the change of the a-phase trigger gating control value to the leading edge of the corresponding single pulse of the no-trigger area control signal is the sum of the delay times of the gates FY7 and FY9 and FY10 in fig. 11, or the sum of the delay times of the gates FY8 and FY9 and FY10 in fig. 11; t1 is a value of ms magnitude, and it is obvious that at this time, the signal delay time T1 of the a-phase trigger gate control value determined by the product of the resistor RY3 and the capacitor CY3 is longer than the delay time of the leading edge of the single pulse of the a-phase trigger gate control value when the a-phase trigger gate control value changes to the corresponding no-trigger-zone control signal, that is, the time of the delay change of the a-phase trigger gate control value signal is later than the leading edge of the single pulse output after the a-phase trigger gate control value changes. In the embodiment 2 of the delay detection circuit in fig. 9, both the time when the a-phase trigger gate control value signal changes in delay and the time when the trailing edge of the output single pulse after the a-phase trigger gate control value changes are affected by the change of the signal YP 0; the time when the delay of the A-phase trigger gating control value signal changes is the delay of the gate circuit FY6 after the signal YP0 changes; the trailing edge time of the single pulse output after the change of the A-phase trigger gate control value is the sum of the delay time of the signal YP0 after the change of the signal YP 7, the delay time of the signal YP 9 after the change of the signal YP 10 in the graph 11 and the delay time of the signal YP0 after the change of the signal YP 8, the delay time of the signal FY9 after the change of the signal YP0 in the graph 11 and the delay time of the signal FY10 in the graph 11; obviously, the time of the delayed change of the A-phase trigger gating control value signal is less than the time of the trailing edge of the single pulse output after the A-phase trigger gating control value is changed by 2 gate circuits, and the requirement that the time of the delayed change of the A-phase trigger gating control value signal is earlier than the time of the trailing edge of the single pulse output after the A-phase trigger gating control value is changed is met.

Fig. 13 is a trigger circuit embodiment of triggering the self-coupling compensation type three-phase main circuit unit of fig. 3 in the trigger unit, or triggering the triac SR1 in the a-phase main circuit of the self-coupling compensation type three-phase main circuit unit of fig. 4, and the trigger circuit embodiment is composed of an ac trigger optocoupler UG1, a resistor RG1, and a resistor RG2, and the trigger control signal P51 is active at a low level. The alternating current trigger optocoupler UG1 can be selected from phase-shifting bidirectional thyristor output optocouplers such as MOC3022, MOC3023, MOC3052 and MOC 3053. The power supply + VCCA is a controlled power supply of the A-phase trigger circuit controlled by the protection driving unit. The triggering circuits for triggering the triacs SR2-SR6 in the A-phase main circuit of the embodiment 1 of the auto-compensation three-phase main circuit unit of FIG. 3 or triggering the triacs SR2-SR8 in the A-phase main circuit of the embodiment 2 of the auto-compensation three-phase main circuit unit of FIG. 4 are controlled by an A-phase triggering control signal P5A, which is the same as the circuit structure for triggering the triacs SR1 in the A-phase main circuit. The trigger circuit structure for triggering all the bidirectional thyristors in the B-phase main circuit is the same as the circuit structure for triggering the SR1 in the A-phase main circuit, is controlled by a B-phase trigger control signal P5B, and the power supply is + VCCB and is a controlled power supply of the B-phase trigger circuit controlled by the protection driving unit. The trigger circuit structure for triggering all the bidirectional thyristors in the C-phase main circuit is the same as the circuit structure for triggering the bidirectional thyristor SR1 in the A-phase main circuit, is controlled by a C-phase trigger control signal P5C, and the power supply is + VCCC and is a controlled power supply of the C-phase trigger circuit controlled by the protection driving unit. The trigger pulses output by the alternating current trigger optocoupler UG1 in fig. 14 from G11 and G12 and the trigger pulses output by other alternating current trigger optocouplers in the trigger unit jointly form a trigger signal P6.

Fig. 14 shows an embodiment 1 of an a-phase trigger gate control circuit, and compensation control is performed on an a-phase main circuit in the embodiment 1 of the self-coupled compensation type three-phase main circuit unit in fig. 3, wherein the fluctuation range of an a-phase alternating current power supply phase voltage is 220V ± 10%, and the a-phase alternating current power supply phase voltage is required to be stabilized within a range of 220V ± 2% for output. In fig. 14, the a-phase trigger gate control values Y21-Y27 inputted by the a-phase trigger gate control circuit are active at high level, 14 diodes D11-D72, trigger gate control column lines Y21-Y27, and trigger drive row lines VK1-VK6 form a diode trigger gate matrix, resistors RS1-RS6 and transistors VS1-VS6 form a-phase trigger control signal P51-P56 driving circuits, and at this time, the P51-P56 form a-phase trigger control signal P5A.

Table 1 is a trigger gating control function table of the a-phase trigger gating control circuit in embodiment 1, and lists 7 valid bits in the 7-bit a-phase trigger gating control value, that is, the on-off combination state of the bidirectional thyristors in the a-phase thyristor switch group corresponding to the 7 valid a-phase trigger gating control values. The 7 effective A-phase trigger gating control values correspond to the voltage level interval 1-7, and the A-phase trigger gating control circuit controls the on-off state of the bidirectional thyristor in the A-phase main circuit embodiment 1 according to the A-phase trigger gating control values to perform corresponding voltage compensation; in table 1, 1 represents that the corresponding triac needs to be in the on state, and 0 represents that the corresponding triac is in the off state.

TABLE 1

The diode-triggered gating matrix of fig. 14 is functionally connected as required in table 1, controlled by a-phase triggered gating control values Y21-Y27; when a certain trigger gating control column line is effective, the diode enables a signal of the trigger driving column line which needs to be conducted with the bidirectional thyristor to be effective. For example, when the input voltage is at the lowest voltage level 1, that is, Y21 is at a high level, diodes D11 and D12 in the trigger gating matrix are turned on, triodes VS1 and VS6 are respectively controlled to be turned on when trigger driving row lines VK1 and VK6 are at a high level, so that P51 and P56 effectively turn on bidirectional thyristors SR1 and SR6, other diodes in the trigger gating matrix are turned off, other bidirectional thyristors are controlled to be turned off, and the output voltage U12+ U23 is used as the excitation coil voltage of TB1 for forward compensation; when the input voltage is in a voltage class 2, namely Y22 is effectively in a high level, diodes D21 and D22 in the trigger gating matrix are conducted, triodes VS3 and VS6 are respectively controlled to be conducted by the trigger driving row lines VK3 and VK6 in a high level, so that the P53 and P56 effectively turn on the bidirectional thyristors SR3 and SR6, other diodes in the trigger gating matrix are turned off, other bidirectional thyristors are controlled to be turned off, and the output voltage U23 is only used for forward compensation of the excitation coil voltage of the TB 1; when the input voltage is in a voltage level of 4, namely Y24 is effectively in a high level, diodes D41 and D42 in the trigger gating matrix are conducted, triodes VS5 and VS6 are respectively controlled to be conducted by the trigger driving row lines VK5 and VK6 in a high level, so that the P55 and P56 effectively turn on the bidirectional thyristors SR5 and SR6, other diodes in the trigger gating matrix are turned off, other bidirectional thyristors are controlled to be turned off, and 0-voltage compensation is realized, namely the voltage of the magnet exciting coil of the TB1 is 0; when the input voltage is at voltage level 5, namely Y25 is effectively at high level, diodes D51 and D52 in the trigger gating matrix are conducted, triodes VS2 and VS3 are respectively controlled to be conducted by the trigger driving row lines VK2 and VK3 at high level, so that the P52 and P53 effectively turn on the bidirectional thyristors SR2 and SR3, other diodes in the trigger gating matrix are turned off, other bidirectional thyristors are controlled to be turned off, and the reverse output voltage U12 is only used for carrying out reverse compensation on the excitation coil voltage of TB 1; and so on.

Fig. 15 shows an embodiment 2 of the a-phase trigger gate control circuit, and compensation control is also performed on the a-phase main circuit in the embodiment 1 of the self-coupled compensation type three-phase main circuit unit in fig. 3. In fig. 15, the a-phase trigger gate control value Y21-Y27 inputted by the a-phase trigger gate control circuit is active at low level, 14 diodes D11-D72, trigger gate control column lines Y21-Y27, and trigger drive row lines P51-P56 form a diode trigger gate matrix, and the trigger gate matrix directly outputs active a-phase trigger control signals P51-P56 at low level. In this embodiment 2, there is no driving circuit for triggering the control signals P51-P56.

The diode-triggered gating matrix of fig. 15 is functionally connected as required in table 1, controlled by a-phase triggered gating control values Y21-Y27; for example, when the input voltage is the lowest voltage level 1, that is, Y21 is at a low level, diodes D11 and D12 in the trigger gating matrix are turned on to make P51 and P56 become effective low levels to turn on bidirectional thyristors SR1 and SR6, respectively, other diodes in the trigger gating matrix are turned off to control and turn off other bidirectional thyristors, and the output voltage U12+ U23 is used as the excitation coil voltage of TB1 for forward compensation; when the input voltage is in a voltage class 2, namely Y22 is effectively in a low level, diodes D21 and D22 in the gating matrix are triggered to be conducted, P53 and P56 are enabled to become effective low levels to turn on bidirectional thyristors SR3 and SR6 respectively, other diodes in the gating matrix are triggered to be cut off, other bidirectional thyristors are controlled to be turned off, and only the output voltage U23 is adopted to carry out forward compensation on the excitation coil voltage of TB 1; when the input voltage is in a voltage level of 4, namely Y24 is effectively in a low level, diodes D41 and D42 in the gating matrix are triggered to be conducted, P55 and P56 are changed into effective low levels to turn on bidirectional thyristors SR5 and SR6 respectively, other diodes in the gating matrix are triggered to be cut off, and other bidirectional thyristors are controlled to be turned off, so that 0 voltage compensation is realized; when the input voltage is in the voltage class 7, namely Y27 is effectively in a low level, diodes D71 and D72 in the gating matrix are triggered to be conducted, P52 and P55 are changed into effective low levels to turn on bidirectional thyristors SR2 and SR5 respectively, other diodes in the gating matrix are triggered to be cut off, other bidirectional thyristors are controlled to be turned off, and reverse output voltage U12+ U23 is adopted to be as excitation coil voltage of TB1 for reverse compensation; and so on.

In fig. 15, the low level in the phase a trigger gating control value Y21-Y27 needs to directly drive the input end leds of 2 ac trigger optocouplers to emit light; when the alternating current trigger optocoupler selects MOC3022, MOC3052 and the like, a driving current of 20mA is needed; when the alternating current trigger optocoupler selects MOC3023, MOC3053 and the like, 10mA of driving current is needed.

Fig. 16 shows an embodiment 3 of the a-phase trigger gate control circuit, and compensation control is performed on the a-phase main circuit in the embodiment 2 of the self-coupled compensation type three-phase main circuit unit in fig. 4, wherein the fluctuation range of the a-phase ac power supply phase voltage is 220V + 10% to 220V-20%, and the a-phase ac power supply phase voltage is required to be stabilized within the range of 220V ± 2% for output. In fig. 16, the a-phase trigger gate control value Y21-Y210 input by the a-phase trigger gate control circuit is active at high level, 20 diodes D01-D92, trigger gate control column lines Y21-Y210, and trigger driving row lines VK1-VK8 form a diode trigger gate matrix, and resistors RS1-RS8 and transistors VS1-VS8 form a driving circuit for a-phase trigger control signals P51-P58, that is, at this time, the a-phase trigger control signal P5A is formed by P51-P58.

Table 2 is a trigger gating control function table of the a-phase trigger gating control circuit in embodiment 3, and lists 10 effective bits in the 10-bit a-phase trigger gating control value, that is, the on-off combination state of the bidirectional thyristors in the a-phase thyristor switch group corresponding to the 10 effective a-phase trigger gating control values. The 10 effective A-phase trigger gating control values correspond to the voltage levels of 1-10, and the A-phase trigger gating control circuit controls the on-off state of the bidirectional thyristor in the A-phase main circuit embodiment 2 to perform corresponding voltage compensation according to the A-phase trigger gating control values; in table 2, 1 represents that the corresponding triac needs to be in the on state, and 0 represents that the corresponding triac needs to be in the off state. The diode-triggered gating matrix of fig. 16 is functionally connected as required in table 2, controlled by phase a triggered gating control values Y21-Y210; for example, when the input voltage is at voltage level 7, that is, Y27 is at high level, diodes D71 and D72 in the trigger gating matrix are turned on, transistors VS7 and VS8 are controlled to be turned on to trigger and drive row lines VK7 and VK8 to be at high level respectively, so that thyristors SR7 and SR8 are effectively turned on by P57 and P58, and other diodes in the trigger gating matrix are turned off to turn off other thyristors, thereby realizing 0-voltage compensation, that is, the field coil voltage of TB1 is 0; when the input voltage is at a voltage level of 8, namely Y28 is effectively at a high level, diodes D81 and D82 in the trigger gating matrix are switched on, triodes VS2 and VS3 are respectively controlled to be switched on by triggering and driving row lines VK2 and VK3 to be at a high level, so that the P52 and P53 effectively switch on the bidirectional thyristors SR2 and SR3, other diodes in the trigger gating matrix are switched off, other bidirectional thyristors are switched off, and the reverse output voltage U12 is only adopted to carry out reverse compensation on the excitation coil voltage of the TB 1; when the input voltage is in a voltage class of 9, namely Y29 is effectively in a high level, diodes D91 and D92 in the trigger gating matrix are conducted, triodes VS6 and VS7 are respectively controlled to be conducted by the trigger driving row lines VK6 and VK7 in a high level, so that the P56 and P57 effectively turn on the bidirectional thyristors SR6 and SR7, other diodes in the trigger gating matrix are turned off, other bidirectional thyristors are turned off, and the reverse output voltage U34 is only used for carrying out reverse compensation on the excitation coil voltage of the TB 1; when the input voltage is in a voltage level of 10, namely Y210 is effectively in a high level, diodes D01 and D02 in the trigger gating matrix are conducted, triodes VS4 and VS5 are respectively controlled to be conducted by trigger driving row lines VK4 and VK5 to be in a high level, so that the P54 and P55 effectively turn on the bidirectional thyristors SR4 and SR5, other diodes in the trigger gating matrix are turned off, other bidirectional thyristors are turned off, and the reverse output voltage U23 is only used for carrying out reverse compensation on the excitation coil voltage of TB 1; when the input voltage is at voltage level 6, namely Y26 is effectively at high level, diodes D61 and D62 in the trigger gating matrix are switched on, triodes VS1 and VS4 are respectively controlled to be switched on by the trigger driving row lines VK1 and VK4 at high level, so that the P51 and P54 effectively turn on the bidirectional thyristors SR1 and SR4, other diodes in the trigger gating matrix are switched off, other bidirectional thyristors are switched off, and the output voltage U12 is only used for forward compensation of the excitation coil voltage of TB 1; when the input voltage is in a voltage level of 4, namely Y24 is effectively in a high level, diodes D41 and D42 in the trigger gating matrix are conducted, triodes VS3 and VS6 are respectively controlled to be conducted by the trigger driving row lines VK3 and VK6 in a high level, so that the P53 and P56 effectively turn on the bidirectional thyristors SR3 and SR6, other diodes in the trigger gating matrix are turned off, other bidirectional thyristors are turned off, and the output voltage U23 is only used for forward compensation of the excitation coil voltage of TB 1; when the input voltage is in a voltage class of 3, namely Y23 is effectively in a high level, diodes D31 and D32 in a trigger gating matrix are switched on, triodes VS1 and VS6 are respectively controlled to be switched on by triggering and driving row lines VK1 and VK6 to be in a high level, so that the P51 and the P56 effectively turn on the bidirectional thyristors SR1 and SR6, other diodes in the trigger gating matrix are switched off, other bidirectional thyristors are switched off, and the output voltage U12+ U23 is used as excitation coil voltage of the TB1 for forward compensation; when the input voltage is in a voltage level 1, namely Y21 is effectively in a high level, diodes D11 and D12 in a trigger gating matrix are conducted, triodes VS1 and VS8 are respectively controlled to be conducted by the trigger driving row lines VK1 and VK8 in a high level, so that the P51 and P58 effectively turn on the bidirectional thyristors SR1 and R8, other diodes in the trigger gating matrix are cut off, other bidirectional thyristors are turned off, and the output voltage U12+ U23+ U34 is used for forward compensation of the excitation coil voltage of TB 1; and so on.

TABLE 2

When the a-phase trigger gate control value Y21-Y210 in table 2 is active low, the method of the embodiment 2 of the a-phase trigger gate control circuit in fig. 15 can be also followed, and a trigger gate matrix is composed of 20 diodes D01-D92, trigger gate control column lines Y21-Y210, and trigger control row lines P51-P58, and the trigger gate matrix directly outputs the active low-level a-phase trigger control signals P51-P58. At this time, the low level in the phase-A triggering gating control value Y21-Y210 also needs to directly drive the input end light emitting diodes of the 2 alternating current triggering optocouplers to emit light; when the alternating current trigger optocoupler selects MOC3022, MOC3052 and the like, a driving current of 20mA is needed; when the alternating current trigger optocoupler selects MOC3023, MOC3053 and the like, 10mA of driving current is needed.

Fig. 17 shows an embodiment of an a-phase error detection and determination circuit, which determines the a-phase trigger strobe control value P3A, i.e. the high level valid 10 bits Y21-Y210, and outputs an a-phase trigger strobe control value determination signal P7A with valid high level and invalid low level; that is, the output P7A is 1, indicating that the a-phase trigger gate control value P3A is valid; the output P7A is 0, indicating that the A-phase trigger gate control value P3A is invalid. In FIG. 17, the full adder FJ1-FJ8 constitutes a circuit for counting the number of "1" in the 10-bit phase A trigger strobe control values Y21-Y210; wherein n2 and n1 are the number statistical values of '1' in Y21-Y23, m2 and m1 are the number statistical values of '1' in Y24-Y26, j3, j2 and j1 are the number statistical values of '1' in Y21-Y27, and q4, q3, q2 and q1 are the number statistical values of '1' in Y21-Y210. The AND gate FY20 judges the number statistical values q4, q3, q2 and q1 of ' 1 ' in Y21-Y210, only when q4, q3, q2 and q1 are respectively 0, 0 and 1, the output A-phase trigger gating control value judgment signal P7A is valid, namely P7A is 1, which means that only 1 ' exists in 10-bit A-phase trigger gating control values Y21-Y210, namely only one bit of the output is high level, and the A-phase trigger gating control value is valid; when the output a-phase trigger gate control value decision signal P7A is invalid, i.e., P7A is 0, it indicates that there are not 1 "in the 10-bit a-phase trigger gate control values Y21-Y210, indicating that the a-phase trigger gate control value is invalid. If the effective 10-bit A-phase trigger gate control value Y21-Y210 at low level needs to be judged, only a stage of inverter needs to be added behind the input 10-bit A-phase trigger gate control value Y21-Y210, and the output q4, q3, q2 and q1 are the number statistical value of '0' in the 10-bit A-phase trigger gate control value Y21-Y210; similarly, only when q4, q3, q2 and q1 are respectively 0, 0 and 1, the a-phase trigger strobe control value discrimination signal P7A is enabled, i.e., P7A is 1, which means that only 1 "0" is provided in the 10-bit a-phase trigger strobe control values Y21-Y210, i.e., only one bit of the output is low, and the a-phase trigger strobe control value is enabled; when the output P7A is 0 inactive, it indicates that there are not 1 "0" in the 10-bit A-phase toggle strobe control values Y21-Y210, indicating that the A-phase toggle strobe control value is inactive.

If the AND gate FY20 in FIG. 17 is changed into a NAND gate, the phase A triggers the gating control value to judge that the signal is effective at low level and ineffective at high level; that is, the output P7A is 1, which indicates that the a-phase trigger gate control value P3A is invalid; the output P7A is 0, indicating that the A-phase trigger gate control value P3A is active.

When the a-phase trigger strobe control value P3A is 7 bits and it is necessary to determine the 7-bit a-phase trigger strobe control values Y21-Y27 that are active at high level, the method is to connect all Y28-Y210 in fig. 17 to 0, and determine whether the a-phase trigger strobe control values are active by determining whether q4, q3, q2, and q1 are 0, and 1. The second method is to remove the full adder FJ5-FJ8 in FIG. 17, and judge whether the A phase trigger gating control value is valid or not by using the number statistical values j3, j2 and j1 of '1' in Y21-Y27 as 0, 0 and 1; only when j3, j2 and j1 are respectively 0, 0 and 1, the signals indicate that only 1 'exists in the 7-bit A-phase trigger strobe control values Y21-Y27, namely only one bit of the output is high level, the A-phase trigger strobe control value is valid, the output P7A is 1, otherwise, the signals indicate that 1' does not exist in the 7-bit A-phase trigger strobe control values Y21-Y27, the A-phase trigger strobe control value is invalid, and the output P7A is 0. The logic devices such as the full adder, the NAND gate and the like in the circuit diagram of FIG. 17 are all powered by a single power supply + VCC 1.

The A-phase error detection judging circuit has the function of enabling the output A-phase trigger gating control value judging signal P7A to be effective when judging that only one of M bits of the A-phase trigger gating control value P3A is effective, and enabling the output A-phase trigger gating control value judging signal P7A to be ineffective if not; that is, when not only one of the M bits of the a-phase trigger strobe control value P3A is active or when no one is active, the a-phase trigger strobe control value determination signal P7A is made inactive. The logic functions may also be implemented in other ways, for example in ROM memory, or in a combination of and, or, not logic gates.

The phase B and phase C error detection discrimination circuits adopt the same phase A error detection discrimination circuit. The function of the B-phase error detection judging circuit is to enable the output B-phase trigger gating control value judging signal P7B to be effective when judging that only one of M bits of the B-phase trigger gating control value P3B is effective, or to enable the output B-phase trigger gating control value judging signal P7B to be ineffective; the function of the C-phase error detection and determination circuit is to enable the output C-phase trigger strobe control value determination signal P7C when only one of the M bits of the C-phase trigger strobe control value P3C is determined to be valid, and to disable the output C-phase trigger strobe control value determination signal P7C otherwise.

Fig. 18 shows an embodiment of a protection driving unit, wherein the input a-phase, B-phase and B-phase trigger gate control value determination signals P7A, P7B and P7C are all set to be active at high level and inactive at low level; for example, a value of 1 in P7A indicates that the a-phase trigger strobe control value discrimination signal is active, and a value of 0 in P7A indicates that the a-phase trigger strobe control value discrimination signal is inactive. Setting the low level of input A-phase, B-phase and B-phase non-trigger area control signals P4A, P4B and P4C to be effective and the high level to be ineffective; for example, when P4A is 0, it indicates that there is fluctuation in the ac-phase-a phase current supply phase voltage, so that the a-phase trigger gating control value changes, and switching of the on-off state of the bidirectional thyristor in the a-phase thyristor switch group needs to be performed, so as to change the compensation mode; in the switching process, in order to avoid that 2 or more than 2 thyristors are simultaneously conducted in the thyristors at the same side due to the delayed turn-off factor of the bidirectional thyristors, and a power supply short circuit is caused, all the bidirectional thyristors in the phase a thyristor switch group are turned off in the effective period of the control signal of the non-trigger area, namely when the P4A of the embodiment is equal to 0.

In fig. 18, an and gate FY21, a transistor VT, a freewheeling diode VD, a resistor RK1, a relay coil KA, a relay coil KB, and a relay coil KC form a protection control circuit; the A-phase trigger circuit controlled power supply + VCCA control circuit consists of an AND gate FY22, a triode VK1, a triode VK2, a resistor RK2 and a resistor RK 3; the B-phase trigger circuit controlled power supply + VCCB control circuit is composed of an AND gate FY23, a triode VK3, a triode VK4, a resistor RK4 and a resistor RK 5; and the AND gate FY24, the triode VK5, the triode VK6, the resistor RK6 and the resistor RK7 form a C-phase trigger circuit controlled power supply + VCCC control circuit. The AND gates FY21, FY22, FY23 and FY24 are all powered by a single power supply + VCC 1; + VCC2 is the power supply for the relay coil and the source for the trigger circuit controlled power supply.

In fig. 18, when one of the input a-phase trigger gating control value determining signal P7A, B-phase trigger gating control value determining signal P7B, and C-phase trigger gating control value determining signal P7C is at a low level, that is, one of the a-phase trigger gating control value, B-phase trigger gating control value, and C-phase trigger gating control value is invalid, the output P7K of the and gate FY21 is at a low level, the control transistor VT is turned off, and the relay coil KA is de-energized, so that the self-coupled compensation three-phase main circuit unit embodiment 1 in fig. 3 or the relay normally open switch KA-1 in the self-coupled compensation three-phase main circuit unit embodiment 2 in fig. 4 is turned off, that is, the input-side supply voltage of the self-coupled transformer is controlled to be turned off, and the voltage between all taps of the self-coupled transformer is set to be 0, thereby protecting the thyristor; the normally closed relay switch KA-2 is closed, and the voltage applied to the excitation coil of TB1 is set to 0. And the triode VT is cut off, and simultaneously the relay coil KB and the relay coil KC are controlled to lose power, so that corresponding relay switches in the B-phase main circuit and the C-phase main circuit execute the same action as the relay switch of the A-phase main circuit, and the B-phase thyristor switch group and the C-phase thyristor switch group are protected. The output P7K of the AND gate FY21 is low level, meanwhile, the AND gates FY22, FY23 and FY24 output low level, the triodes VK1, VK2, VK3, VK4, VK5 and VK6 are all cut off, the controlled power supplies + VCCA, + VCCB and + VCCC are all power-off, and the A-phase trigger circuit, the B-phase trigger circuit and the C-phase trigger circuit in the trigger unit do not work because of no power supply, namely, trigger pulses for triggering the bidirectional thyristor are not all sent out. Therefore, as long as one phase of the three-phase trigger gating control value is invalid, the protection driving unit cuts off the power supply of the trigger unit no matter whether the input three-phase non-trigger area control signal is valid or not, stops sending out the trigger pulse of all the bidirectional thyristors, and simultaneously controls and disconnects the input side power supply voltage of the three-phase autotransformer, thereby realizing the protection of the three-phase thyristor switch group.

In fig. 18, when the input a-phase trigger gate control value determination signal P7A, B-phase trigger gate control value determination signal P7B, and C-phase trigger gate control value determination signal P7C are all at high level, that is, the a-phase trigger gate control value, B-phase trigger gate control value, and C-phase trigger gate control value are all valid, the output P7K of the and gate FY21 is at high level, the transistor VT is turned on, and the relay coil KA is controlled to be electrically coupled, so that the compensation type three-phase main circuit unit embodiment 1 in fig. 3, or the relay normally open switch KA-1 in the compensation type three-phase main circuit unit embodiment 2 in fig. 4 is turned on, the relay normally closed switch KA-2 is turned off, and the circuit is in the compensation working state. And the triode VT is conducted, and meanwhile, the relay coil KB and the relay coil KC are controlled to be electrified, so that corresponding relay switches in the B-phase main circuit and the C-phase main circuit execute the same action as the relay switch of the A-phase main circuit, and the B-phase thyristor switch group and the C-phase thyristor switch group are in a compensation working state.

In fig. 18, when all three-phase trigger gating control values are active, P7K is at a high level, when the control signal of the phase a non-trigger area is active, that is, when P4A is equal to 0, the and gate FY22 outputs a low level, the triodes VK1 and VK2 are turned off, the controlled power supply + VCCA is de-energized, the phase a trigger circuit does not work, that is, the trigger pulse for triggering the triac in the phase a thyristor switch group is not emitted, all the triacs in the phase a thyristor switch group are turned off, which indicates that the phase voltage of the phase a ac power supply fluctuates at this time, so that the phase a trigger gating control value changes, and the on-off state of the triacs in the phase a thyristor switch group needs to be switched, and the. When the three-phase trigger gating control values are all effective and the P7K is at a high level, when the control signal of the A-phase non-trigger area is ineffective, namely P4A is equal to 1, the AND gate FY22 outputs a high level, the triodes VK1 and VK2 are both conducted, the controlled power supply + VCCA is electrified, the A-phase trigger circuit works normally, the A-phase trigger gating control circuit selects the corresponding A-phase trigger control signal to be effective according to the effective A-phase trigger gating control value corresponding to a certain voltage grade interval, so that the A-phase trigger circuit sends out trigger pulses to control the on-off state of the bidirectional thyristors in the A-phase thyristor switch group, and the A-phase main circuit is in a compensation working state corresponding to the voltage grade interval.

In fig. 18, when all three-phase trigger gating control values are active and P7K is at a high level, when a B-phase non-trigger zone control signal is active, that is, P4B is equal to 0, the and gate FY23 outputs a low level, the triodes VK3 and VK4 are turned off, the controlled power supply + VCCB loses power, the B-phase trigger circuit does not work, that is, a trigger pulse for triggering the bidirectional thyristors in the B-phase thyristor switch group is not sent out, all the bidirectional thyristors in the B-phase thyristor switch group are turned off, which indicates that at this time, a phase voltage of the B-phase ac power supply fluctuates, so that the B-phase trigger gating control value changes, and switching of the on-off states of the bidirectional thyristors in the B-phase thyristor switch group is. When the three-phase trigger gating control values are all effective and the P7K is at a high level, when the control signal of the B-phase non-trigger area is ineffective, namely P4B is equal to 1, the AND gate FY23 outputs a high level, the triodes VK3 and VK4 are both conducted, the controlled power supply + VCCB is electrified, the B-phase trigger circuit works normally, the B-phase trigger gating control circuit selects the corresponding B-phase trigger control signal to be effective according to the effective B-phase trigger gating control value corresponding to a certain voltage grade interval, so that the B-phase trigger circuit sends out trigger pulses to control the on-off state of the bidirectional thyristors in the B-phase thyristor switch group, and the B-phase main circuit is in a compensation working state corresponding to the voltage grade interval.

In fig. 18, when all three-phase trigger gating control values are active and P7K is at a high level, when a C-phase non-trigger zone control signal is active, that is, P4C is equal to 0, the and gate FY24 outputs a low level, the triodes VK5 and VK6 are turned off, the controlled power supply + VCCC loses power, the C-phase trigger circuit does not work, that is, a trigger pulse for triggering the bidirectional thyristors in the C-phase thyristor switch group is not sent out, all the bidirectional thyristors in the C-phase thyristor switch group are turned off, which indicates that at this time, the phase voltage of the C-phase ac power supply fluctuates, so that the C-phase trigger gating control value changes, and the on-off state of the bidirectional thyristors in the C-phase thyristor switch group needs to be. When the three-phase trigger gating control values are all effective and the P7K is at a high level, when the control signal of the C-phase non-trigger area is ineffective, namely P4C is equal to 1, the AND gate FY24 outputs a high level, the triodes VK5 and VK6 are both conducted, the controlled power supply + VCCC is electrified, the C-phase trigger circuit works normally, the C-phase trigger gating control circuit selects the corresponding C-phase trigger control signal to be effective according to the effective C-phase trigger gating control value corresponding to a certain voltage grade interval, so that the C-phase trigger circuit sends out trigger pulses to control the on-off state of the bidirectional thyristors in the C-phase thyristor switch group, and the C-phase main circuit is in a compensation working state corresponding to the voltage grade interval.

When one phase of trigger gating control value is invalid in the three-phase trigger gating control values, the protection driving unit sends a protection control signal to the three-phase main circuit to enable the three-phase thyristor switch group to be in a protection state, the rail transit three-phase alternating current voltage stabilizer does not compensate input voltage, and the voltage output by the voltage stabilizer is the voltage of the input three-phase alternating current power supply. When the thyristor switch group is in a protection state, if the three-phase trigger gating control values are all restored to be effective signals, the protection driving unit automatically stops the protection state of the three-phase thyristor switch group, and the three-phase thyristor switch group is in a compensation working state again.

As can be known from the above embodiments and the working processes thereof, when the input is an effective trigger gating control value, the phase trigger gating control circuit ensures that thyristors at the same side in the thyristor switch group of the current phase are not conducted at the same time, thereby realizing the interlocking control of the thyristors; when the trigger gating control value is invalid, the protection driving unit cuts off the power supply of the trigger unit rapidly, and on the basis of avoiding short circuit caused by error conduction of the bidirectional thyristor, the power supply voltage of the input side of all the autotransformers in three phases is cut off simultaneously, so that the three-phase thyristor switch group is in a protection state. When the three-phase thyristor switch group is in the protection state, if the three-phase error detection judging circuit judges that the three-phase alternating current voltage stabilizer of the rail transit reenters the normal logic control state, namely when the three-phase error detection judging circuit judges that all the three-phase trigger gating control values are recovered to be effective signals, the protection state of the three-phase thyristor switch group can be automatically stopped and the three-phase thyristor switch group is in the compensation working state again. The function effectively strengthens the protection force of the rail transit three-phase alternating current voltage stabilizer against the abnormity of the working process, so that the rail transit three-phase alternating current voltage stabilizer is more reliable in working.

Besides the technical features described in the specification, other technologies of the rail transit three-phase alternating current voltage stabilizer are conventional technologies which are mastered by a person skilled in the art.

Claims

1. The utility model provides a track traffic three-phase alternating current stabiliser which characterized in that: the self-coupling compensation type three-phase main circuit unit comprises a self-coupling compensation type three-phase main circuit unit, a compensation control unit, a trigger unit and a protection driving unit;

each phase main circuit of the self-coupling compensation type three-phase main circuit unit comprises a compensation transformer, a self-coupling transformer, a thyristor switch group and a relay protection circuit;

the compensation control unit outputs a three-phase trigger control signal to the trigger unit; the trigger unit sends a three-phase trigger signal to the self-coupling compensation type three-phase main circuit unit according to an input three-phase trigger control signal to control the on-off of the thyristors in the three-phase thyristor switch group; the compensation control unit simultaneously outputs a three-phase non-triggering area control signal and a three-phase triggering gating control value judging signal to the protection driving unit, the protection driving unit stops/starts protection of the three-phase thyristor switch group according to whether the input three-phase triggering gating control value judging signal is effective or not, and controls a power supply of the triggering unit according to whether the three-phase triggering gating control value judging signal is effective or not and whether the three-phase non-triggering area control signal is effective or not;

the compensation control unit consists of three compensation control circuits with the same structure; the three compensation control circuits respectively carry out voltage sampling on the voltages of the three-phase alternating current power supply and output three-phase trigger control signals, three-phase non-trigger area control signals and three-phase trigger gating control value judging signals;

in each phase, the compensation control circuit comprises a sampling comparison circuit, a delay protection circuit, a trigger gating control circuit and an error detection judging circuit; the sampling comparison circuit samples the voltage of the alternating current power supply phase voltage and outputs a trigger gating control value; the delay protection circuit inputs a trigger gating control value and outputs a delayed trigger gating control value and a non-trigger area control signal; the trigger gating control circuit inputs the delayed trigger gating control value and outputs a trigger control signal; the error detection judging circuit judges whether the delayed trigger gating control value is effective or not and outputs a trigger gating control value judging signal;

in each phase, the trigger gating control value is an M-bit binary value; the error detection judging circuit judges whether the delayed trigger gating control value is effective or not according to the condition that the trigger gating control value is effective when only one bit is effective in M-bit binary values of the trigger gating control value; otherwise, triggering the gating control value to be invalid; m is an integer greater than or equal to 2;

the specific method for stopping/starting the protection of the three-phase thyristor switch group by the protection driving unit according to the fact that whether the input three-phase trigger gating control value judging signal is effective is that when one or more of the three-phase trigger gating control value judging signals are ineffective, the input side power supply voltage of all autotransformers in three phases is controlled to be cut off to enable the three-phase thyristor switch group to be in a protection state;

when one or more of the three-phase trigger gating control value judging signals are invalid, the protection driving unit controls to disconnect the power supply of the three-phase trigger circuit in the trigger unit.

2. The rail transit three-phase alternating current voltage regulator according to claim 1, characterized in that: in each phase, the voltage of the alternating current power supply phase voltage fluctuation interval range is divided into M voltage grade intervals, and the M voltage grade intervals correspond to the M trigger gating control values one by one.

3. The rail transit three-phase alternating current voltage regulator according to claim 2, characterized in that: in each phase, the voltage grade interval corresponds to the voltage compensation state one by one, and different voltage compensation states are controlled by different on-off combination states of thyristors in the thyristor switch group; the trigger gating control unit is used for selecting and enabling the corresponding trigger control signal to be effective through the diode trigger gating matrix according to the trigger gating control value, and controlling the on-off combination state of the thyristors in the thyristor switch group.

4. The rail transit three-phase alternating current voltage regulator according to claim 3, characterized in that: in each phase, the thyristor switch group has N thyristors; the diode triggering gating matrix comprises M triggering gating control column lines, N triggering driving row lines and a plurality of diodes; m triggering gating control column lines correspond to M bit triggering gating control values one by one, and one triggering gating control value correspondingly enables one triggering gating control column line signal to be effective; the N trigger driving row lines correspond to the N thyristors one by one, and the effective correspondence of a trigger driving row line signal enables a trigger control signal of one thyristor to be effective; when each trigger gating control column line signal is effective, the on-off combination state of the thyristor in the corresponding thyristor switch group is controlled; when each trigger gating control column line is effective, a diode is arranged between the trigger driving row lines which are in a corresponding on-off combination state and need to control the conduction of the thyristor for connection, and when a certain trigger gating control column line is effective, the diode enables the trigger driving row line signals which need to control the conduction of the thyristor to be effective; and N is an integer greater than or equal to 4.

5. The rail transit three-phase alternating current voltage regulator according to any one of claims 1 to 4, characterized in that: in each phase, controlling a control signal of the non-trigger area to output a single pulse after a trigger gating control value is changed; the no-trigger area control signal is active during the output of a single pulse and inactive during the non-output of a single pulse.

6. The rail transit three-phase alternating current voltage regulator of claim 5, wherein: in each phase, in the delay protection circuit, the change time of the delayed trigger gating control value signal is later than the leading edge time of a single pulse in the non-trigger area control signal after the trigger gating control value is changed and is earlier than the trailing edge time of the single pulse in the non-trigger area control signal after the trigger gating control value is changed.

7. The rail transit three-phase alternating current voltage regulator according to any one of claims 1 to 4, characterized in that:

the specific method for protecting the driving unit to control the power supply of the triggering unit according to whether the three-phase triggering gating control value judging signal is effective or not and whether the three-phase non-triggering area control signal is effective or not is that when the three-phase triggering gating control value judging signal is all effective, the non-triggering area control signal is effective in each phase, the power supply of the corresponding triggering circuit in the triggering unit is disconnected, otherwise, the power supply of the corresponding triggering circuit in the triggering unit is connected.