CN109243391A - Pixel-driving circuit and display panel - Google Patents
Pixel-driving circuit and display panel Download PDFInfo
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- CN109243391A CN109243391A CN201811206676.0A CN201811206676A CN109243391A CN 109243391 A CN109243391 A CN 109243391A CN 201811206676 A CN201811206676 A CN 201811206676A CN 109243391 A CN109243391 A CN 109243391A
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- 230000008878 coupling Effects 0.000 claims abstract description 25
- 238000010168 coupling process Methods 0.000 claims abstract description 25
- 238000005859 coupling reaction Methods 0.000 claims abstract description 25
- 230000001808 coupling effect Effects 0.000 claims abstract description 19
- 230000001629 suppression Effects 0.000 claims abstract description 18
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 15
- 230000005611 electricity Effects 0.000 claims description 12
- 239000013078 crystal Substances 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
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- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
- G09G3/3655—Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Liquid Crystal Display Device Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The application provides a kind of pixel-driving circuit, it include: the first transistor, the first end of the first transistor is connect with data line, the second end of the first transistor is connect with the first end of switching node, the first end of liquid crystal capacitance, the first end of storage capacitance and the first coupled capacitor, and the control terminal of the first transistor is connect with the second end of scan line and the first coupled capacitor;Suppression module is coupled, is connect with switching node, and accesses one and the opposite polarity inversion signal of scanning signal in scan line, for generating first voltage under the control of inversion signal to switching node.Pixel-driving circuit provided by the present application, pass through one coupling suppression module of setting, the coupling suppression module is connect with switching node, and access one and the opposite polarity inversion signal of scanning signal in scan line, for generating first voltage under the control of inversion signal to switching node, to inhibit influence of the capacitance coupling effect to pixel voltage, and then improve the display performance of display panel.
Description
Technical field
This application involves field of display technology more particularly to a kind of pixel-driving circuits and display panel.
Background technique
Liquid crystal display panel is widely used in various electronic display units with the features such as its power saving, Low emissivity, soft light
On.Liquid crystal display panel mainly includes multiple pixels of array distribution, and each pixel includes liquid crystal capacitance, is set between liquid crystal capacitance
It is equipped with liquid crystal molecule, can change liquid crystal molecule arrangement state by changing the voltage between two electrode of liquid crystal capacitance, to change
Become the display brightness of the pixel.
In the related technology, data line is connected to the source electrode of transistor, and scan line is connected to the grid of transistor, in scan line
Control under, data line sends data-signal in each pixel of pixel array line by line, to each pixel liquid crystal electricity
Capacity charge, to control the display state of each pixel.
However, due to capacitance coupling effect, data line write-in can be made set when transistor becomes pass by opening
Pixel voltage is changed after transistor closing, first is that deviateing the original desired grayscale showed of write-in voltage, second is that making original
Carry out the data line write-in symmetrical voltage deviation of positive-negative polarity size, and generates direct current residual effect.
Summary of the invention
The application provides a kind of pixel-driving circuit and display panel, is able to suppress capacitance coupling effect to pixel voltage
It influences, and then improves the display performance of display panel.
The application provides a kind of pixel-driving circuit, comprising:
The first end of the first transistor, the first transistor is connect with data line, the second end of the first transistor
It is connect with the first end of switching node, the first end of liquid crystal capacitance, the first end of storage capacitance and the first coupled capacitor, it is described
The control terminal of the first transistor is connect with the second end of scan line and first coupled capacitor, and the second of the liquid crystal capacitance
The second end of end and the storage capacitance accesses public electrode voltages;
Suppression module is coupled, the coupling suppression module is connect with the switching node, and accesses one and the scan line
On the opposite polarity inversion signal of scanning signal, for generating first voltage under the control of the inversion signal to the coupling
Close node.
In pixel-driving circuit described herein, the coupling suppression module includes second transistor and the second coupling
Capacitor;
The first end of the first end of the second transistor, second end and second coupled capacitor is coupled with described
The second end of node connection, the control terminal of the second transistor and the inversion signal and second coupled capacitor connects
It connects.
In pixel-driving circuit described herein, the first transistor is N-type transistor, the second transistor
For N-type transistor.
It, can be by adjusting the length-width ratio of the first transistor and described in pixel-driving circuit described herein
The length-width ratio of two-transistor, so that the capacitance of first coupled capacitor is equal to the capacitance of second coupled capacitor.
In pixel-driving circuit described herein, the length-width ratio of the second transistor is less than the first transistor
Length-width ratio.
In pixel-driving circuit described herein, the coupling suppression module includes third transistor and third coupling
Capacitor;
The first end of the third transistor is connect with the data line, the second end of the third transistor and described
The first end of third coupled capacitor is connect with the switching node, the control terminal of the third transistor and the inversion signal
And the second end connection of the third coupled capacitor.
In pixel-driving circuit described herein, the first transistor is N-type transistor, the third transistor
For P-type transistor.
In pixel-driving circuit described herein, the length-width ratio of the third transistor is equal to the first transistor
Length-width ratio.
In pixel-driving circuit described herein, in the change in polarity of the scanning signal, first coupling
Capacitor generates second voltage to the switching node by capacitance coupling effect;The wherein first voltage and the second voltage
Polarity it is opposite.
The application also provides a kind of display panel comprising pixel-driving circuit as described above.
The application's has the beneficial effect that pixel-driving circuit provided by the present application, should by one coupling suppression module of setting
Coupling suppression module is connect with switching node, and accesses one and the opposite polarity inversion signal of scanning signal in scan line, is used
In generation first voltage is to switching node under the control of inversion signal, to inhibit capacitance coupling effect to the shadow of pixel voltage
It rings, and then improves the display performance of display panel.
Detailed description of the invention
It, below will be to embodiment or the prior art in order to illustrate more clearly of embodiment or technical solution in the prior art
Attached drawing needed in description is briefly described, it should be apparent that, the accompanying drawings in the following description is only some of application
Embodiment for those of ordinary skill in the art without creative efforts, can also be attached according to these
Figure obtains other attached drawings.
Fig. 1 is the structural schematic diagram of pixel-driving circuit provided by the present application;
Fig. 2 is the timing diagram of part signal in pixel-driving circuit provided by the present application;
Fig. 3 is the first circuit diagram of pixel-driving circuit provided by the present application;
Fig. 4 is the second circuit schematic diagram of pixel-driving circuit provided by the present application.
Specific embodiment
Presently filed embodiment is described below in detail, the example of the embodiment is shown in the accompanying drawings, wherein from beginning
Same or similar element or element with the same or similar functions are indicated to same or similar label eventually.Below by ginseng
The embodiment for examining attached drawing description is exemplary, and is only used for explaining the application, and should not be understood as the limitation to the application.
In the description of the present application, term " first ", " second " are used for description purposes only, and should not be understood as instruction or dark
Show relative importance or implicitly indicates the quantity of indicated technical characteristic.The feature of " first ", " second " is defined as a result,
It can explicitly or implicitly include one or more feature.In the description of the present application, the meaning of " plurality " is
Two or more, unless otherwise specifically defined.
Following disclosure provides many different embodiments or example is used to realize the different structure of the application.In order to
Simplify disclosure herein, hereinafter the component of specific examples and setting are described.Certainly, they are merely examples, and
And purpose does not lie in limitation the application.In addition, the application can in different examples repeat reference numerals and/or reference letter,
This repetition is for purposes of simplicity and clarity, itself not indicate between discussed various embodiments and/or setting
Relationship.
Fig. 1, Fig. 2 are please referred to, Fig. 1 is the structural schematic diagram of pixel-driving circuit provided by the present application;Fig. 2 mentions for the application
The timing diagram of part signal in the pixel-driving circuit of confession.As shown in Figure 1, Figure 2, the pixel-driving circuit of the application includes:
The first end of the first transistor T1, the first transistor T1 are connect with data line D, the second end of the first transistor T1 with couple
Node A, liquid crystal capacitance CLCFirst end, the connection of the first end of the first end of storage capacitance Cs and the first coupled capacitor C1, should
The control terminal of the first transistor T1 is connect with the second end of scan line G and the first coupled capacitor C1, liquid crystal capacitance CLCSecond
The second end of end and storage capacitance Cs access public electrode voltages.
Specifically, the scanning signal on scan line G reaches the control terminal of the first transistor T1 within the t1-t2 period, make
It obtains the first transistor T1 to open, with same at this point, the pixel that the data-signal on data line D is set by the first transistor T1 write-in
Voltage;However, at the t2 moment, scanning signal G1 change in polarity on scan line G, the first coupled capacitor C1 passes through capacitive coupling and imitates
Second voltage V2 to switching node A should be generated, that is, the scanning signal G1 on scan line G becomes low level from high level, due to
The second end of first coupled capacitor C1 is connect with scan line G, and the first end of the first coupled capacitor C1 is connect with switching node A,
Voltage when scanning signal G1 on scan line G becomes low level from high level, under capacitance coupling effect, on switching node A
Also corresponding change occurs, the ash of performance desired by the pixel voltage that was written originally can be deviateed so as to cause the pixel voltage of write-in
Rank.
Please continue to refer to Fig. 1, it is based on this, pixel-driving circuit provided by the present application further include: coupling suppression module 101,
The coupling suppression module 101 is connect with switching node A, and it is opposite polarity anti-with the scanning signal G1 on scan line G to access one
Phase signals M, for generating first voltage under the control of inversion signal M to switching node A.
Wherein, the first voltage and the polarity of second voltage V2 are on the contrary, that is, the pixel circuit of the application passes through in t1
It carves and generates one and the opposite polarity first voltage of second voltage V2, so as to inhibit the coupling effect pair of the first coupled capacitor C1
The influence of the setting voltage of write-in.
Incorporated by reference to Fig. 1, Fig. 3, Fig. 3 is the first circuit diagram of pixel-driving circuit provided by the present application.In conjunction with Fig. 1,
Shown in Fig. 3, the coupling suppression module 101 in the pixel-driving circuit of the application includes: the coupling electricity of second transistor T2 and second
Hold C2;The first end of the first end of second transistor T2, second end and the second coupled capacitor C2 connects with switching node A
It connects, the control terminal of second transistor T2 is connect with the second end of inversion signal M and the second coupled capacitor C2.Wherein, first
Transistor T1 is N-type transistor, and second transistor T2 is N-type transistor.
Specifically, incorporated by reference to Fig. 1, Fig. 2, Fig. 3, within the t1-t2 period, the height electricity of the scanning signal G1 on scan line G
It flates pass to the control terminal of the first transistor T1, so that the first transistor T1 is opened, and at this point, data-signal on data line D
Pass through the pixel voltage of the first transistor T1 write-in setting;Due to inversion signal M and scanning signal G1 polarity on the contrary, that is,
At the t1-t2 moment, the low level of inversion signal M reaches the control terminal of second transistor T2, and second transistor T2 is closed, thus not
It will affect being normally written for pixel voltage.
Scanning signal G1 change in polarity on the t2 moment, scan line G, the first coupled capacitor C1 pass through capacitance coupling effect
Second voltage V2 is generated to switching node, that is, the scanning signal G1 on scan line G becomes low level from high level, due to the
The second end of one coupled capacitor C1 is connect with scan line G, and the first end of the first coupled capacitor C1 is connect with switching node A, is being swept
Voltage when retouching the scanning signal G1 on line G becomes low level from high level, under capacitance coupling effect, on switching node A
Corresponding change occurs;At the t2 moment, inversion signal M change in polarity, the second coupled capacitor C2 generates the by capacitance coupling effect
One voltage is to switching node A, since the polarity of inversion signal M and scanning signal G1 is on the contrary, that is, when scanning signal G1 is by high electricity
Flat when becoming low level, inversion signal M becomes high level from low level, since the second end and reverse phase of the second coupled capacitor C2 are believed
Number M connection, the first end of the second coupled capacitor C2 are connect with switching node A, become high level from low level in inversion signal M
When, under capacitance coupling effect, corresponding change also occurs for the voltage on switching node A.Wherein, first voltage and second voltage V2
Polarity on the contrary, and can inhibit the coupling effect of the first coupled capacitor C1 to write-in setting voltage influence.
Further, the application can be by adjusting the length-width ratio of the first transistor T1 and the length and width of second transistor T2
Than so that the capacitance of the first coupled capacitor C1 be equal to the second coupled capacitor C2 capacitance so that at first electricity
Pressure is equal in magnitude with second voltage V2's.
Preferably, the length-width ratio of second transistor T2 is less than the length-width ratio of the first transistor T1, due to the first transistor
The charge of the injection of T1 will not be fully impregnated into switching node A, therefore the length-width ratio of second transistor T2 is less than the first transistor T1
Length-width ratio, with offset or mitigate charge injection influence.
Incorporated by reference to Fig. 1, Fig. 4, Fig. 4 is the second circuit schematic diagram of pixel-driving circuit provided by the present application.In conjunction with Fig. 1,
Shown in Fig. 4, the coupling suppression module 101 in the pixel-driving circuit of the application includes: third transistor T3 and third coupling C3
Capacitor;The first end of third transistor T3 is connect with data line D, and the second end and third of third transistor T3 couples electricity
The first end for holding C3 is connect with switching node A, and the control terminal of third transistor T3 couples electricity with inversion signal M and third
Hold the second end connection of C3.Wherein, the first transistor T1 is N-type transistor, and third transistor T3 is P-type transistor.
Specifically, incorporated by reference to Fig. 1, Fig. 2, Fig. 4, within the t1-t2 period, the height electricity of the scanning signal G1 on scan line G
It flates pass to the control terminal of the first transistor T1, so that the first transistor T1 is opened, and at this point, data-signal on data line D
Pass through the pixel voltage of the first transistor T1 write-in setting;Due to inversion signal M and scanning signal G1 polarity on the contrary, that is,
At the t1-t2 moment, the low level of inversion signal M reaches the control terminal of third transistor T3, and third transistor T3 is also opened, will not
Influence being normally written for pixel voltage.
Scanning signal G1 change in polarity on the t2 moment, scan line G, the first coupled capacitor C1 pass through capacitance coupling effect
Second voltage V2 to switching node A is generated, that is, the scanning signal G1 on scan line G becomes low level from high level, due to the
The second end of one coupled capacitor C1 is connect with scan line G, and the first end of the first coupled capacitor C1 is connect with switching node A, is being swept
Voltage when retouching the scanning signal G1 on line G becomes low level from high level, under capacitance coupling effect, on switching node A
Corresponding change occurs;At the t2 moment, inversion signal M change in polarity, third coupled capacitor C3 generates the by capacitance coupling effect
One voltage is to switching node A, since the polarity of inversion signal M and scanning signal G1 is on the contrary, that is, when scanning signal G1 is by high electricity
Flat when becoming low level, inversion signal M becomes high level from low level, since the second end and reverse phase of third coupled capacitor C3 are believed
Number M connection, the first end of third coupled capacitor C3 are connect with switching node A, become high level from low level in inversion signal M
When, under capacitance coupling effect, corresponding change also occurs for the voltage on switching node A.Wherein, first voltage and second voltage V2
Polarity on the contrary, and can inhibit the coupling effect of the first coupled capacitor C1 to write-in setting voltage influence.
Further, the application can be by adjusting the length-width ratio of the first transistor T1 and the length and width of third transistor T3
Than so that the capacitance of the first coupled capacitor C1 be equal to third coupled capacitor C3 capacitance so that at first electricity
Pressure is equal in magnitude with second voltage V2's.Preferably, the length-width ratio of third transistor T3 is equal to the length-width ratio of the first transistor T1.
The application also provides a kind of display panel comprising above-described pixel-driving circuit specifically can refer to above
Described, this will not be repeated here.
Pixel-driving circuit and display panel provided by the present application, by one coupling suppression module of setting, which inhibits
Module is connect with switching node, and accesses one and the opposite polarity inversion signal of scanning signal in scan line, in reverse phase
First voltage is generated under the control of signal to switching node, to inhibit influence of the capacitance coupling effect to pixel voltage, Jin Erti
The display performance of high display panel.
Although above preferred embodiment is not to limit in conclusion the application is disclosed above with preferred embodiment
The application processed, those skilled in the art are not departing from spirit and scope, can make various changes and profit
Decorations, therefore the protection scope of the application subjects to the scope of the claims.
Claims (10)
1. a kind of pixel-driving circuit characterized by comprising
The first end of the first transistor, the first transistor is connect with data line, the second end and coupling of the first transistor
The first end for closing node, the first end of liquid crystal capacitance, the first end of storage capacitance and the first coupled capacitor connects, and described first
The control terminal of transistor is connect with the second end of scan line and first coupled capacitor, the second end of the liquid crystal capacitance and
The second end of the storage capacitance accesses public electrode voltages;
Suppression module is coupled, the coupling suppression module is connect with the switching node, and is accessed in one and the scan line
The opposite polarity inversion signal of scanning signal is saved for generating first voltage to the coupling under the control of the inversion signal
Point.
2. pixel-driving circuit according to claim 1, which is characterized in that the coupling suppression module includes the second crystal
Pipe and the second coupled capacitor;
The first end of the first end of the second transistor, second end and second coupled capacitor with the switching node
Connection, the control terminal of the second transistor are connect with the second end of the inversion signal and second coupled capacitor.
3. pixel-driving circuit according to claim 2, which is characterized in that the first transistor is N-type transistor, institute
Stating second transistor is N-type transistor.
4. pixel-driving circuit according to claim 3, which is characterized in that can be by adjusting the length of the first transistor
The wide length-width ratio than with the second transistor, so that the capacitance of first coupled capacitor is equal to the second coupling electricity
The capacitance of appearance.
5. pixel-driving circuit according to claim 4, which is characterized in that the length-width ratio of the second transistor is less than institute
State the length-width ratio of the first transistor.
6. pixel-driving circuit according to claim 1, which is characterized in that the coupling suppression module includes third crystal
Pipe and third coupled capacitor;
The first end of the third transistor is connect with the data line, the second end of the third transistor and the third
The first end of coupled capacitor is connect with the switching node, the control terminal of the third transistor and the inversion signal and
The second end of the third coupled capacitor connects.
7. pixel-driving circuit according to claim 6, which is characterized in that the first transistor is N-type transistor, institute
Stating third transistor is P-type transistor.
8. pixel-driving circuit according to claim 7, which is characterized in that the length-width ratio of the third transistor is equal to institute
State the length-width ratio of the first transistor.
9. the pixel-driving circuit according to claim 2 or 6, which is characterized in that in the change in polarity of the scanning signal
When, first coupled capacitor generates second voltage to the switching node by capacitance coupling effect;Wherein first electricity
It presses opposite with the polarity of the second voltage.
10. a kind of display panel, which is characterized in that including such as described in any item pixel-driving circuits of claim 1-9.
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CN201811206676.0A CN109243391B (en) | 2018-10-17 | 2018-10-17 | Pixel driving circuit and display panel |
PCT/CN2018/116118 WO2020077724A1 (en) | 2018-10-17 | 2018-11-19 | Pixel drive circuit and display panel |
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CN201811206676.0A CN109243391B (en) | 2018-10-17 | 2018-10-17 | Pixel driving circuit and display panel |
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CN109243391B CN109243391B (en) | 2020-07-10 |
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TWI380110B (en) * | 2009-04-02 | 2012-12-21 | Au Optronics Corp | Pixel array, liquid crystal display panel, and electro-optical apparatus |
CN102608817B (en) * | 2012-03-26 | 2015-07-01 | 深圳市华星光电技术有限公司 | Liquid crystal display (LCD) device |
KR102248643B1 (en) * | 2014-12-30 | 2021-05-06 | 엘지디스플레이 주식회사 | Array Substrate For Liquid Crystal Display Device |
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- 2018-11-19 WO PCT/CN2018/116118 patent/WO2020077724A1/en active Application Filing
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CN1553268A (en) * | 2003-06-02 | 2004-12-08 | 友达光电股份有限公司 | Liquid-crystal displaying device and its internal sampling circuit |
US20090316100A1 (en) * | 2008-06-18 | 2009-12-24 | Toshiba Mobile Display Co., Ltd. | Liquid crystal display device |
CN101702065A (en) * | 2009-09-01 | 2010-05-05 | 深超光电(深圳)有限公司 | Pixel array |
CN102109692A (en) * | 2009-12-28 | 2011-06-29 | 财团法人交大思源基金会 | Liquid crystal display panel and scanning line compensation circuit thereof |
CN107463035A (en) * | 2017-08-02 | 2017-12-12 | 深圳市华星光电技术有限公司 | Liquid crystal display panel drive circuit |
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