CN109241692A - A kind of method and apparatus of data processing - Google Patents
A kind of method and apparatus of data processing Download PDFInfo
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- CN109241692A CN109241692A CN201811355161.7A CN201811355161A CN109241692A CN 109241692 A CN109241692 A CN 109241692A CN 201811355161 A CN201811355161 A CN 201811355161A CN 109241692 A CN109241692 A CN 109241692A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
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Abstract
This application discloses a kind of methods of data processing, comprising: obtains the first dielectric constant DK value, the first DK value is the test DK value of first medium layer;The 3rd DK value is calculated according to the 2nd DK value and the first DK value, the 2nd DK value is the reference DK value of first medium layer, and the 3rd DK value is the DK value of second dielectric layer;It is modeled according to the first DK value, the 3rd DK value and the 4th DK value, obtains computation model, the 4th DK value is the DK value of third dielectric layer;The impedance value of target conductor is calculated according to computation model.The embodiment of the present application also provides the equipment of corresponding data processing.Technical scheme is due to consideration that influence of the second dielectric layer to first medium layer dielectric constant, by the way that the dielectric constant of first medium layer, second dielectric layer and third dielectric layer is respectively used to Modeling Calculation, the impedance value of available accurate target conductor.
Description
Technical field
This application involves electrical characteristic analysis technical fields, and in particular to a kind of method and apparatus of data processing.
Background technique
Printed circuit board (printed circuit board, PCB) is also known as printed circuit board, is that one kind is widely used
Electronic component, be electronic component electrical connection carrier.
In hardware system, physical carrier and interconnecting channel of the PCB as Most electronic component, are hardware systems
Important component in design.The material composition of PCB includes preimpregnation material (prepreg, PP) and core plate (Core) etc., they
Electrical characteristic and thermal stability directly affect the performance of PCB.In the manufacturing process of PCB, due to PP medium in bonding processes
Resin glue can flow into copper wire gap, lead to the dielectric constant (dielectric constant, DK) of PP medium after molding
It changes with the reduction of gel content.Currently, due to when carrying out the analysis of PCB electrical characteristic, it will usually by this phenomenon
Ignore, causes between the numerical value and actual value for the PCB inner conductor impedance being calculated to give subsequent point there are certain deviation
Analysis brings potential risks.
Summary of the invention
The embodiment of the present application provides a kind of method and apparatus of data processing, and the impedance of the inner conductor applied to PCB is surveyed
It calculates, by being distinguished the media environment around PCB inner conductor in more detail, the dielectric constant of different medium layer is distinguished
For Modeling Calculation, the impedance value of available accurate PCB inner conductor.
In order to achieve the above object, the embodiment of the present application provides the following technical solutions:
The application first aspect provides a kind of method of data processing, can be applied to PCB, and the PCB includes first medium
Layer, second dielectric layer, third dielectric layer and target conductor, the target conductor are located at by the first medium layer, described second
In the media environment of dielectric layer and third dielectric layer composition;This method may include: to obtain the first DK value, the first DK
Value is the test DK value of the first medium layer;The 3rd DK value is calculated according to the 2nd DK value and the first DK value, it is described
2nd DK value is the reference DK value of the first medium layer, and the 3rd DK value is the DK value of the second dielectric layer;According to institute
It states the first DK value, the 3rd DK value and the 4th DK value to be modeled, obtains computation model, the 4th DK value is the third
The DK value of dielectric layer;The impedance value of the target conductor is calculated according to the computation model.
Optionally, with reference to the above first aspect, in the first possible implementation, the first DK value of the acquisition, packet
It includes: obtaining target thickness, the target thickness is the thickness of the first medium layer;Institute is calculated according to the target thickness
State the first DK value.
Optionally, with reference to the above first aspect or first aspect the first possible implementation, possible at second
In implementation, it is described modeled according to the first DK value, the 3rd DK value and the 4th DK value before, further includes: obtain
Target component is taken, the target component is the geometric parameter of the target conductor, and the target component is for being modeled.
Optionally, second of possible implementation with reference to the above first aspect, in the third possible implementation,
The target conductor includes the copper conductors of the PCB internal layer.
The application second aspect provides a kind of equipment of data processing, can be applied to PCB, and the PCB includes first medium
Layer, second dielectric layer, third dielectric layer and target conductor, the target conductor are located at by the first medium layer, described second
In the media environment of dielectric layer and third dielectric layer composition;The equipment may include: first acquisition unit, for obtaining the
One DK value, the first DK value are the test DK values of the first medium layer;First computing unit, for according to the 2nd DK value with
The 3rd DK value is calculated in the first DK value that the first acquisition unit obtains, and the 2nd DK value is the first medium layer
With reference to DK value, the 3rd DK value is the DK value of the second dielectric layer;Modeling unit, for according to the first acquisition unit
The 3rd DK value and the 4th DK value that first DK value of acquisition, first computing unit obtain are modeled, and computation model is obtained,
The 4th DK value is the DK value of the third dielectric layer;Second computing unit, based on being established according to the modeling unit
Calculate the impedance value that the target conductor is calculated in model.
Optionally, in conjunction with above-mentioned second aspect, in the first possible implementation, the first acquisition unit packet
It includes: obtaining module, for obtaining target thickness, the target thickness is the thickness of the first medium layer;Computing module is used for
The first DK value is calculated according to the target thickness that the acquisition module obtains.
Optionally, possible at second in conjunction with above-mentioned second aspect or second aspect the first possible implementation
In implementation, the equipment can also include: second acquisition unit, for the modeling unit establish the computation model it
Before, target component is obtained, the target component is the geometric parameter of the target conductor, and the target component is used for the modeling
Unit is modeled.
Optionally, in conjunction with second of possible implementation of above-mentioned second aspect, in the third possible implementation,
The target conductor includes the copper conductors of the PCB internal layer.
The application third aspect provides a kind of equipment of data processing, which includes: processor and memory;The storage
Device is for storing computer executed instructions, and when equipment operation, the computer which executes memory storage is executed
Instruction, so that the equipment executes the side of the data processing such as any one possible implementation of above-mentioned first aspect or first aspect
Method.
The application fourth aspect provides a kind of computer readable storage medium, is stored in the computer readable storage medium
Instruction, when run on a computer, allowing computer to execute above-mentioned first aspect or first aspect, any one can
The method for being able to achieve the data processing of mode.
The 5th aspect of the application provides a kind of computer program product comprising instruction, when run on a computer,
The method for allowing computer to execute the data processing of above-mentioned first aspect or first aspect any one possible implementation.
The 6th aspect of the application provides a kind of chip system, which includes processor, for supporting at the data
The equipment of reason realizes function involved in above-mentioned first aspect or first aspect any one possible implementation.In one kind
In possible design, chip system further includes memory, which is used to save the necessary program of equipment of the data processing
Instruction and data.The chip system, can be made of chip, also may include chip and other discrete devices.
The embodiment of the present application provides a kind of method and apparatus of impedance computation, due to by the media environment around target conductor
It is divided in more detail, media environment is divided into first medium layer, second dielectric layer and third dielectric layer, the second medium
Layer be in PCB manufacturing process first medium layer spill into target conductor gap part formed new dielectric layer, due to
Toward impedance computation method in, have ignored second dielectric layer influence caused by the dielectric constant of first medium layer, but
One dielectric layer and second dielectric layer carry out impedance computation as a whole, lead to the impedance value of target conductor being calculated
Inaccuracy, so by the way that the dielectric constant of first medium layer, second dielectric layer and third dielectric layer is respectively used to Modeling Calculation,
The impedance value of available accurate target conductor, solve ignore second dielectric layer influence cause impedance value calculate not
Accurate problem.
Detailed description of the invention
Fig. 1 is method one embodiment schematic diagram of data processing in the embodiment of the present application;
Fig. 2 is another embodiment schematic diagram of method of data processing in the embodiment of the present application;
Fig. 3 is equipment one embodiment schematic diagram of data processing in the embodiment of the present application;
Fig. 4 is another embodiment schematic diagram of equipment of data processing in the embodiment of the present application.
Specific embodiment
With reference to the accompanying drawing, embodiments herein is described, it is clear that described embodiment is only the application
The embodiment of a part, instead of all the embodiments.Those of ordinary skill in the art it is found that with figure Computational frame differentiation
With the appearance of new opplication scene, technical solution provided by the embodiments of the present application is equally applicable for similar technical problem.
The embodiment of the present application provides a kind of method and apparatus of impedance computation, by by the media environment around target conductor
It is divided into first medium layer, second dielectric layer and third dielectric layer in detail, which is first in PCB manufacturing process
Dielectric layer spills into the part in target conductor gap, due to having ignored second dielectric layer pair in previous impedance computation method
It is influenced caused by the dielectric constant of first medium layer, but first medium layer and second dielectric layer is hindered as a whole
Anti- calculating leads to the impedance value inaccuracy for the target conductor being calculated, so by by first medium layer, second dielectric layer
It is respectively used to Modeling Calculation with the dielectric constant of third dielectric layer, the impedance value of available accurate target conductor solves
Ignore the problem that the influence of second dielectric layer causes impedance value to calculate inaccuracy.
The description and claims of this application and term " first " in above-mentioned attached drawing, " second " etc. are for distinguishing
Similar object, without being used to describe a particular order or precedence order.It should be understood that the data used in this way are in appropriate feelings
It can be interchanged under condition, so that the embodiments described herein can be real with the sequence other than the content for illustrating or describing herein
It applies.In addition, term " includes " and " having " and their any deformation, it is intended that cover it is non-exclusive include, for example, packet
The process, method, system, product or equipment for having contained series of steps or module those of be not necessarily limited to be clearly listed step or
Module, but may include other steps being not clearly listed or intrinsic for these process, methods, product or equipment or
Module.Occur in this application to step carry out name perhaps number be not meant to must according to name or number
Indicated time/logic sequencing executes the step in method flow, and named or number process step can be with
Execution order is changed according to the technical purpose to be realized, as long as identical or similar technical effect can be reached.This Shen
Please appeared in module division, be a kind of division in logic, can have other division side when realizing in practical application
Formula, such as multiple modules can be combined into or are integrated in another system, or some features can be ignored or not executed, separately
Outside, shown or discussion mutual coupling, direct-coupling or communication connection can be through some interfaces, module
Between indirect coupling or communication connection can be electrical or other similar form, be not construed as limiting in the application.Also, make
It can be the separation that may not be physically for the module or submodule of separate part description, can be and may not be physics
Module, or can be distributed in multiple circuit modules, some or all of modules can be selected according to the actual needs
To realize the purpose of application scheme.
The embodiment of the present application can be applied to PCB, PP dielectric layer and Core dielectric layer be respectively PCB component part it
One, in the manufacturing process of PCB, since the resin glue of PP dielectric layer in bonding processes can be flowed into PP dielectric layer and Core medium
In the gap of copper conductors layer between layer, cause the dielectric constant of PP dielectric layer after molding due to the reduction of resin glue content
And change, resin glue content may be simply referred to as gel content, and the resin glue flowed into the gap of copper conductors layer forms one
New dielectric layer.In previous conductor layer impedance computation method, usually ignore the resin in the gap for flowing into copper conductors layer
Influence of the glue to the gel content of PP dielectric layer, directly by PP dielectric layer, preset dielectric constant is used for impedance computation originally, this
Exist although the impedance value of PCB inner conductor can be quickly calculated in method, between the numerical value and actual value certain
Error, can to subsequent PCB electrical characteristic analysis bring potential risks.Technical scheme by by PP dielectric layer,
Dielectric layer and Core dielectric layer in conductor layer are distinguished in detail, and the dielectric constant of three dielectric layers is respectively used to build
Mould calculates, the impedance value of available accurate PCB inner conductor.
Fig. 1 is method one embodiment schematic diagram of data processing in the embodiment of the present application.
As shown in Figure 1, method one embodiment of data processing includes: in the embodiment of the present application
101, the first DK value is obtained, the first DK value is the test DK value of first medium layer.
In the present embodiment, first medium layer is the PP dielectric layer in PCB, and the first DK value is the test DK of first medium layer
Value be actual test value, obtain the first DK value mode can be by obtain first medium layer thickness, to extrapolate
The gel content of first medium layer, and then calculate the DK value of first medium layer.
102, the 3rd DK value is calculated according to the 2nd DK value and the first DK value, the 2nd DK value is the ginseng of first medium layer
DK value is examined, the 3rd DK value is the DK value of second dielectric layer.
In the present embodiment, second dielectric layer is since in PCB manufacturing process, the resin glue inflow of first medium layer is led
It is formed in the gap of body layer, so the gel content of second dielectric layer is exactly the first medium layer loss in PCB manufacturing process
Gel content, the 2nd DK value are the default DK values of first medium layer script, and the 2nd DK value can manufacture the manufacturer of raw material from PCB
The data of offer obtain, and by calculating the variable quantity between the first DK value and the 2nd DK value, can extrapolate the 3rd DK value, this
Three DK values, that is, second dielectric layer DK value.
103, it is modeled according to the first DK value, the 3rd DK value and the 4th DK value, obtains computation model, the 4th DK value is
The DK value of third dielectric layer.
In the present embodiment, a solver emulation tool can be used, according to first medium layer, second dielectric layer and
The DK value of three dielectric layers carries out Accurate Model, obtains computation model, the 4th DK value, that is, third dielectric layer DK value, due in PCB
In manufacturing process, the gel content loss of the dielectric layer is less, and the DK value error of the dielectric layer can be ignored, so can be used directly
The DK Value Data for the dielectric layer that raw material manufacturer provides is for modeling.
It should be noted that its other party can also be passed through in addition to above-mentioned use field solver emulation tool is modeled
Formula is modeled, and this is not limited here.
104, the impedance value of target conductor is calculated according to computation model.
In the present embodiment, target conductor is the conductor in PCB in conductor layer, and target conductor is located at first medium layer,
In the media environment of second medium layer and third dielectric layer composition, by according to first medium layer, second dielectric layer and third medium
The DK value of layer carries out Accurate Model, obtains one for calculating the computation model of target conductor impedance value, can be calculated
The impedance value of accurate target conductor.
The present embodiment is divided in detail by the media environment to target conductor, and the DK value of different medium layer is used respectively
In Modeling Calculation, PP dielectric layer DK Value Data inaccuracy is avoided to lead to the problem of impedance value calculated result inaccuracy, thus
To the impedance value of accurate target conductor, be conducive to subsequent PCB electrical characteristic analysis.
In a specific embodiment, the DK value of first medium layer is obtained, it is necessary first to obtain the thickness of first medium layer
Degree obtains the DK value of first medium layer to calculate;Before being modeled, it is also necessary to obtain the geometric parameters of target conductor
Number, for being modeled.
Fig. 2 is another embodiment schematic diagram of method of data processing in the embodiment of the present application.
As shown in Fig. 2, another embodiment of the method for data processing includes: in the embodiment of the present application
201, target thickness is obtained, which is the thickness of first medium layer.
In the present embodiment, target thickness is the thickness of first medium layer, and the method for obtaining target thickness, which can be, to be passed through
Slice is measured or is obtained by historical data, measures available more accurate first medium thickness degree by slice, but
It is if all carrying out slice measurement to each piece of PCB, efficiency is lower;It is obtained i.e. by historical data by utilizing same model
The previous slice metric data of PCB or similar model PCB obtains, and efficiency can be improved in this method.
202, the first DK value is calculated according to target thickness, the first DK value is the test DK value of first medium layer.
In the present embodiment, it after the thickness for obtaining first medium layer, can be pushed away according to the thickness of first medium layer
The gel content of first medium layer is calculated, and then calculates the dielectric constant DK value of first medium layer.
203, the 3rd DK value is calculated according to the 2nd DK value and the first DK value, the 2nd DK value is the ginseng of first medium layer
DK value is examined, the 3rd DK value is the DK value of second dielectric layer.
In the present embodiment, step 203 is similar with above-mentioned steps 102, and detailed description sees the phase in above-mentioned steps 102
Description is closed, details are not described herein again to this.
204, target component is obtained, the target component is the geometric parameter of the target conductor, and the target component is used
In being modeled.
In the present embodiment, geometric parameter of the target component for target conductor, the information such as width including target conductor, with
The method of step 201 is similar, and the method for obtaining target component, which can be, to be measured by slice or obtained by historical data, obtains
The target component taken can be used for being modeled.
205, it is modeled according to the first DK value, the 3rd DK value, the 4th DK value and target component, obtains computation model, it should
4th DK value is the DK value of third dielectric layer.
206, the impedance value of target conductor is calculated according to computation model.
In the present embodiment, step 205,206 similar with above-mentioned steps 103,104, detailed description sees above-mentioned steps
103, the associated description in 104, to this, details are not described herein again.
It should be noted that the method for being measured by slice or obtaining target thickness and target component by historical data
Only two kinds can method for reference, other than both modes, it is also possible to have other modes that can reach same effect,
Specifically herein without limitation.
The present embodiment is divided in detail by the media environment to target conductor, is additionally provided and is calculated first medium layer
The concrete mode of DK value, and the DK value of different medium layer and the geometric parameter of target conductor are respectively used to Modeling Calculation,
Computation model can be allowed to be more in line with actual demand, PP dielectric layer DK Value Data inaccuracy is avoided to lead to impedance value meter
The problem of result inaccuracy is calculated, to obtain the impedance value of accurate target conductor, is conducive to subsequent PCB electrical characteristic point
Analysis.
Fig. 3 is equipment one embodiment schematic diagram of data processing in the embodiment of the present application.
As shown in figure 3, equipment one embodiment of data processing includes: in the embodiment of the present application
First acquisition unit 301, for obtaining the first DK value, the first DK value is the test DK of the first medium layer of PCB
Value;
First computing unit 302, the first DK value for being obtained according to the 2nd DK value and first acquisition unit 301 calculate
To the 3rd DK value, the 2nd DK value is the reference DK value of the first medium layer of PCB, and the 3rd DK value is the second dielectric layer of PCB
DK value;
Modeling unit 303, the first DK value, the first computing unit 302 for being obtained according to first acquisition unit 301 obtain
The 3rd DK value and the 4th DK value modeled, obtain computation model, the 4th DK value is the DK value of the third dielectric layer of PCB;
The resistance of target conductor is calculated in second computing unit 304, the computation model for being established according to modeling unit 303
Anti- numerical value, the target conductor are located in the media environment being made of first medium layer, second dielectric layer and third dielectric layer.
In the present embodiment.First acquisition unit 301 can further include:
Module 3011 is obtained, for obtaining target thickness, which is the thickness of the first medium layer of PCB;
Computing module 3012, for the first DK value to be calculated according to the target thickness for obtaining the acquisition of module 3011.
Optionally, equipment one embodiment of data processing can also include: in the embodiment of the present application
Second acquisition unit 305 before establishing computation model for modeling unit 303, obtains target component, target ginseng
Number is the geometric parameter of target conductor, which can be used for modeling unit 303 and modeled.
Fig. 4 is another embodiment schematic diagram of equipment of data processing in the embodiment of the present application.
As shown in figure 4, another embodiment of the equipment of data processing includes: in the embodiment of the present application
Processor 401, memory 402 and bus 403.
Wherein, processor 401 controls the operation of the equipment of data processing, and processor 401 can also be known as central processing list
First (central processing unit, CPU).Memory 402 may include read-only memory and random access memory,
And instruction and data is provided to processor 401.The a part of of memory 402 can also include nonvolatile RAM
(non-volatile random access memory, NVRAM).In specific application, each group of the equipment of data processing
Part is coupled by bus system 403, and wherein bus system 403 can also include power supply in addition to including data/address bus
Bus, control bus and status signal bus in addition etc..But for the sake of clear explanation, various buses are all designated as bus in figure
System 403.
Memory 402 stores following element, executable modules or data structures perhaps their subset or
Their superset:
Operational order: including various operational orders, for realizing various operations;
Operating system: including various system programs, for realizing various basic businesses and the hardware based task of processing.
Wherein, pass through the operational order for calling memory 402 to store, processor 401, for executing in the embodiment of the present application
The step of equipment of data processing executes.
The method that above-mentioned the embodiment of the present application discloses can be applied in processor 401, or be realized by processor 401.
Processor 401 may be a kind of IC chip, the processing capacity with signal.During realization, the above method it is each
Step can be completed by the integrated logic circuit of the hardware in processor 401 or the instruction of software form.Above-mentioned processing
Device 401 can be general processor, digital signal processor (digital signal processing, DSP), dedicated integrated
Circuit (application specific integrated circuit, ASIC), ready-made programmable gate array (field-
Programmable gate array, FPGA) either other programmable logic device, discrete gate or transistor logic,
Discrete hardware components.It may be implemented or execute disclosed each method, step and the logic diagram in the embodiment of the present application.It is general
Processor can be microprocessor or the processor is also possible to any conventional processor etc..In conjunction with the embodiment of the present application institute
The step of disclosed method, can be embodied directly in hardware decoding processor and execute completion, or with the hardware in decoding processor
And software module combination executes completion.Software module can be located at random access memory, and flash memory, read-only memory may be programmed read-only
In the storage medium of this fields such as memory or electrically erasable programmable memory, register maturation.The storage medium is located at
The step of memory 402, processor 401 reads the information in memory 402, completes the above method in conjunction with its hardware.
In the above-described embodiments, can come wholly or partly by software, hardware, firmware or any combination thereof real
It is existing.When implemented in software, it can entirely or partly realize in the form of a computer program product.
The computer program product includes one or more computer instructions.Load and execute on computers the meter
When calculation machine program instruction, entirely or partly generate according to process or function described in the embodiment of the present application.The computer can
To be general purpose computer, special purpose computer, computer network or other programmable devices.The computer instruction can be deposited
Storage in a computer-readable storage medium, or from a computer readable storage medium to another computer readable storage medium
Transmission, for example, the computer instruction can pass through wired (example from a web-site, computer, server or data center
Such as coaxial cable, optical fiber, Digital Subscriber Line (DSL)) or wireless (such as infrared, wireless, microwave) mode to another website
Website, computer, server or data center are transmitted.The computer readable storage medium can be computer and can deposit
Any usable medium of storage either includes that the data storages such as one or more usable mediums integrated server, data center are set
It is standby.The usable medium can be magnetic medium, (for example, floppy disk, hard disk, tape), optical medium (for example, DVD) or partly lead
Body medium (such as solid state hard disk Solid State Disk (SSD)) etc..
Those of ordinary skill in the art will appreciate that all or part of the steps in the various methods of above-described embodiment is can
It is completed with instructing relevant hardware by program, which can be stored in a computer readable storage medium, storage
Medium may include: ROM, RAM, disk or CD etc..
The method and equipment of data processing provided by the embodiment of the present application are described in detail above, herein
Applying specific case, the principle and implementation of this application are described, and the explanation of above example is only intended to help
Understand the present processes and its core concept;At the same time, for those skilled in the art, according to the thought of the application,
There will be changes in the specific implementation manner and application range, in conclusion the content of the present specification should not be construed as to this
The limitation of application.
Claims (10)
1. a kind of method of data processing, which is characterized in that be applied to printing board PCB, the PCB includes first medium
Layer, second dielectric layer, third dielectric layer and target conductor, the target conductor are located at by the first medium layer, described second
In the media environment of dielectric layer and third dielectric layer composition;
The described method includes:
The first dielectric constant DK value is obtained, the first DK value is the test DK value of the first medium layer;
The 3rd DK value is calculated according to the 2nd DK value and the first DK value, the 2nd DK value is the first medium layer
With reference to DK value, the 3rd DK value is the DK value of the second dielectric layer;
It is modeled according to the first DK value, the 3rd DK value and the 4th DK value, obtains computation model, the 4th DK value
It is the DK value of the third dielectric layer;
The impedance value of the target conductor is calculated according to the computation model.
2. the method according to claim 1, wherein the first dielectric constant DK value of the acquisition, comprising:
Target thickness is obtained, the target thickness is the thickness of the first medium layer;
The first DK value is calculated according to the target thickness.
3. method according to claim 1 or 2, which is characterized in that described according to the first DK value, the 3rd DK value
Before being modeled with the 4th DK value, further includes:
Target component is obtained, the target component is the geometric parameter of the target conductor, and the target component is for being built
Mould.
4. according to the method described in claim 3, it is characterized in that, the copper wire that the target conductor includes the PCB internal layer is led
Body.
5. a kind of equipment of data processing, which is characterized in that be applied to printing board PCB, the PCB includes first medium
Layer, second dielectric layer, third dielectric layer and target conductor, the target conductor are located at by the first medium layer, described second
In the media environment of dielectric layer and third dielectric layer composition;
The equipment includes:
First acquisition unit, for obtaining the first dielectric constant DK value, the first DK value is the test of the first medium layer
DK value;
Third is calculated in first computing unit, the first DK value for being obtained according to the 2nd DK value and the first acquisition unit
DK value, the 2nd DK value are the reference DK values of the first medium layer, and the 3rd DK value is the DK of the second dielectric layer
Value;
Modeling unit, the first DK value, first computing unit for being obtained according to the first acquisition unit obtain
Three DK values and the 4th DK value are modeled, and computation model is obtained, and the 4th DK value is the DK value of the third dielectric layer;
The impedance of the target conductor is calculated in second computing unit, the computation model for being established according to the modeling unit
Numerical value.
6. equipment according to claim 5, which is characterized in that the first acquisition unit includes:
Module is obtained, for obtaining target thickness, the target thickness is the thickness of the first medium layer;
The first DK value is calculated in computing module, the target thickness for being obtained according to the acquisition module.
7. equipment according to claim 5 or 6, which is characterized in that the equipment further include:
Second acquisition unit before establishing the computation model for the modeling unit, obtains target component, the target ginseng
Number is the geometric parameter of the target conductor, and the target component is modeled for the modeling unit.
8. equipment according to claim 7, which is characterized in that the target conductor includes that the copper wire of the PCB internal layer is led
Body.
9. a kind of equipment of data processing characterized by comprising
Memory and processor,
The memory is for storing computer operation instruction;
The processor is for calling the computer operation instruction, to execute number according to any one of claims 1 to 4
According to the method for processing.
10. a kind of computer readable storage medium, which is characterized in that including computer operation instruction, when the computer operation
When instruction is run on computers, so that the computer executes the side of data processing according to any one of claims 1-4
Method.
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CN201811355161.7A CN109241692B (en) | 2018-11-14 | 2018-11-14 | Data processing method and device |
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