CN109239386A - A kind of signal acquisition method - Google Patents

A kind of signal acquisition method Download PDF

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Publication number
CN109239386A
CN109239386A CN201811053906.4A CN201811053906A CN109239386A CN 109239386 A CN109239386 A CN 109239386A CN 201811053906 A CN201811053906 A CN 201811053906A CN 109239386 A CN109239386 A CN 109239386A
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China
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level state
gate
control signal
grade
signal
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CN201811053906.4A
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Inventor
刘安章
周勇
陈梅
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Shaanxi Qianshan Avionics Co Ltd
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Shaanxi Qianshan Avionics Co Ltd
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Priority to CN201811053906.4A priority Critical patent/CN109239386A/en
Publication of CN109239386A publication Critical patent/CN109239386A/en
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P3/00Measuring linear or angular speed; Measuring differences of linear or angular speeds
    • G01P3/42Devices characterised by the use of electric or magnetic means
    • G01P3/44Devices characterised by the use of electric or magnetic means for measuring angular speed
    • G01P3/48Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage
    • G01P3/481Devices characterised by the use of electric or magnetic means for measuring angular speed by measuring frequency of generated current or voltage of pulse signals

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)

Abstract

A kind of signal acquisition method is disclosed, the method carries out following collection process to the echo signal being input in programmable logic device: when meeting setting condition, the 1st grade of gate-control signal being made to change into low level state by high level state;As the 1st grade of gate-control signal in low level state changes into high level state, the 2nd grade of gate-control signal is triggered and changes into high level state by low level state, and when meeting setting condition, the 2nd grade of gate-control signal changes into low level state by high level state;Generate 3rd level gate-control signal;Calculate the frequency of echo signal.Signal acquisition method provided by the invention can survey simultaneously week and frequency measurement two ways realizes the frequency measurement of echo signal.

Description

A kind of signal acquisition method
Technical field
The present invention relates to a kind of signal acquisition method, especially a kind of aircraft revolving speed letter in flight parameter collector Number signal acquisition method.
Background technique
Aircraft tach signal is a kind of especially important signal of flight parameter collector acquisition.Ground crew on the one hand can To judge that the operating status of aircraft engine, the working condition of the airborne other equipment of another party are also required to combine by the signal The tach signal of engine is associated judgement.
Traditional aircraft engine tach signal acquisition method is realized on hardware by the circuit of Fig. 1, passes through Fig. 1's Engine rotational speed signal can be improved the square-wave signal that can be acquired at digit chip by hardware, as shown in Figure 2.It is on software The square-wave signal of circuit output is connected on programmable logic device (FPGA), FPGA is carried out by cycle test method or Measuring Frequency Method The acquisition and calculating of aircraft tach signal.Cycle test method is that a cycle of selection square-wave signal is calculated as sample, such as Fig. 3 It is shown.Measuring Frequency Method is continuously to choose multiple square-wave cycles to be tested as sample, as shown in Figure 4.For slow-speed of revolution signal, when When selection continuous multiple periods are acquired calculating, calculated result can lag behind live signal, therefore be suitable for cycle test method and carry out Acquisition when being acquired calculating using the monocycle, it is larger to will cause error, therefore be suitable for Measuring Frequency Method for high tach signal It is acquired.And starting to work from aircraft to aircraft power-off terminates, the tach signal of aircraft is become larger from zero, becomes steady Fixed, therefore the process of last zero again cannot all reflect in design only with cycle test method or Measuring Frequency Method accurately, in real time Aircraft tach signal.
Summary of the invention
Goal of the invention:
The object of the present invention is to provide a kind of aircraft tach signal acquisition method, may be implemented a kind of algorithm it is compatible survey week and Two kinds of algorithms of frequency measurement.
Technical solution:
The present invention provides a kind of signal acquisition method, the method believes the target being input in programmable logic device It number carries out following collection process: step (1): the 1st grade of gate-control signal in low level state being made to change into high level state, when Meet following two condition for the moment, the 1st grade of gate-control signal changes into low level state by high level state: 1) capturing target The rising edge of signal, and the 1st grade of gate-control signal is in the holding time greater than the first threshold values of high level state;2) when the 1st grade of door Control signal is in when holding time greater than the second threshold values of high level state, does not capture the rising edge of echo signal yet, wherein Second threshold values is greater than the first threshold values;Step (2): as the 1st grade of gate-control signal in low level state changes into high level shape State, the 2nd grade of gate-control signal are triggered and change into high level state by low level state, when meeting one of following two condition When, the 2nd grade of gate-control signal changes into low level state by high level state: 1) the 1st grade of gate-control signal be in low level state and Programmable logic device captures the failing edge of echo signal;2) when the 2nd grade of gate-control signal is in the maintenance of high level state Between be greater than the second threshold values when, do not capture the failing edge of echo signal yet;Step (3): 3rd level gate letter is generated as follows Number: when programmable logic device captures the rising edge of echo signal, and the 2nd grade of gate-control signal is in high level state, the 3rd Grade gate-control signal is high level state;When programmable logic device captures the rising edge of echo signal, and the 2nd grade of gate-control signal When in low level state, 3rd level gate-control signal is low level state;Step (4): the frequency of echo signal is calculated according to the following formula Rate:
Wherein, Fx is the frequency of echo signal, and CNTx is the target during 3rd level gate-control signal is in high level state The rising edge of signal counts, and CNTs is the rising edge meter of the standard time clock during 3rd level gate-control signal is in high level state Number, Fs are the frequency of standard time clock.
Signal acquisition method according to the present invention, the first threshold values can be related to the sample rate of desired echo signal, and And second threshold values can be related to the minimum frequency value of desired echo signal.
The utility model has the advantages that
Signal acquisition method of the invention may be implemented to work as aircraft using cycle test method when aircraft tach signal is the slow-speed of revolution Frequency Measurement Algorithm is used when tach signal is high revolving speed, to realize to the more accurate frequency measurement of aircraft tach signal.
Detailed description of the invention
Fig. 1 is aircraft tach signal acquisition hardware circuit diagram;
Fig. 2 is the square wave after the conditioning of aircraft tach signal acquisition hardware;
Fig. 3 is traditional cycle test method schematic diagram;
Fig. 4 is traditional Measuring Frequency Method schematic diagram;
Fig. 5 is the schematic diagram of acquisition method of the invention, and wherein Fig. 5 a shows the acquisition of low frequency tach signal, Figure 5b shows that The acquisition of high frequency tach signal.
Specific embodiment
Signal acquisition of the invention is based on hardware output circuit shown in FIG. 1 and output square wave shown in Fig. 2, in conjunction with Fig. 5 a It is described in further detail with Fig. 5 b.
As shown in figure 5 a and 5b, signal acquisition method of the invention believes the target being input in programmable logic device Number carry out following collection process:
Step (1): making the 1st grade of gate-control signal in low level state change into high level state, when satisfaction following two For the moment, the 1st grade of gate-control signal changes into low level state by high level state to a condition: 1) capturing the rising of echo signal Edge, and the 1st grade of gate-control signal is in the holding time greater than the first threshold values of high level state;2) when the 1st grade of gate-control signal is in When holding time greater than the second threshold values of high level state, does not capture the rising edge of echo signal yet, wherein the second threshold values is big In the first threshold values;
Step (2): as the 1st grade of gate-control signal in low level state changes into high level state, the 2nd grade of gate letter It number is triggered and high level state is changed by low level state, when meeting following two condition for the moment, the 2nd grade of gate-control signal Change into low level state by high level state: 1) the 1st grade of gate-control signal is in low level state and programmable logic device is caught Grasp the failing edge of echo signal;2) when the 2nd grade of gate-control signal is in when holding time greater than the second threshold values of high level state, The failing edge of echo signal is not captured yet;
Step (3): 3rd level gate-control signal is generated as follows: when programmable logic device captures echo signal Rising edge, and when the 2nd grade of gate-control signal is in high level state, 3rd level gate-control signal is high level state;Work as programmable logic Device captures the rising edge of echo signal, and when the 2nd grade of gate-control signal is in low level state, and 3rd level gate-control signal is low Level state;
Step (4): the frequency of echo signal is calculated according to the following formula:
Wherein, Fx is the frequency of echo signal, and CNTx is the target during 3rd level gate-control signal is in high level state The rising edge of signal counts, and CNTs is the rising edge meter of the standard time clock during 3rd level gate-control signal is in high level state Number, Fs are the frequency of standard time clock.
First threshold values can be related to the sample rate of desired echo signal, and the second threshold values can be with desired target The minimum frequency value of signal is related.
That is, after FPGA preparation for acquiring, the 1st grade is generated inside FPGA the method for the invention the step of in (1) Gate-control signal, gate-control signal high level is effective, gate-control signal by high level change into low level need to meet following two condition it One: 1) at least capturing the rising edge of a tach signal, and the 1st grade of holding time for high level of gate has had been above door Control setting minimum value (value is related to sample rate);2) rising edge that tach signal can not be captured always, when gate width is big When maximum gates setting value (value is related with the minimum frequency value that need to be acquired), need to close the 1st grade of gate by force.
The method of the invention the step of in (2), at the time of the 1st grade of gate starting is by low get higher, the 2nd grade of synchronous averaging Gate, the 2nd grade of gate are also that high level is effective, and the 2nd grade of gate-control signal, which changes into low level by high level, need to meet following two One of condition: 1) the 1st grade of gate has been switched off and at the time of FPGA captures tach signal failing edge;2) when the 2nd grade of gate is wide Degree does not capture the decline of tach signal yet when being greater than maximum gate setting value (value with the minimum frequency value that need to be acquired in relation to) Edge needs to close the 2nd grade of gate by force.
The method of the invention the step of in (3), the 2nd grade of gate synchronize by tach signal and is gated for 3rd level.

Claims (2)

1. a kind of signal acquisition method, the method acquires the echo signal being input in programmable logic device as follows Process:
Step (1): making the 1st grade of gate-control signal in low level state change into high level state, when meeting following two item For the moment, the 1st grade of gate-control signal changes into low level state by high level state to part: 1) rising edge of echo signal is captured, And the 1st grade of gate-control signal is in the holding time greater than the first threshold values of high level state;2) when the 1st grade of gate-control signal is in high electricity When holding time greater than the second threshold values of level state, does not capture the rising edge of echo signal yet, wherein the second threshold values is greater than the One threshold values;
Step (2): as the 1st grade of gate-control signal in low level state changes into high level state, the 2nd grade of gate-control signal quilt It triggers and high level state is changed by low level state, when meeting following two condition for the moment, the 2nd grade of gate-control signal is by height Level state changes into low level state: 1) the 1st grade of gate-control signal is in low level state and programmable logic device captures The failing edge of echo signal;2) when the 2nd grade of gate-control signal is in when holding time greater than the second threshold values of high level state, not yet Capture the failing edge of echo signal;
Step (3): 3rd level gate-control signal is generated as follows: when programmable logic device captures the rising of echo signal Edge, and when the 2nd grade of gate-control signal is in high level state, 3rd level gate-control signal is high level state;Work as programmable logic device The rising edge of echo signal is captured, and when the 2nd grade of gate-control signal is in low level state, 3rd level gate-control signal is low level State;
Step (4): the frequency of echo signal is calculated according to the following formula:
Wherein, Fx is the frequency of echo signal, and CNTx is the echo signal during 3rd level gate-control signal is in high level state Rising edge count, CNTs is the rising edge counting of standard time clock during 3rd level gate-control signal be in high level state, Fs For the frequency of standard time clock.
2. signal acquisition method according to claim 1, wherein the sample rate phase of the first threshold values and the echo signal of requirement It closes, and the second threshold values is related to the minimum frequency value of the echo signal of requirement.
CN201811053906.4A 2018-09-11 2018-09-11 A kind of signal acquisition method Pending CN109239386A (en)

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Publication number Priority date Publication date Assignee Title
CN102680728A (en) * 2012-05-24 2012-09-19 北京信息科技大学 Motor rotation speed measuring method used in precise electromechanical equipment
CN102721868A (en) * 2012-06-21 2012-10-10 上海自动化仪表股份有限公司 Self-adaptive frequency measurement circuit and frequency measurement method thereof
US20130018616A1 (en) * 2011-07-15 2013-01-17 Askey Computer Corp. Frequency counter
CN103176042A (en) * 2011-12-21 2013-06-26 北京普源精电科技有限公司 Frequency measurement method and device and frequency meter
CN103424619A (en) * 2013-08-15 2013-12-04 陕西海泰电子有限责任公司 Timing counter frequency measurement system and method
CN103499739A (en) * 2013-09-25 2014-01-08 浪潮电子信息产业股份有限公司 Frequency measurement method based on FPGA
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US20130018616A1 (en) * 2011-07-15 2013-01-17 Askey Computer Corp. Frequency counter
CN103176042A (en) * 2011-12-21 2013-06-26 北京普源精电科技有限公司 Frequency measurement method and device and frequency meter
CN102680728A (en) * 2012-05-24 2012-09-19 北京信息科技大学 Motor rotation speed measuring method used in precise electromechanical equipment
CN102721868A (en) * 2012-06-21 2012-10-10 上海自动化仪表股份有限公司 Self-adaptive frequency measurement circuit and frequency measurement method thereof
CN103424619A (en) * 2013-08-15 2013-12-04 陕西海泰电子有限责任公司 Timing counter frequency measurement system and method
CN103499739A (en) * 2013-09-25 2014-01-08 浪潮电子信息产业股份有限公司 Frequency measurement method based on FPGA
CN104198754A (en) * 2014-09-11 2014-12-10 中国人民解放军海军航空工程学院青岛校区 Aero-engine rotation speed testing system

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