CN109217701A - Three-level rectifier common-mode voltage inhibits PWM method, modulator and system - Google Patents
Three-level rectifier common-mode voltage inhibits PWM method, modulator and system Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/2173—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a biphase or polyphase circuit arrangement
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/24—Arrangements for preventing or reducing oscillations of power in networks
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- H02J3/386—
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/70—Wind energy
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Abstract
The invention discloses three-level rectifier common-mode voltages to inhibit PWM method, modulator and system.Wherein, common-mode voltage inhibits PWM method, is suitable for NPC three-level PWM rectifier, judges including sector: according to the phase angle of reference voltage vector, judging sector number；Basic vector is chosen: choosing two middle vector sums, one zero vector according to the sector where reference voltage vector, further according to the difference of two capacitance voltages of DC side, chooses p-type or N-type small vector；Basic vector action time calculates: writing voltage-second balance equation according to the basic vector of selection column, solves voltage-second balance equation and obtain the action time of each basic vector；On off sequence design；PWM drive signal generates: generating corresponding PWM drive signal according on off sequence, controls opening and turning off for power switch tube.It achievees the purpose that while inhibiting common-mode voltage amplitude and frequency.
Description
Technical field
The invention belongs to power electronics control fields more particularly to a kind of three-level rectifier common-mode voltage to inhibit the side PWM
Method, modulator and system.
Background technique
In recent years, three-level converter is in renewable energy power generation, High-power AC drives, power quality harnessed synthetically etc.
Field is widely applied.Neutral point clamp type (Neural Point Clamped, NPC) three-level converter is earliest by Japan
Scholar Akira Nabae was proposed in 1981.Compared with traditional two level converters, NPC three-level converter has total harmonic wave
Aberration rate (Total Harmonic Distortion, THD) is low, power device voltage stress is low, output waveform is high-quality, turns
Change the advantages such as high-efficient.
Common-mode voltage is generated by the switch motion of power device in converter.Traditional 3 level space vector modulation
(Space Vector Modulation, SVM) method generates width using whole basic vector synthesized reference voltage vectors
Value and the very high common-mode voltage of frequency.Common-mode voltage will cause serious harm to system, increase the electromagnetic interference of system
(Electromagnetic Interference, EMI), the common mode current that common-mode voltage generates cause to damage to the insulation of motor
Evil, causes the shaft current of motor excessive, in turn results in motor bearings damage.In photovoltaic generating system, common mode leakage current is generated,
Serious electromagnetic interference is caused, or even threatens personal safety.Therefore, the inhibition of common-mode voltage becomes a key that must be taken into consideration
Problem.
Inhibiting the method for common-mode voltage at present includes: hardware based method and software-based method.
(1) hardware based method includes using passive filter or improvement circuit topological structure etc., however, being based on hardware
Method will increase the cost of whole system.
(2) software-based method includes improving modulator approach and forecast Control Algorithm.Existing common-mode voltage inhibition side
Method mainly for common-mode voltage amplitude reduction, and the inhibition of common-mode voltage frequency consider it is less.
In conclusion need a kind of while inhibiting NPC three-level pwm (Pulse Width Modulation) rectifier total
The method of mode voltage amplitude and frequency, modulator and system.
Summary of the invention
In order to solve the deficiencies in the prior art, in a first aspect, the embodiment of the invention provides a kind of three-level rectifiers to be total to
Mode voltage inhibits PWM method, and it is suitable for NPC three-level PWM rectifier, the common-mode voltage of the embodiment of the present invention inhibits the side PWM
Method, using 13 basic vectors in three-level space vector modulation method come synthesized reference voltage vector, by solving weber
Equilibrium equation obtains the action time of each basic vector, and designs symmetrical on off sequence, effectively inhibits tri- level of NPC
The amplitude and frequency of PWM rectifier common-mode voltage.
The hybrid modulation method of a kind of the inhibition common-mode voltage amplitude and frequency of the embodiment of the present invention, comprising:
(1) sector judges: according to the phase angle of reference voltage vector, judging sector number；
(2) basic vector is chosen: two middle vector sums, one zero vector is chosen according to the sector where reference voltage vector,
Further according to the difference of two capacitance voltages of DC side, p-type or N-type small vector are chosen；
(3) basic vector action time calculates: writing voltage-second balance equation according to the basic vector of selection column, it is flat to solve weber
Weighing apparatus equation obtains the action time of each basic vector；
(4) on off sequence designs: if the action time of the p-type or N-type small vector chosen meets its corresponding constraint condition,
Using the on off sequence of two middle vectors, a zero vector, a p-type or N-type small vector；If the p-type or N-type small vector chosen
Action time corresponding constraint condition is not satisfied, then using two middle vectors, the on off sequence of zero vector；
(5) PWM drive signal generates: generating corresponding PWM drive signal according on off sequence, controls opening for power switch tube
Logical and shutdown.
With reference to first aspect, in the first possible implementation of the first aspect, in the judgment step of sector, setting
The phase angle of reference voltage vector is θ, sector number S:
When θ ∈ [0, π/6) when, S=1；When θ ∈ [π/6, π/3) when, S=2；
When θ ∈ [π/3, pi/2) when, S=3；When θ ∈ [pi/2,2 π/3) when, S=4；
When θ ∈ [2 π/3,5 π/6) when, S=5；When θ ∈ [5 π/6, π) when, S=6；
When θ ∈ [π, 7 π/6) when, S=7；When θ ∈ [7 π/6,4 π/3) when, S=8；
When θ ∈ [4 π/3,3 pi/2s) when, S=9；When θ ∈ [3 pi/2s, 5 π/3) when, S=10；
When θ ∈ [5 π/3,11 π/6) when, S=11；When θ ∈ [11 π/6,2 π) when, S=12.
With reference to first aspect, in the second possible implementation of the first aspect, in basic vector selecting step,
When upside capacitance voltage is higher than downside capacitance voltage, N-type small vector is chosen；When upside capacitance voltage is lower than downside capacitance voltage
When, choose p-type small vector.
With reference to first aspect, in a third possible implementation of the first aspect, whole for holding NPC three-level pwm
The stability of the output voltage of device is flowed, the equivalence that p-type or N-type small vector front and back voltage-second balance equation is added is kept.
With reference to first aspect, in a fourth possible implementation of the first aspect, this method further include: by DC side
The difference of two capacitance voltages obtains the action time of small vector after PI is adjusted, according to the volt before and after addition small vector
The corresponding relationship of second equilibrium equation, updates each basic vector action time.
Second aspect, the embodiment of the invention also provides a kind of three-level rectifier common-mode voltage suppressed modulators, fit
For NPC three-level PWM rectifier, the modulator includes:
Sector judgment module is used for the phase angle according to reference voltage vector, judges sector number；
Basic vector chooses module, is used to choose two middle vector sums one according to the sector where reference voltage vector
Zero vector chooses p-type or N-type small vector further according to the difference of two capacitance voltages of DC side；
Basic vector action time computing module is used to be arranged according to the basic vector of selection and writes voltage-second balance equation, asks
Solution voltage-second balance equation obtains the action time of each basic vector；
On off sequence designs module, is used to design on off sequence, design principle are as follows: if the p-type or N-type small vector chosen
Action time meet its corresponding constraint condition, then using two middle vectors, a zero vector, a p-type or N-type small vector
On off sequence；If corresponding constraint condition is not satisfied in the action time of the p-type or N-type small vector chosen, uses and sweared in two
The on off sequence of amount, zero vector；
PWM drive signal generation module, is used to generate corresponding PWM drive signal according on off sequence, and control power is opened
Close opening and turning off for pipe.
In conjunction with second aspect, in the first possible implementation of the second aspect, in the judgment module of sector, setting
The phase angle of reference voltage vector is θ, sector number S:
When θ ∈ [0, π/6) when, S=1；When θ ∈ [π/6, π/3) when, S=2；
When θ ∈ [π/3, pi/2) when, S=3；When θ ∈ [pi/2,2 π/3) when, S=4；
When θ ∈ [2 π/3,5 π/6) when, S=5；When θ ∈ [5 π/6, π) when, S=6；
When θ ∈ [π, 7 π/6) when, S=7；When θ ∈ [7 π/6,4 π/3) when, S=8；
When θ ∈ [4 π/3,3 pi/2s) when, S=9；When θ ∈ [3 pi/2s, 5 π/3) when, S=10；
When θ ∈ [5 π/3,11 π/6) when, S=11；When θ ∈ [11 π/6,2 π) when, S=12.
In conjunction with second aspect, in a second possible implementation of the second aspect, chosen in module in basic vector,
When upside capacitance voltage is higher than downside capacitance voltage, N-type small vector is chosen；When upside capacitance voltage is lower than downside capacitance voltage
When, choose p-type small vector.
In conjunction with second aspect, in the third possible implementation of the second aspect, to keep NPC three-level pwm whole
The stability of the output voltage of device is flowed, the equivalence that p-type or N-type small vector front and back voltage-second balance equation is added is kept.
In conjunction with second aspect, in the fourth possible implementation of the second aspect, the modulator further include:
Basic vector action time update module is used to obtain the difference of two capacitance voltages of DC side after PI is adjusted
It is updated each to the action time of small vector according to the corresponding relationship of the voltage-second balance equation before and after addition small vector
Basic vector action time.
The third aspect, the embodiment of the invention provides a kind of three-level rectifier common-mode voltages to inhibit system, including above-mentioned
The three-level rectifier common-mode voltage suppressed modulator.
Compared with prior art, the beneficial effects of the present invention are:
(1) a kind of three-level rectifier common-mode voltage of the invention inhibits PWM method that can rectify NPC three-level pwm
The common-mode voltage amplitude of device is limited within 1/6th of DC voltage；Compared with Traditional Space vector modulation method, altogether
Mode voltage amplitude reduces half.
(2) in the case where a kind of three-level rectifier common-mode voltage of the invention inhibits PWM method, NPC three-level PWM rectifier
In each switch periods, common-mode voltage at most changes once, reduces the change frequency of common-mode voltage.
(3) in the case where a kind of three-level rectifier common-mode voltage of the invention inhibits PWM method, NPC three-level PWM rectifier
Under normal running (operation) conditions, DC capacitor voltage fluctuation is small.
(4) when abnormal conditions cause the midpoint potential of NPC three-level PWM rectifier to shift, three electricity of the invention
Flat rectifier common-mode voltage inhibits PWM method that can restore neutral balance.
(5) three-level rectifier common-mode voltage of the invention inhibition PWM method reduces the capacity of DC bus capacitor, in turn
Reduce the volume of entire rectifier systems.
(6) three-level rectifier common-mode voltage of the invention inhibition PWM method reduces the electromagnetic interference of system.
(7) three-level rectifier common-mode voltage of the invention inhibit PWM method effectively reduce common-mode voltage to motor around
The adverse effect of group.
Detailed description of the invention
The accompanying drawings constituting a part of this application is used to provide further understanding of the present application, and the application's shows
Meaning property embodiment and its explanation are not constituted an undue limitation on the present application for explaining the application.
Fig. 1 be the present invention study based on wind-force that NPC three-level PWM rectifier system is AC/DC interface converter hair
Electric system；
Fig. 2 is the three dimensional vector diagram of the method for the present invention；
Fig. 3 is the control strategy block diagram of system；
Fig. 4 is that the common-mode voltage of the method for the present invention inhibits PWM method block diagram；
Fig. 5 is a kind of schematic frame of three-level rectifier common-mode voltage suppressed modulator provided in an embodiment of the present invention
Figure.
Specific embodiment
It is noted that following detailed description is all illustrative, it is intended to provide further instruction to the application.Unless another
It indicates, all technical and scientific terms used herein has usual with the application person of an ordinary skill in the technical field
The identical meanings of understanding.
It should be noted that term used herein above is merely to describe specific embodiment, and be not intended to restricted root
According to the illustrative embodiments of the application.As used herein, unless the context clearly indicates otherwise, otherwise singular
Also it is intended to include plural form, additionally, it should be understood that, when in the present specification using term "comprising" and/or " packet
Include " when, indicate existing characteristics, step, operation, device, component and/or their combination.
The embodiment of the invention provides a kind of three-level rectifier common-mode voltages to inhibit PWM method, and it is suitable for tri- electricity of NPC
The three-level rectifier common-mode voltage of flat PWM rectifier, the embodiment of the present invention inhibits PWM method, using 3 level space vector
13 basic vectors in modulator approach carry out synthesized reference voltage vector, obtain each basic arrow by solving voltage-second balance equation
The action time of amount, and symmetrical on off sequence is designed, effectively inhibit the amplitude of NPC three-level PWM rectifier common-mode voltage
And frequency.
Fig. 1 be the present invention study based on wind-force that NPC three-level PWM rectifier system is AC/DC interface converter hair
Electric system.It mainly include permanent magnet synchronous wind generator, pusher side NPC three-level PWM rectifier, net side NPC three-level pwm inversion
Device, four part of power grid.Here pusher side NPC three-level PWM rectifier part is mainly studied.It is rectified for pusher side NPC three-level pwm
Device proposes a kind of hybrid modulation method, while inhibiting common-mode voltage amplitude and frequency, reduces the fluctuation of DC side midpoint potential.
As shown in Figure 1, NPC three-level PWM rectifier includes three-phase bridge arm, every phase bridge arm include four power switch tubes and
Two clamp diodes.DC side includes the filter capacitor of two series connections, and two the intermediate of filter capacitor are formed in one
Property point, the centre of two clamp diodes of every phase bridge arm is connected with neutral point.
It should be understood that power switch tube is insulated gate bipolar transistor (IGBT)；
Other forms transistor can also be used to realize in power switch tube.
Specifically, there are three types of working condition P, O and N for every phase bridge arm of NPC three-level PWM rectifier system, with DC side
The neutral point of two filter capacitors is reference point, and bridge arm output voltage be the half of output DC voltage value, O when P-state
Bridge arm output voltage is zero when state, and bridge arm output voltage is the negative half for exporting DC voltage value when N-state.
Wherein, opening for power switch tube is completed with shutdown by control system.
In specific implementation, control system includes modulator, driving circuit, protection circuit, signal sampling and conditioning circuit.
Modulator is connected with driving circuit, and the pwm signal of modulator output is sent through driving circuit to the gate pole of power switch tube, control
Power switch tube being opened and turning off.The output signal of NPC three-level PWM rectifier is connected to through signal sampling and conditioning circuit
Modulator, the protection circuit realize the function of overcurrent and overvoltage protection.
Wherein, voltage, tri- level of NPC of the upper lateral capacitance and lower lateral capacitance of signal sampling and conditioning circuit sampling DC side
The input current and three-phase power grid voltage value of PWM rectifier.
Fig. 3 is the control strategy block diagram of the method for the present invention.Control strategy uses double-closed-loop control method, and outer ring is direct current
Pressure ring, inner ring are electric current loop, and the output of outer ring controller is as the given of inner ring.
A kind of three-level rectifier common-mode voltage of the embodiment of the present invention inhibits PWM method, comprising:
(1) sector judges: according to the phase angle of reference voltage vector, judging sector number；
In specific implementation, in the judgment step of sector, the phase angle that reference voltage vector is arranged is θ, sector number S:
When θ ∈ [0, π/6) when, S=1；When θ ∈ [π/6, π/3) when, S=2；
When θ ∈ [π/3, pi/2) when, S=3；When θ ∈ [pi/2,2 π/3) when, S=4；
When θ ∈ [2 π/3,5 π/6) when, S=5；When θ ∈ [5 π/6, π) when, S=6；
When θ ∈ [π, 7 π/6) when, S=7；When θ ∈ [7 π/6,4 π/3) when, S=8；
When θ ∈ [4 π/3,3 pi/2s) when, S=9；When θ ∈ [3 pi/2s, 5 π/3) when, S=10；
When θ ∈ [5 π/3,11 π/6) when, S=11；When θ ∈ [11 π/6,2 π) when, S=12.
(2) basic vector is chosen: two middle vector sums, one zero vector is chosen according to the sector where reference voltage vector,
Further according to the difference of two capacitance voltages of DC side, p-type or N-type small vector are chosen.
Fig. 2 is the three dimensional vector diagram of the method for the present invention, including 13 basic vectors, specifically include 6 middle vectors, 6 it is low
The small vector of common-mode voltage amplitude, 1 zero vector.Wherein, 6 middle vectors include [PON], [OPN], [NPO], [NOP],
[ONP] and [PNO], 6 small vectors of low common-mode voltage amplitude include 3 p-type small vectors ([POO], [OPO] and [OOP]) and 3
A N-type small vector ([OON], [NOO] and [ONO]), 1 zero vector are [OOO].The basic voltage vectors that the method for the present invention uses
And corresponding common-mode voltage amplitude is as shown in table 1.
The basic voltage vectors and corresponding common-mode voltage amplitude that 1 the method for the present invention of table uses
Sample the voltage value (v of two capacitors of DC sideC1And vC2), and calculate the difference of two capacitance voltages of DC side.
vdif=vC1-vC2 (1)
When upside capacitance voltage is higher than downside capacitance voltage, i.e. vdifWhen > 0, N-type small vector is chosen；When upside capacitance voltage
Lower than downside capacitance voltage, i.e. vdifWhen < 0, p-type small vector is chosen.
(3) basic vector action time calculates: writing voltage-second balance equation according to the basic vector of selection column, it is flat to solve weber
Weighing apparatus equation obtains the action time of each basic vector.
Voltage-second balance equation is write according to the basic vector of selection column, voltage-second balance equation is solved and obtains each basic vector
Action time.To guarantee that the action time of each basic vector is all larger than 0, the action time of p-type small vector is needed to meet
Constraint condition is known as p-type constraint condition, needs the constraint condition met to be known as N-type constraint item the action time of N-type small vector
Part.
(4) on off sequence designs: if the action time of the p-type or N-type small vector chosen meets its corresponding constraint condition,
Using the on off sequence of two middle vectors, a zero vector, a p-type or N-type small vector；If the p-type or N-type small vector chosen
Action time corresponding constraint condition is not satisfied, then using two middle vectors, the on off sequence of zero vector.
Fig. 4 is the hybrid modulation stratgy block diagram of the method for the present invention.When two capacitance voltages of DC side difference be greater than 0, and
When the action time of the N-type small vector of selection meets N-type constraint condition, using two middle vectors, a zero vector, a N-type
The on off sequence of small vector (abbreviation 2M1Z1N-S).When the difference of two capacitance voltages of DC side is less than 0, and the p-type chosen is small
When the action time of vector meets p-type constraint condition, (referred to as using two middle vectors, a zero vector, a p-type small vector
On off sequence 2M1Z1P-S).When the N-type small vector that the p-type small vector of selection is unsatisfactory for p-type constraint condition or selection is unsatisfactory for
When N-type constraint condition, using two middle vectors, the on off sequence of zero vector (abbreviation 2M1Z).
By taking reference voltage vector is located at sector 1 (Sector 1) as an example, the realization step of this method is illustrated.
When reference voltage vector is located at sector 1 (Sector 1), using two middle vectors (With) and one zero
VectorWhen voltage-second balance equation can be expressed as
Wherein, TsFor switch periods, t7、t12And t0Respectively basic vectorWithAction time.
Further abbreviation is
Wherein, VrefIt is respectively the amplitude and phase angle of reference voltage vector with θ.
Voltage-second balance equation is solved, the action time for obtaining three basic vectors is respectively
Wherein, m is modulation degree, is defined as
(1) when upside capacitance voltage is lower than downside capacitance voltage, i.e. vdifWhen < 0, p-type small vector V is chosen1[POO], then lie prostrate
Second equilibrium equation can be expressed as
Further abbreviation is
For the output voltage for not influencing NPC three-level PWM rectifier, should keep that p-type small vector front and back voltage-second balance is added
The equivalence of equation.Assuming that the p-type small vector V chosen1[POO] action time is y, compares and chooses p-type small vector V1[POO] it
Preceding and voltage-second balance equation later, the action time of available each basic vector are updated to respectively
To guarantee that the action time of each basic vector is all larger than 0, needed to the pact met the action time of p-type small vector
Beam condition is known as p-type constraint condition.Then in sector 1, p-type small vector V1[POO] action time y needs to meet p-type constraint item
The expression formula of part is
0 < y < min { 3t7,3t12,3t0} (8)
When θ ∈ [0, π/6), i.e. when S=1, if the variable y for meeting constraint condition (8) can be obtained, on off sequence design
Are as follows: [OOO]-[PNO]-[PON]-[POO]-[PON]-[PNO]-[OOO].
If the variable y for meeting constraint condition (8) cannot be obtained, on off sequence design are as follows: [OOO]-[PNO]-[PON]-
[PNO]-[OOO]。
(2) when upside capacitance voltage is higher than downside capacitance voltage, i.e. vdifWhen > 0, N-type small vector V is chosen2[OON], then lie prostrate
Second equilibrium equation can be expressed as
Further abbreviation is
For the output voltage for not influencing NPC three-level PWM rectifier, should keep that p-type small vector front and back voltage-second balance is added
The equivalence of equation.Assuming that the p-type small vector V chosen2[OON] action time is y, compares and chooses N-type small vector V2[OON] it
Preceding and voltage-second balance equation later, the action time of available each basic vector are updated to respectively
To guarantee that the action time of each basic vector is all larger than 0, needed to the pact met the action time of N-type small vector
Beam condition is known as N-type constraint condition.Then in sector 1, N-type small vector V1[OON] action time y needs to meet N-type constraint item
The expression formula of part is
When θ ∈ [0, π/6), i.e. when S=1, if the variable y for meeting constraint condition (12) can be obtained, on off sequence is set
It is calculated as: [OOO]-[PNO]-[PON]-[OON]-[PON]-[PNO]-[OOO].If the change for meeting constraint condition (12) cannot be obtained
Y is measured, then on off sequence designs are as follows: [OOO]-[PNO]-[PON]-[PNO]-[OOO].
For the stability of the output voltage of holding NPC three-level PWM rectifier, keep being added before and after p-type or N-type small vector
The equivalence of voltage-second balance equation.
In an alternative embodiment, when the difference of two capacitance voltages of DC side being obtained the effect of small vector after PI is adjusted
Between, according to the corresponding relationship of the voltage-second balance equation before and after addition small vector, update each basic vector action time.
Neutral balance control algolithm is realized using PI controller, in particular, by be calculated two capacitance voltages
Difference is sent into PI controller, and the action time of small vector is obtained after PI is adjusted, can be expressed as
Wherein, kp,NPAnd ki,NPThe respectively proportionality coefficient and integral coefficient of neutral balance PI controller.
The small vector of the case where being located at other sectors for reference voltage vector, selection are listed in table 2.Basic vector choosing
Taking can be obtained with action time calculating, on off sequence design, PWM drive signal generation with similar method.
The selection rule of 2 small vector of table
(5) PWM drive signal generates: generating corresponding PWM drive signal according on off sequence, controls opening for power switch tube
Logical and shutdown.
Fig. 5 is a kind of schematic frame of three-level rectifier common-mode voltage suppressed modulator provided in an embodiment of the present invention
Figure.It is suitable for NPC three-level PWM rectifiers.
As shown in figure 5, a kind of three-level rectifier common-mode voltage provided in an embodiment of the present invention inhibits PWM method, at least
Include:
(1) sector judgment module is used for the phase angle according to reference voltage vector, judges sector number；
Specifically, in the judgment module of sector, the phase angle that reference voltage vector is arranged is θ, sector number S:
When θ ∈ [0, π/6) when, S=1；When θ ∈ [π/6, π/3) when, S=2；
When θ ∈ [π/3, pi/2) when, S=3；When θ ∈ [pi/2,2 π/3) when, S=4；
When θ ∈ [2 π/3,5 π/6) when, S=5；When θ ∈ [5 π/6, π) when, S=6；
When θ ∈ [π, 7 π/6) when, S=7；When θ ∈ [7 π/6,4 π/3) when, S=8；
When θ ∈ [4 π/3,3 pi/2s) when, S=9；When θ ∈ [3 pi/2s, 5 π/3) when, S=10；
When θ ∈ [5 π/3,11 π/6) when, S=11；When θ ∈ [11 π/6,2 π) when, S=12.
(2) basic vector chooses module, is used to choose two middle vector sums according to the sector where reference voltage vector
One zero vector chooses p-type or N-type small vector further according to the difference of two capacitance voltages of DC side；
Fig. 2 is the three dimensional vector diagram of the method for the present invention, including 13 basic vectors, specifically include 6 middle vectors, 6 it is low
The small vector of common-mode voltage amplitude, 1 zero vector.Wherein, 6 middle vectors include [PON], [OPN], [NPO], [NOP],
[ONP] and [PNO], 6 small vectors of low common-mode voltage amplitude include 3 p-type small vectors ([POO], [OPO] and [OOP]) and 3
A N-type small vector ([OON], [NOO] and [ONO]), 1 zero vector are [OOO].The basic voltage vectors that the method for the present invention uses
And corresponding common-mode voltage amplitude is as shown in table 1.
The basic voltage vectors and corresponding common-mode voltage amplitude that 1 the method for the present invention of table uses
Sample the voltage value (v of two capacitors of DC sideC1And vC2), and calculate the difference of two capacitance voltages of DC side.
vdif=vC1-vC2 (1)
When upside capacitance voltage is higher than downside capacitance voltage, i.e. vdifWhen > 0, N-type small vector is chosen；When upside capacitance voltage
Lower than downside capacitance voltage, i.e. vdifWhen < 0, p-type small vector is chosen.
(3) basic vector action time computing module is used to be arranged according to the basic vector of selection and writes voltage-second balance equation,
It solves voltage-second balance equation and obtains the action time of each basic vector；
Voltage-second balance equation is write according to the basic vector of selection column, voltage-second balance equation is solved and obtains each basic vector
Action time.To guarantee that the action time of each basic vector is all larger than 0, the action time of p-type small vector is needed to meet
Constraint condition is known as p-type constraint condition, needs the constraint condition met to be known as N-type constraint item the action time of N-type small vector
Part.
(4) on off sequence designs module, is used to design on off sequence, design principle are as follows: if the p-type or N-type chosen are small
The action time of vector meets its corresponding constraint condition, then uses two middle vectors, a zero vector, a p-type or the small arrow of N-type
The on off sequence of amount；If corresponding constraint condition is not satisfied in the action time of the p-type or N-type small vector chosen, two are used
The on off sequence of middle vector, zero vector；
When the difference of two capacitance voltages of DC side is greater than 0, and the action time of N-type small vector chosen meets N-type about
When beam condition, using two middle vectors, a zero vector, N-type small vector (abbreviation 2M1Z1N-S) on off sequence.When straight
The difference of two capacitance voltages in side is flowed less than 0, and when the action time of p-type small vector chosen meets p-type constraint condition, is used
Two middle vectors, a zero vector, p-type small vector (abbreviation 2M1Z1P-S) on off sequence.When the p-type small vector of selection
When being unsatisfactory for the N-type small vector of p-type constraint condition or selection and being unsatisfactory for N-type constraint condition, using two middle vectors, a null vector
Measure the on off sequence of (abbreviation 2M1Z).
(5) PWM drive signal generation module is used to generate corresponding PWM drive signal according on off sequence, controls power
Switching tube being opened and turning off.
Specifically, it is the stability of the output voltage of holding NPC three-level PWM rectifier, keeps that p-type is added or N-type is small
The equivalence of voltage-second balance equation before and after vector.
In another embodiment, the modulator further include:
(6) basic vector action time update module is used to adjust the difference of two capacitance voltages of DC side through PI
The action time for obtaining small vector afterwards updates according to the corresponding relationship of the voltage-second balance equation before and after addition small vector
Each basic vector action time.
The embodiment of the invention also provides a kind of three-level rectifier common-mode voltages to inhibit system, including as shown in Figure 5
Common-mode voltage suppressed modulator.
In specific implementation, three-level rectifier common-mode voltage inhibits system, further includes: driving circuit, protection circuit, letter
Number sampling and conditioning circuit.Modulator is connected with driving circuit, and the pwm signal of modulator output is sent through driving circuit to power
The gate pole of switching tube controls opening and turning off for power switch tube.The output signal of NPC three-level PWM rectifier is adopted through signal
Sample and conditioning circuit are connected to modulator, and the protection circuit realizes the function of overcurrent and overvoltage protection.
Wherein, voltage, tri- level of NPC of the upper lateral capacitance and lower lateral capacitance of signal sampling and conditioning circuit sampling DC side
The input current and three-phase power grid voltage value of PWM rectifier.
Above-mentioned, although the foregoing specific embodiments of the present invention is described with reference to the accompanying drawings, not protects model to the present invention
The limitation enclosed, those skilled in the art should understand that, based on the technical solutions of the present invention, those skilled in the art are not
Need to make the creative labor the various modifications or changes that can be made still within protection scope of the present invention.
Claims (10)
1. a kind of three-level rectifier common-mode voltage inhibits PWM method, which is characterized in that it is suitable for the rectifications of NPC three-level pwm
Device can inhibit the amplitude and frequency of common-mode voltage simultaneously, this method comprises:
(1) sector judges: according to the phase angle of reference voltage vector, judging sector number；
(2) basic vector is chosen: choosing two middle vector sums, one zero vector, then root according to the sector where reference voltage vector
According to the difference of two capacitance voltages of DC side, p-type or N-type small vector are chosen；
(3) basic vector action time calculates: writing voltage-second balance equation according to the basic vector of selection column, solves voltage-second balance side
Journey obtains the action time of each basic vector；
(4) on off sequence designs: if the action time of the p-type or N-type small vector chosen meets its corresponding constraint condition, using
Two middle vectors, a zero vector, a p-type or N-type small vector on off sequence；If the work of the p-type or N-type small vector chosen
Corresponding constraint condition is not satisfied with the time, then using two middle vectors, the on off sequence of zero vector；
(5) PWM drive signal generates: corresponding PWM drive signal is generated according on off sequence, control power switch tube open with
Shutdown.
2. a kind of hybrid modulation method for inhibiting common-mode voltage amplitude and frequency as described in claim 1, which is characterized in that
In the judgment step of sector, the phase angle that reference voltage vector is arranged is θ, sector number S:
When θ ∈ [0, π/6) when, S=1；When θ ∈ [π/6, π/3) when, S=2；
When θ ∈ [π/3, pi/2) when, S=3；When θ ∈ [pi/2,2 π/3) when, S=4；
When θ ∈ [2 π/3,5 π/6) when, S=5；When θ ∈ [5 π/6, π) when, S=6；
When θ ∈ [π, 7 π/6) when, S=7；When θ ∈ [7 π/6,4 π/3) when, S=8；
When θ ∈ [4 π/3,3 pi/2s) when, S=9；When θ ∈ [3 pi/2s, 5 π/3) when, S=10；
When θ ∈ [5 π/3,11 π/6) when, S=11；When θ ∈ [11 π/6,2 π) when, S=12.
3. a kind of three-level rectifier common-mode voltage as described in claim 1 inhibits PWM method, which is characterized in that basic
In vector selecting step, when upside capacitance voltage is higher than downside capacitance voltage, N-type small vector is chosen；When upside capacitance voltage
When lower than downside capacitance voltage, p-type small vector is chosen.
4. a kind of three-level rectifier common-mode voltage as described in claim 1 inhibits PWM method, which is characterized in that keep
The stability of the output voltage of NPC three-level PWM rectifier, holding addition p-type or N-type small vector front and back voltage-second balance equation
Equivalence.
5. a kind of three-level rectifier common-mode voltage as described in claim 1 inhibits PWM method, which is characterized in that this method
Further include: the difference of two capacitance voltages of DC side is obtained into the action time of small vector after PI is adjusted, according to the small arrow of addition
The corresponding relationship of voltage-second balance equation before and after amount updates each basic vector action time.
6. a kind of three-level rectifier common-mode voltage suppressed modulator, which is characterized in that it is suitable for the rectifications of NPC three-level pwm
Device, can inhibit the amplitude and frequency of common-mode voltage simultaneously, and the modulator includes:
Sector judgment module is used for the phase angle according to reference voltage vector, judges sector number；
Basic vector chooses module, is used to choose two middle vector sums, one null vector according to the sector where reference voltage vector
Amount chooses p-type or N-type small vector further according to the difference of two capacitance voltages of DC side；
Basic vector action time computing module is used to be arranged according to the basic vector of selection and writes voltage-second balance equation, solves volt
Second equilibrium equation obtains the action time of each basic vector；
On off sequence designs module, is used to design on off sequence, design principle are as follows: if the work of the p-type or N-type small vector chosen
Meet its corresponding constraint condition with the time, then using the switch of two middle vectors, a zero vector, a p-type or N-type small vector
Sequence；If corresponding constraint condition is not satisfied in the action time of the p-type or N-type small vector chosen, two middle vectors, one are used
The on off sequence of a zero vector；
PWM drive signal generation module is used to generate corresponding PWM drive signal according on off sequence, controls power switch tube
Open and turn off.
7. a kind of hybrid modulation device for inhibiting common-mode voltage amplitude and frequency as claimed in claim 6, which is characterized in that fanning
In area's judgment module, the phase angle that reference voltage vector is arranged is θ, sector number S:
When θ ∈ [0, π/6) when, S=1；When θ ∈ [π/6, π/3) when, S=2；
When θ ∈ [π/3, pi/2) when, S=3；When θ ∈ [pi/2,2 π/3) when, S=4；
When θ ∈ [2 π/3,5 π/6) when, S=5；When θ ∈ [5 π/6, π) when, S=6；
When θ ∈ [π, 7 π/6) when, S=7；When θ ∈ [7 π/6,4 π/3) when, S=8；
When θ ∈ [4 π/3,3 pi/2s) when, S=9；When θ ∈ [3 pi/2s, 5 π/3) when, S=10；
When θ ∈ [5 π/3,11 π/6) when, S=11；When θ ∈ [11 π/6,2 π) when, S=12.
8. a kind of hybrid modulation device for inhibiting common-mode voltage amplitude and frequency as claimed in claim 6, which is characterized in that in base
This vector is chosen in module, when upside capacitance voltage is higher than downside capacitance voltage, chooses N-type small vector；When upper lateral capacitance electricity
It forces down when the capacitance voltage of downside, chooses p-type small vector.
9. a kind of three-level rectifier common-mode voltage suppressed modulator as claimed in claim 6, which is characterized in that keep
The stability of the output voltage of NPC three-level PWM rectifier, holding addition p-type or N-type small vector front and back voltage-second balance equation
Equivalence；
Or the modulator further include:
Basic vector action time update module is used to obtain the difference of two capacitance voltages of DC side after PI is adjusted small
The action time of vector updates each basic according to the corresponding relationship of the voltage-second balance equation before and after addition small vector
Vector action time.
10. a kind of three-level rectifier common-mode voltage inhibits system, which is characterized in that including any one of such as claim 6-9
The three-level rectifier common-mode voltage suppressed modulator.
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Application publication date: 20190115 Assignee: SHANDONG HOTEAM ELECTRICAL Co.,Ltd. Assignor: SHANDONG University Contract record no.: X2022980010512 Denomination of invention: Common mode voltage suppression PWM method, modulator and system for three-level rectifier Granted publication date: 20200107 License type: Exclusive License Record date: 20220715 |