CN109148575B - 一种含有混合漏电极的氮化镓hemt器件 - Google Patents

一种含有混合漏电极的氮化镓hemt器件 Download PDF

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CN109148575B
CN109148575B CN201811226580.0A CN201811226580A CN109148575B CN 109148575 B CN109148575 B CN 109148575B CN 201811226580 A CN201811226580 A CN 201811226580A CN 109148575 B CN109148575 B CN 109148575B
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黄兴
陈欣璐
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Pn Junction Semiconductor Hangzhou Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • HELECTRICITY
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
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    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

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Abstract

本发明公开了一种含有混合漏电极的氮化镓HEMT器件,属于半导体功率器件技术领域。本发明通过在原有漏极引入P型氮化镓,使该器件在正向导通或者开通瞬态过程中有空穴注入二维电子气及其周边区域,使得被深能级缺陷捕获的电子可以被快速中和,从而恢复器件二维电子气的导电特性,降低了器件的动态电阻,防止电流崩塌。

Description

一种含有混合漏电极的氮化镓HEMT器件
技术领域
本发明涉及半导体技术领域,具体涉及一种含有混合漏电极的氮化镓HEMT器件。
背景技术
氮化镓在近十多年来得到了迅速发展,其更高的频率可以使得电路的转换效率更高、体积更小。但是由于电流崩塌(Current Collapse)和动态电阻等因素,氮化镓高电子迁移率晶体管(HEMT)的实际效率较理论仍有较大的差距。其主要原因是器件在高压状态下,在体内的深能级缺陷中捕获了电子,当器件正向导通时,这些被捕获的电子引入额外的散射并排斥二维电子气内的自由电子,使得器件动态电阻大大高于静态测量电阻。
发明内容
针对现有技术的缺陷,本发明提供一种含有混合电极的氮化镓HEMT器件。本发明通过在原有漏极引入P型氮化镓,使该器件在正向导通或者开通瞬态过程中有空穴注入二维电子气及其周边区域,使得被深能级缺陷捕获的电子可以被快速中和,从而恢复器件二维电子气的导电特性,降低了器件的动态电阻,防止电流崩塌。
本发明提供一种含有混合漏电极的氮化镓HEMT器件,包括:
衬底(001),其正面和背面依次设有缓冲外延层(002)和背部电极(011);
缓冲外延层(002)向上依次生长有第一外延层(003)和第二外延层(004);
第一外延层(003)与第二外延层(004)由于压电效应形成二维电子气(005);
第二外延层(004)的局部区域顶部设有栅极第三外延层(006)和漏极第三外延层(106);
栅极第三外延层(006)顶部设有栅电极(009);
漏极第三外延层(106)顶部设有漏电极(010);
在栅电极(009)的另一侧,与漏电极(010)相对应的,设有源电极(008);
源电极(008)通过源极欧姆金属(007)与其下方的二维电子气(005)形成等电位;
漏电极(010)通过漏极欧姆金属(107)与其下方的二维电子气(005)形成等电位。
其中,所述的衬底(001)材料为硅、碳化硅之中的一种。
其中,所述的缓冲外延层(002)材料为铝、氮、镓元素组成的介质材料。
其中,所述的第一外延层(003)材料为氮化镓。
其中,所述的第一外延层(003)具有1E10cm-3-1E18cm-3的N型掺杂,其掺杂方式可以是电离杂质、晶格缺陷之中的至少一种。
其中,所述的第二外延层(004)材料为铝镓氮,或记为AlxGa1-xN,其铝成分比例x为1%-50%之间。
可选地,所述的漏极第三外延层(106)为P型半导体,其材料为氮化镓、砷化镓、磷化铟、硅、锗、碳化硅之一。
可选地,所述的漏极第三外延层(106)为金属,其材料为Pt、Ni、Ti、Mo、TiN、W、TiW之中的至少一种。
其中,所述的漏极欧姆金属(107)和漏极第三外延层(106)同时与漏电极(010)连接。
可选地,所述的漏电极(010)下方设有多个漏极欧姆金属(107)区域和多个漏极第三外延层(106)区域。
进一步,所述的多个漏极欧姆金属(107)区域和多个漏极第三外延层(106)区域,其特征在于,所述的多个漏极欧姆金属(107)区域和多个漏极第三外延层(106)区域沿着与栅极第三外延层(006)边缘平行的方向混合排列。
可选地,所述的漏电极(010)下方设有单个漏极欧姆金属(107)区域和单个漏极第三外延层(106)区域。
进一步,所述的单个漏极欧姆金属(107)区域和单个漏极第三外延层(106)区域从距离栅极第三外延层(006)边缘由近到远依次排列,且其长度方向平行。
附图说明
图1-3 分别是实施例一的顶视图、AA’纵切面视图、BB’纵切面视图。该实施例中,多个漏极欧姆金属(107)区域和多个漏极第三外延层(106)区域沿着与栅极第三外延层(006)边缘平行的方向交替排列。
图4-5分别是实施例二的顶视图和CC’纵切面视图。该实施例中,单个漏极欧姆金属(107)区域和单个漏极第三外延层(106)区域从距离栅极第三外延层(006)边缘由近到远依次排列,且其长度方向平行。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合实施例并参考附图,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅用以解释本发明,并不用于限定本发明。
本发明的一个实施例中,所述的衬底(001)材料为硅材料。
本发明的一个实施例中,所述的缓冲外延层(002)材料为多层AlN、AlGaN、GaN组合。
本发明的一个实施例中,所述的第一外延层(003)材料为氮化镓。
本发明的一个实施例中,所述的第一外延层(003)具有1E16cm-3的N型掺杂,其掺杂方式为晶格缺陷引入的非故意掺杂。
本发明的一个实施例中,所述的第二外延层(004)材料为Al0.27Ga0.73N。
本发明的一个实施例中,所述的栅极第三外延层(006)和漏极第三外延层(106)为氮化镓,其导电类型为P型。
本发明的一个实施例中,所述的漏极欧姆金属(107)和漏极第三外延层(106)同时与漏电极(010)连接。
本发明的一个实施例中,所述的漏电极(010)下方设有多个漏极欧姆金属(107)区域和多个漏极第三外延层(106)区域,并沿着与栅极第三外延层(006)边缘平行的方向交替排列。

Claims (7)

1.一种含有混合漏电极的氮化镓HEMT器件,包括:
衬底(001),其正面和背面依次设有缓冲外延层(002)和背部电极(011);
缓冲外延层(002)向上依次生长有第一外延层(003)和第二外延层(004);
第一外延层(003)与第二外延层(004)的交界面上具有二维电子气(005);
第二外延层(004)的局部区域顶部设有栅极第三外延层(006)和漏极第三外延层(106);
栅极第三外延层(006)顶部设有栅电极(009);
漏极第三外延层(106)顶部设有漏电极(010);
在栅电极(009)的另一侧,与漏电极(010)相对应的,设有源电极(008);
源电极(008)通过源极欧姆金属(007)与其下方的二维电子气(005)形成等电位;
漏电极(010)通过漏极欧姆金属(107)与其下方的二维电子气(005)形成等电位;
其特征在于,漏极欧姆金属(107)和漏极第三外延层(106)同时与漏电极(010)形成等电位;
所述的栅极第三外延层(006),其导电类型为 P型;
所述的漏极第三外延层(106)为 P 型半导体,其材料为三五族化合物半导体、四族化合物半导体或四族单元素半导体之一。
2.根据权利要求 1 所述的一种含有混合漏电极的氮化镓HEMT器件,其特征在于,所述的衬底(001)材料为硅、碳化硅之中的一种;缓冲外延层(002)材料为铝、氮、镓元素组成的介质材料;第一外延层(003)材料为氮化镓。
3.根据权利要求 1所述的一种含有混合漏电极的氮化镓HEMT器件,其特征在于,所述的第二外延层(004)材料为铝镓氮,或记为 A1XGa1-XN,其铝成分比例x为1%-50%之间。
4.根据权利要求1所述的一种含有混合漏电极的氮化镓HEMT器件,其特征在于,所述的漏电极(010)下方设有多个漏极欧姆金属(107)区域和多个漏极第三外延层(106)区域。
5.根据权利要求 1所述的一种含有混合漏电极的氮化镓HEMT器件,其特征在于,所述的多个漏极欧姆金属(107)区域和多个漏极第三外延层(106)区域沿着与栅极第三外延层(006)边缘平行的方向混合排列。
6.根据权利要求 1所述的一种含有混合漏电极的氮化镓HEMT器件,其特征在于,所述的漏电极(010)下方设有单个漏极欧姆金属(107)区域和单个漏极第三外延层(106)区域。
7.根据权利要求6所述的一种含有混合漏电极的氮化镓HEMT器件,其特征在于,所述的单个漏极欧姆金属(107)区域和单个漏极第三外延层(106)区域从距离栅极第三外延层(006)边缘由近到远依次排列,且其长度方向平行。
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