CN109148553A - Diode with high antistatic capacity - Google Patents
Diode with high antistatic capacity Download PDFInfo
- Publication number
- CN109148553A CN109148553A CN201710462132.XA CN201710462132A CN109148553A CN 109148553 A CN109148553 A CN 109148553A CN 201710462132 A CN201710462132 A CN 201710462132A CN 109148553 A CN109148553 A CN 109148553A
- Authority
- CN
- China
- Prior art keywords
- diffusion region
- diode
- insulation layer
- high antistatic
- antistatic capacity
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009792 diffusion process Methods 0.000 claims abstract description 131
- 238000009413 insulation Methods 0.000 claims abstract description 34
- 238000000034 method Methods 0.000 claims description 9
- 238000002955 isolation Methods 0.000 claims description 4
- 230000001590 oxidative effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 10
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 208000027418 Wounds and injury Diseases 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 208000014674 injury Diseases 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 230000007306 turnover Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The disclosure provides a kind of diode with high antistatic capacity, the second diffusion region of the first diffusion region, the second conduction type comprising the first conduction type and insulation layer.First diffusion region has multiple recessed portions.Insulation layer is around the first diffusion region and conformal with the first diffusion region.Second diffusion region is around insulation layer.Insulation layer is to be isolated the first diffusion region and the second diffusion region.The disclosure proposes a kind of diode with high antistatic capacity, increase the perimeter at the interface P/N by the shape of the interior diffusion region of change diode to improve the electric current tolerance of diode itself, the area for being not necessary to increase diode can make diode have high antistatic capacity.
Description
Technical field
The embodiment of the present disclosure is related to technical field of semiconductors, in particular to a kind of with high antistatic capacity
Diode.
Background technique
Electrostatic is always masty problem for the injury of electronic product, especially in the application of high-frequency circuit.
In order to not influence the normal working performance of product, it is relatively strong to have that the input/output interface of circuit usually requires electrostatic protection element
Electric current relieving capacity.High-frequency circuit relatively conventional now, the electrostatic protection element of input/output interface are mostly diode.
When there is static discharge generation, N-diode is used for the forward current released from ground terminal to input/output interface, two pole of p-type
Forward current of the pipe for releasing input/output interface to power end.In order to improve the electric current tolerance of diode itself to
Improve antistatic capacity, it usually needs increase the area of diode, however this practice is unfavorable for the microminiaturization of product
's.
Summary of the invention
The purpose of the disclosure is to propose a kind of diode with high antistatic capacity, by changing in diode
The shape of diffusion region increases the perimeter at the interface P/N to improve the electric current tolerance of diode itself, is not necessary to increase by two poles
The area of pipe can make diode have high antistatic capacity.
According to the above-mentioned purpose of the disclosure, a kind of diode with high antistatic capacity is proposed, it is conductive comprising first
First diffusion region of type, the second diffusion region of the second conduction type and insulation layer.First diffusion region has multiple recessed portions.Absolutely
Edge area is around the first diffusion region and conformal with the first diffusion region.Second diffusion region is around insulation layer.Insulation layer is to be isolated first
Diffusion region and the second diffusion region.
In some embodiments, each of above-mentioned recessed portion has U-shaped shape.
In some embodiments, each of above-mentioned recessed portion has arc-shaped shape.
In some embodiments, above-mentioned recessed portion is symmetrical with the respective center point of the first diffusion region two-by-two.
In some embodiments, often side of the first diffusion region of above-mentioned every side relative to the second diffusion region has phase
With an at least recessed portion for quantity.
In some embodiments, the first diffusion region of above-mentioned at least one set of opposite side relative to the second diffusion region is opposite
The side has an at least recessed portion for identical quantity.
In some embodiments, the first diffusion region of above-mentioned first conduction type is N+ type diffusion region, the second conduction type
The second diffusion region be P+ type diffusion region.
In some embodiments, the first diffusion region of above-mentioned first conduction type is P+ type diffusion region, the second conduction type
The second diffusion region be N+ type diffusion region.
In some embodiments, the method for forming insulation layer is selective oxidation method (Local Oxidation of
Silicon, LOCOS) or shallow trench isolation (Shallow Trench Isolation, STI).
In some embodiments, above-mentioned first diffusion region has smooth contour.
For allow the disclosure features described above and advantage can be clearer and more comprehensible, special embodiment below, and cooperate specification attached
Figure is described in detail below.
Detailed description of the invention
From the detailed description done below in conjunction with Figure of description, can have to embodiment of the present disclosure and more preferably understand.
It is noted that each feature is not drawn to show according to the standard practice of industry.In fact, it is apparent in order to make to discuss,
The size of each feature all can be increased or decreased arbitrarily.
Fig. 1 is the structural schematic diagram for showing one of existing diode.
Fig. 2 is the structural schematic diagram for showing the diode according to first embodiment of the present disclosure.
Fig. 3 is the structural schematic diagram for showing the diode according to second embodiment of the present disclosure.
Fig. 4 is the structural schematic diagram for showing the diode according to third embodiment of the present disclosure.
Fig. 5 is the structural schematic diagram for showing the diode according to fourth embodiment of the present disclosure.
Description of symbols:
100,200,300,400,500: diode
110,210,310,410,510: the first diffusion region
212,312,412,512: recessed portion
120,220,320,420,520: the second diffusion region
130,230,330,430,430: insulation layer
Specific embodiment
The embodiment of the present invention is hashed out below.It is understood, however, that embodiment offer is many applicable general
It reads, may be implemented in miscellaneous specific content.It discusses, disclosed embodiment only for illustrating, is not limited to this
The range of invention.In addition, about " first " used herein, " second " ... etc., not refer in particular to the meaning of order or cis-position
Think, only for distinguishing with the element of same technique term description or operation.
Fig. 1 is the structural schematic diagram for showing one of existing diode 100.Existing diode 100 includes first conductive
First diffusion region 110 of type, the second diffusion region 120 of the second conduction type and insulation layer 130.Insulation layer 130 is around first
Diffusion region 110, and the second diffusion region 120 is around insulation layer 130.Insulation layer 130 expands the first diffusion region 110 and second is isolated
Dissipate area 120.
Fig. 2 is the structural schematic diagram for showing the diode 200 according to first embodiment of the present disclosure.Diode 200 includes
First diffusion region 210 of the first conduction type, the second diffusion region 220 of the second conduction type and insulation layer 230.First diffusion region
210 have multiple recessed portions 212.Insulation layer 230 is around the first diffusion region 210 and conformal with the first diffusion region 210.Second diffusion
Area 220 is around insulation layer 230.Insulation layer 230 is to be isolated the first diffusion region 210 and the second diffusion region 220.
In embodiment of the disclosure, the first diffusion region of above-mentioned first conduction type is N+ type diffusion region, and second is conductive
Second diffusion region of type is P+ type diffusion region, and in the case, diode is N-diode；Alternatively, above-mentioned first conductive-type
First diffusion region of type is P+ type diffusion region, and the second diffusion region of the second conduction type is N+ type diffusion region, in the case, two
Pole pipe is p-type diode.In embodiment of the disclosure, the method for insulation layer 130 is formed as selective oxidation method (LOCOS) or shallow
Trench isolations (STI).
For some embodiments of the present disclosure, often side of the first diffusion region of every side relative to the second diffusion region
An at least recessed portion with identical quantity.By taking first embodiment of the present disclosure as an example, as shown in Fig. 2, relative to the second diffusion
First diffusion region 210 of every side (i.e. upper/lower/left/right) in area 220 the often side (i.e. upper/lower/left side/
Right side) respectively there is 1 recessed portion 212, but embodiment of the disclosure is without being limited thereto.
In first embodiment of the present disclosure, as shown in Fig. 2, each of recessed portion 212 has U-shaped shape, but this public affairs
The embodiment opened is without being limited thereto, and each of recessed portion is also possible to arc-shaped shape.For embodiment of the disclosure,
Recessed portion is symmetrical with the respective center point of the first diffusion region two-by-two, by taking first embodiment of the present disclosure as an example, as shown in Fig. 2, recessed
Concave portion 212 is symmetrical with the respective center point of the first diffusion region 210 two-by-two.
It should be noted that the disclosure does not limit size relationship of the recessed portion relative to the first diffusion region, as long as it is designed
The manufacturing process of diode can be met, and the first diffusion region there will not be shape that is excessively prominent or being recessed so as to cause unfavorable
In the antistatic capacity for improving diode.
For embodiment of the disclosure, with multiple recessed portions the first diffusion region be there is smooth shape, thus
Point discharge or current convergence will not be caused in point because of there is sharp keen turnover so that being used to the interface P/N of leakage current
End, the antistatic capacity for making it be unfavorable for improving diode.
Please with reference to Fig. 1 and Fig. 2, the diode 200 of first embodiment of the present disclosure compared to existing diode 100,
In the case where keeping diode area constant, by changing the shape of the first diffusion region 210, to increase the perimeter at the interface P/N
(this means, under same units area, the path that electric current flows through increases) is resistant to energy to improve the electric current of diode 200 itself
Power.
Fig. 3 is the structural schematic diagram for showing the diode 300 according to second embodiment of the present disclosure.Diode 300 includes
First diffusion region 310 of the first conduction type, the second diffusion region 320 of the second conduction type and insulation layer 330.First diffusion region
310 have multiple recessed portions 312.Insulation layer 330 is around the first diffusion region 310 and conformal with the first diffusion region 310.Second diffusion
Area 320 is around insulation layer 330.Insulation layer 330 is to be isolated the first diffusion region 310 and the second diffusion region 320.
For some embodiments of the present disclosure, the first diffusion region of at least one set of opposite side relative to the second diffusion region
The opposite side there is at least recessed portion of identical quantity.By taking second embodiment of the present disclosure as an example, as shown in figure 3, relatively
Opposite side (i.e. left side in the first diffusion region 310 of one group of opposite side (i.e. left/right) of the second diffusion region 320
Side) respectively there are 2 recessed portions 312, but embodiment of the disclosure is without being limited thereto.
In second embodiment of the present disclosure, as shown in figure 3, each of recessed portion 312 has U-shaped shape, but this public affairs
The embodiment opened is without being limited thereto, and each of recessed portion is also possible to arc-shaped shape.For embodiment of the disclosure,
Recessed portion is symmetrical with the respective center point of the first diffusion region two-by-two, by taking second embodiment of the present disclosure as an example, as shown in figure 3, recessed
Concave portion 312 is symmetrical with the respective center point of the first diffusion region 310 two-by-two.
Please with reference to Fig. 1 and Fig. 3, the diode 300 of second embodiment of the present disclosure compared to existing diode 100,
In the case where keeping diode area constant, by changing the shape of the first diffusion region 310, to increase the perimeter at the interface P/N
To improve the electric current tolerance of diode 300 itself.
Fig. 4 is the structural schematic diagram for showing the diode 400 according to third embodiment of the present disclosure.Diode 400 includes
First diffusion region 410 of the first conduction type, the second diffusion region 420 of the second conduction type and insulation layer 430.First diffusion region
410 have multiple recessed portions 412.Insulation layer 430 is around the first diffusion region 410 and conformal with the first diffusion region 410.Second diffusion
Area 420 is around insulation layer 430.Insulation layer 430 is to be isolated the first diffusion region 410 and the second diffusion region 420.
For some embodiments of the present disclosure, often side of the first diffusion region of every side relative to the second diffusion region
An at least recessed portion with identical quantity.By taking third embodiment of the present disclosure as an example, as shown in figure 4, relative to the second diffusion
First diffusion region 410 of every side (i.e. upper/lower/left/right) in area 420 the often side (i.e. upper/lower/left side/
Right side) respectively there are 2 recessed portions 412, but embodiment of the disclosure is without being limited thereto.
In third embodiment of the present disclosure, as shown in figure 4, each of recessed portion 412 has arc-shaped shape, but this
Disclosed embodiment is without being limited thereto, and each of recessed portion is also possible to U-shaped shape.For embodiment of the disclosure,
Recessed portion is symmetrical with the respective center point of the first diffusion region two-by-two, by taking third embodiment of the present disclosure as an example, as shown in figure 4, recessed
Concave portion 412 is symmetrical with the respective center point of the first diffusion region 410 two-by-two.
Please with reference to Fig. 1 and Fig. 4, the diode 400 of third embodiment of the present disclosure compared to existing diode 100,
In the case where keeping diode area constant, by changing the shape of the first diffusion region 410, to increase the perimeter at the interface P/N
To improve the electric current tolerance of diode 400 itself.
Fig. 5 is the structural schematic diagram for showing the diode 500 according to fourth embodiment of the present disclosure.Diode 500 includes
First diffusion region 510 of the first conduction type, the second diffusion region 520 of the second conduction type and insulation layer 530.First diffusion region
510 have multiple recessed portions 512.Insulation layer 530 is around the first diffusion region 510 and conformal with the first diffusion region 510.Second diffusion
Area 520 is around insulation layer 530.Insulation layer 530 is to be isolated the first diffusion region 510 and the second diffusion region 520.
For some embodiments of the present disclosure, the first diffusion region of at least one set of opposite side relative to the second diffusion region
The opposite side there is at least recessed portion of identical quantity.By taking fourth embodiment of the present disclosure as an example, as shown in figure 5, relatively
Three groups of opposite side (i.e. upper/lowers in the second diffusion region 520；Right side under the left side of upper left；On the left of upper right right side/lower-left)
The first diffusion region 510 opposite side (the i.e. upper/lower；Right side under the left side of upper left；On the left of upper right right side/lower-left) it is each
From having 1 recessed portion 512, but embodiment of the disclosure is without being limited thereto.
In fourth embodiment of the present disclosure, as shown in figure 5, each of recessed portion 512 has arc-shaped shape, but this
Disclosed embodiment is without being limited thereto, and each of recessed portion is also possible to U-shaped shape.For embodiment of the disclosure,
Recessed portion is symmetrical with the respective center point of the first diffusion region two-by-two, by taking fourth embodiment of the present disclosure as an example, as shown in figure 5, recessed
Concave portion 512 is symmetrical with the respective center point of the first diffusion region 510 two-by-two.
Please with reference to Fig. 1 and Fig. 5, the diode 500 of fourth embodiment of the present disclosure compared to existing diode 100,
By changing the shape of the first diffusion region 510, to increase the perimeter at the interface P/N to which the electric current for improving diode 500 itself is resistance to
By ability.
In summary, the disclosure proposes a kind of diode with high antistatic capacity, by changing in diode
The shape of diffusion region increases the perimeter at the interface P/N to improve the electric current tolerance of diode itself, is not necessary to increase by two poles
The area of pipe can make diode have high antistatic capacity.
Foregoing has outlined the features of several embodiments, therefore those skilled in the art can know more about the embodiment party of the disclosure
Formula.It will be understood by a person skilled in the art that arrive, the disclosure can be designed or modified as basis easily other processing procedures with
Structure realizes target identical with these embodiments described herein whereby and/or reaches identical advantage.Art technology
Personnel also should be understood that, these equivalent construction are without departing from the design and range of the disclosure, and they can not depart from
Various changes, replacement and variation are made under the premise of disclosure design and range.
Claims (10)
1. a kind of diode with high antistatic capacity, includes:
One first diffusion region of one first conduction type has multiple recessed portions；
One insulation layer surround first diffusion region, and conformal with first diffusion region；And
One second diffusion region of one second conduction type, around the insulation layer, wherein the insulation layer is to be isolated first diffusion
Area and second diffusion region.
2. as described in claim 1 with the diode of high antistatic capacity, wherein each recessed portion has a U-shaped
Shape.
3. as described in claim 1 with the diode of high antistatic capacity, wherein each recessed portion has a circle
Arcuation shape.
4. as described in claim 1 with the diode of high antistatic capacity, wherein the recessed portion is symmetrical with this two-by-two
The respective center point of first diffusion region.
5. as described in claim 1 with the diode of high antistatic capacity, wherein relative to the every of second diffusion region
Often side of first diffusion region of side has an at least recessed portion for identical quantity.
6. as described in claim 1 with the diode of high antistatic capacity, wherein extremely relative to second diffusion region
Opposite side of first diffusion region of few one group of opposite side has an at least recessed portion for identical quantity.
7. as described in claim 1 with high antistatic capacity diode, wherein first conduction type this first
Diffusion region is N+ type diffusion region, and second diffusion region of second conduction type is P+ type diffusion region.
8. as described in claim 1 with high antistatic capacity diode, wherein first conduction type this first
Diffusion region is P+ type diffusion region, and second diffusion region of second conduction type is N+ type diffusion region.
9. as described in claim 1 with the diode of high antistatic capacity, wherein the method for forming the insulation layer is office
Portion's oxidizing process or shallow trench isolation.
10. wherein first diffusion region is smooth with one as described in claim 1 with the diode of high antistatic capacity
Shape.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710462132.XA CN109148553A (en) | 2017-06-19 | 2017-06-19 | Diode with high antistatic capacity |
| TW107106655A TWI650845B (en) | 2017-06-19 | 2018-02-27 | Diode with high static protection capability |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710462132.XA CN109148553A (en) | 2017-06-19 | 2017-06-19 | Diode with high antistatic capacity |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109148553A true CN109148553A (en) | 2019-01-04 |
Family
ID=64803992
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710462132.XA Pending CN109148553A (en) | 2017-06-19 | 2017-06-19 | Diode with high antistatic capacity |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN109148553A (en) |
| TW (1) | TWI650845B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5633879A (en) * | 1979-08-29 | 1981-04-04 | Hitachi Ltd | Propective diode |
| CN103022015A (en) * | 2012-12-27 | 2013-04-03 | 成都芯源系统有限公司 | Electrostatic discharge protection unit and semiconductor device |
| CN105322025A (en) * | 2014-08-01 | 2016-02-10 | 拉碧斯半导体株式会社 | Semiconductor element and semiconductor device |
| CN106653747A (en) * | 2016-12-29 | 2017-05-10 | 北京宇翔电子有限公司 | Anti-ESD diode and protection circuit of CMOS integrated circuit comprising same |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3348711B2 (en) * | 1999-12-03 | 2002-11-20 | セイコーエプソン株式会社 | Semiconductor device and method of manufacturing the same |
| US6452236B1 (en) * | 2001-05-31 | 2002-09-17 | Texas Instruments, Incorporated | Channel implant for improving NMOS ESD robustness |
| KR100922555B1 (en) * | 2007-12-27 | 2009-10-21 | 주식회사 동부하이텍 | Method of manufacturing a semiconductor for protecting electrostatic discharge |
| WO2011145598A1 (en) * | 2010-05-20 | 2011-11-24 | 株式会社村田製作所 | Esd protection device |
| JP6036989B2 (en) * | 2013-03-27 | 2016-11-30 | 株式会社村田製作所 | ESD protection device |
-
2017
- 2017-06-19 CN CN201710462132.XA patent/CN109148553A/en active Pending
-
2018
- 2018-02-27 TW TW107106655A patent/TWI650845B/en active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5633879A (en) * | 1979-08-29 | 1981-04-04 | Hitachi Ltd | Propective diode |
| CN103022015A (en) * | 2012-12-27 | 2013-04-03 | 成都芯源系统有限公司 | Electrostatic discharge protection unit and semiconductor device |
| CN105322025A (en) * | 2014-08-01 | 2016-02-10 | 拉碧斯半导体株式会社 | Semiconductor element and semiconductor device |
| CN106653747A (en) * | 2016-12-29 | 2017-05-10 | 北京宇翔电子有限公司 | Anti-ESD diode and protection circuit of CMOS integrated circuit comprising same |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201906131A (en) | 2019-02-01 |
| TWI650845B (en) | 2019-02-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8278682B2 (en) | Semiconductor device | |
| JP2015012184A (en) | Semiconductor element | |
| JP2015056557A (en) | Semiconductor device | |
| US9653447B2 (en) | Local interconnect layer enhanced ESD in a bipolar-CMOS-DMOS | |
| US20180026122A1 (en) | B-TRAN Geometry and Structure That Provides Both High Gain and High Current Density | |
| CN106252385A (en) | Semiconductor structure | |
| JP2015126149A (en) | Low capacity semiconductor device and method of manufacturing the same | |
| JP2016046383A (en) | Semiconductor device | |
| CN109148553A (en) | Diode with high antistatic capacity | |
| TWI835243B (en) | Electro-static discharge protection device for semiconductor | |
| JP2014175324A (en) | Low capacity semiconductor device | |
| JP2010021218A (en) | Semiconductor device | |
| CN106663657B (en) | Electrostatic protection device and electrostatic protection circuit | |
| CN104979343B (en) | Semiconductor isolating structure | |
| US10971632B2 (en) | High voltage diode on SOI substrate with trench-modified current path | |
| WO2004090973A1 (en) | Power integrated circuits | |
| JP2015510697A (en) | Semiconductor device for current sensors in power semiconductors | |
| CN102891186A (en) | Protection diode and semiconductor device having the same | |
| EP3032579A1 (en) | An integrated circuit comprising group iii-n transistors monolithically integrated on a silicon substrate and a method for manufacturing thereof | |
| CN109817726B (en) | Asymmetric transient voltage suppressor apparatus and method of forming | |
| CN103579333B (en) | MOS electrostatic protection device | |
| JP2015179776A (en) | semiconductor device | |
| CN109801910B (en) | Asymmetric transient voltage suppressor apparatus and method of forming | |
| JP2015012259A (en) | Semiconductor device | |
| KR102171862B1 (en) | Uni-directional Transient Voltage Suppressor and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20190104 |