CN109148438A - High-voltage electrostatic protection device and equivalent circuit - Google Patents
High-voltage electrostatic protection device and equivalent circuit Download PDFInfo
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- CN109148438A CN109148438A CN201810833863.5A CN201810833863A CN109148438A CN 109148438 A CN109148438 A CN 109148438A CN 201810833863 A CN201810833863 A CN 201810833863A CN 109148438 A CN109148438 A CN 109148438A
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- 230000003071 parasitic effect Effects 0.000 claims abstract description 26
- 230000005611 electricity Effects 0.000 claims abstract description 9
- 230000003068 static effect Effects 0.000 claims abstract description 5
- 230000001960 triggered effect Effects 0.000 claims abstract description 5
- 239000003990 capacitor Substances 0.000 claims description 24
- 238000009792 diffusion process Methods 0.000 claims description 19
- 239000000203 mixture Substances 0.000 claims description 11
- 239000000758 substrate Substances 0.000 claims description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 238000003780 insertion Methods 0.000 claims description 2
- 230000037431 insertion Effects 0.000 claims description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 2
- 229920005591 polysilicon Polymers 0.000 claims description 2
- 230000035755 proliferation Effects 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 7
- 230000024241 parasitism Effects 0.000 description 5
- 238000013461 design Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 230000002633 protecting effect Effects 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements
- H01L27/0262—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements including a PNP transistor and a NPN transistor, wherein each of said transistors has its base coupled to the collector of the other transistor, e.g. silicon controlled rectifier [SCR] devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0288—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses a kind of high-voltage electrostatic protection devices; in the drain terminal of high pressure P-LDMOS, one trigger circuit is set; when circuit works normally; the trigger circuit is off state; when there is electrostatic interim; the trigger circuit is in the open state, so that the parasitic SCR structure in high pressure P-LDMOS is triggered, unlatching carrys out static electricity discharge charge.The invention discloses a kind of equivalent circuits of high-voltage electrostatic protection device.The present invention being capable of effective protection internal high pressure device.
Description
Technical field
The present invention relates to semiconductor integrated circuit fields, more particularly to a kind of high-voltage electrostatic protection device.The present invention is also
It is related to a kind of equivalent circuit of high-voltage electrostatic protection device.
Background technique
To the electrostatic protection solution of high-tension circuit, it is general there are two types of: one of them takes external protection circuit
Scheme, as shown in Figure 1, this require external protection circuit electrostatic come interim opening speed be faster than it is internal by protection circuit,
Protecting effect can be just played in this way.Conventional high pressure ESD (static discharge) device generally selects LDMOS [laterally diffused MOS (gold
Belong to oxide semiconductor) transistor], and the ESD ability of LDMOS itself is all weaker.In order to improve the flexible of ESD ability and design
Property, it is typically based on LDMOS and does some deformations, such as P-LDMOS [p-type laterally diffused MOS (metal-oxide semiconductor (MOS)) crystal
Pipe] drain electrode end be inserted into the region N+, formed parasitism SCR (silicon-controlled) structure, ESD protective capability can be greatly improved.But
Pure SCR structure occurs maintenance voltage Vh after returning phenomenon suddenly and is usually no more than 10V, has biggish latch in high pressure port application
Risk.
In addition, for it is some by protection high tension apparatus for, electrostatic come interim opening speed be although still greater than maximum
Operating voltage, but lead to the design window very little of external protection circuit very close to maximum working voltage, or even almost do not have
Have.This requires the cut-in voltages of external protection structure to need to be adjusted to otherwise not protecting and be protected in this design window
The internal high pressure device of shield.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of high-voltage electrostatic protection devices, being capable of effective protection internal high pressure
Device;For this purpose, the present invention is also provided with a kind of equivalent circuit of high-voltage electrostatic protection device.
In order to solve the above technical problems, high-voltage electrostatic protection device of the invention, is arranged one in the drain terminal of high pressure P-LDMOS
Trigger circuit, when circuit works normally, the trigger circuit is off state, and electrostatic is interim when having, the trigger circuit
In the open state, so that the parasitic SCR structure in high pressure P-LDMOS is triggered, unlatching carrys out static electricity discharge charge.
High-voltage electrostatic protection device of the invention is to increase to have trigger circuit in the drain electrode of existing high pressure P-LDMOS, can
Trigger voltage with the parasitic SCR structure being effectively reduced in high pressure P-LDMOS, the trigger voltage of the SCR structure of P-LDMOS obtain
Arrived effective optimization, protective capability has obtained significantly being promoted, solve its can not effective protection live protected internal high pressure
The problem of device.
Detailed description of the invention
Present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments:
Fig. 1 is existing external electrostatic protection circuit structure schematic diagram;
Improved high-voltage electrostatic protection device constructive embodiment (one) schematic diagram of Fig. 2;
Fig. 3 is improved high-voltage electrostatic protection device constructive embodiment (two) schematic diagram;
Fig. 4 is the equivalent circuit diagram (embodiment one) of structure shown in Fig. 2;
Fig. 5 is the equivalent circuit diagram (embodiment two) of structure shown in Fig. 2;
Fig. 6 is the equivalent circuit diagram (embodiment three) of structure shown in Fig. 2.
Specific embodiment
As shown in connection with fig. 2, improved high-voltage electrostatic protection device is real in the following way in the following embodiments
Existing: high pressure P-LDMOS is integrally placed in the buried layer above a silicon substrate.Heretofore described high pressure refers to that voltage is 12V
~120V.
The structure of comparison diagram 1, Fig. 2, it can be seen that improved high-voltage electrostatic protection device is in existing high pressure P-
Increasing in the drain electrode of LDMOS has trigger circuit, and when circuit works normally, the trigger circuit is off state, when there is electrostatic
Come temporarily, the trigger circuit is in the open state, so that the parasitic SCR structure in high pressure P-LDMOS is triggered, unlatching is to let out
Electrostatic discharge charge.
The trigger circuit can be by a resistance, and a high voltage bearing capacitor forms.Structure for trigger circuit is not
It is only limitted to the circuit structure formed above by a capacitor and a resistance.
The SCR structure is formed by the drain electrode end insertion N-type diffusion region in high pressure P-LDMOS, the diffusion of drain electrode end p-type
Area is connected to gate terminal by a resistance eutral grounding GND, while by a capacitor, and the area N+ is grounded GND;It is gate terminal and source terminal, corresponding
Trap potential connects end and connects altogether.
The capacitor can be formed by the grid capacitance of high pressure P-LDMOS, it is also possible to which high-voltage diode (referring to Fig. 3) comes
It is formed;The resistance can be formed by using polysilicon, the diffusion resistance of doping can be used also to be formed.
The area of the p type diffusion region of the drain electrode end of high pressure P-LDMOS can be adjusted according to the needs of trigger voltage, area
Bigger, trigger voltage is lower.
In Fig. 1~3,1 is P type substrate, and 2 be gate terminal, and 3 be electrostatic end.
The improved high-voltage electrostatic protection device working principle of the present invention is:
When there is the electrostatic of positive charge to enter from electrostatic end, the coupling circuit being made of capacitor and resistance can generate a coupling
The drain terminal p type diffusion region that voltage is added to high pressure P-LDMOS is closed to be spread when current potential rising in p type diffusion region reaches 0.7V by the p-type
The PN junction forward conduction of N-type diffusion region composition in HVPW (high pressure p-well) and the HVPW where area, is triggered by HVNW (high pressure N
Trap) NPN transistor of N-type diffusion region composition in/HVPW/HVPW opens, and then trigger by the p type diffusion region in HVNW/
Static electricity discharge is connected in the SCR of N-type diffusion region composition in HVNW/HVPW/HVPW.
And when circuit is in normal operating conditions, since the drain terminal p type diffusion region of high pressure P-LDMOS is connect by a resistance
Ground not will lead to high-voltage electrostatic protection device and be opened by mistake and opened.
The purposes of resistance and capacitor in the present invention is to adjust the trigger voltage of high-voltage electrostatic protection device, is closed by adjusting
Suitable capacitance resistance proportion, can be obtained different trigger voltages.
The p type diffusion regionization of connection capacitance resistance can be divided into multiple independent bulks and (such as be divided into multiple independent small
Square), for adjusting trigger voltage.
Fig. 4 is the embodiment of high-voltage electrostatic protection device equivalent circuit shown in Fig. 2 one.The circuit is by a p-type laterally diffused MOS
Transistor PM1, a capacitor C1, a PNP transistor Q1, a NPN transistor Q2 and three resistance, i.e. resistance R1, parasitic height
Press N-type trap resistance Rnw, parasitic high-voltage P-type well resistance Rpw composition.
Source electrode, grid and the substrate of p-type laterally diffused MOS transistor PM1, one end of capacitor C1, PNP transistor Q1 hair
One end of the high-pressure N-shaped well resistance Rnw of emitter-base bandgap grading and parasitism is connected with power voltage terminal VDD, and the other end and p-type of capacitor C1 is horizontal
To the diffusion drain electrode of MOS transistor PM1, one end of resistance R1, the collector of PNP transistor Q1, parasitic high-voltage P-type well resistance
One end of Rpw is connected with the base stage of NPN transistor Q2, the other end and PNP transistor of parasitic high-pressure N-shaped well resistance Rnw
The base stage of Q1 is connected with the collector of NPN transistor Q2, and resistance R1, the other end of parasitic high-voltage P-type trap Rpw and NPN are brilliant
The emitter of body pipe Q2 is grounded GND.Wherein resistance R1 and capacitor C1 constitute trigger circuit.
Fig. 5 is the embodiment of high-voltage electrostatic protection device equivalent circuit shown in Fig. 2 two.
The circuit is by a p-type laterally diffused MOS transistor PM1, a PNP transistor Q1, NPN transistor a Q2, Yi Jisan
A resistance, i.e. resistance R1, parasitic high-pressure N-shaped well resistance Rnw, parasitic high-voltage P-type well resistance Rpw composition.
Source electrode, grid and the substrate of p-type laterally diffused MOS transistor PM1, the emitter of PNP transistor Q1 and parasitism
One end of high-pressure N-shaped well resistance Rnw is connected with power voltage terminal VDD, the drain electrode of p-type laterally diffused MOS transistor PM1, electricity
Hinder the base of one end of R1, the collector of PNP transistor Q1, one end of parasitic high-voltage P-type well resistance Rpw and NPN transistor Q2
Pole is connected, the current collection of the parasitic other end of high-pressure N-shaped well resistance Rnw and the base stage of PNP transistor Q1 and NPN transistor Q2
Pole is connected, and the emitter of resistance R1, the other end of parasitic high-voltage P-type well resistance Rpw and NPN transistor Q2 are grounded GND.
P-type laterally diffused MOS transistor PM1 and resistance R1 constitute trigger circuit.
Fig. 6 is the embodiment of high-voltage electrostatic protection device equivalent circuit shown in Fig. 2 three.
The circuit is by a p-type laterally diffused MOS transistor PM1, a capacitor C1, a PNP transistor Q1, a NPN transistor
Q2 and two resistance, i.e. parasitic high-pressure N-shaped well resistance Rnw, parasitic high-voltage P-type well resistance Rpw composition.
Source electrode, grid and the substrate of p-type laterally diffused MOS transistor PM1, one end of capacitor C1, PNP transistor Q1 hair
One end of the high-pressure N-shaped well resistance Rnw of emitter-base bandgap grading and parasitism is connected with power voltage terminal VDD, the other end and PMOS of capacitor C1
The drain electrode of transistor PM1, the collector of PNP transistor Q1, one end of parasitic high-voltage P-type well resistance Rpw and NPN transistor Q2
Base stage be connected, the parasitic other end of high-pressure N-shaped well resistance Rnw and the base stage of PNP transistor Q1 and NPN transistor Q2's
Collector is connected, and the other end of parasitic high-voltage P-type well resistance Rpw and the emitter of NPN transistor Q2 are grounded GND.
The high-voltage P-type well resistance Rpw of p-type laterally diffused MOS transistor PM1, capacitor C1 and parasitism constitutes trigger circuit.
Above by specific embodiment, invention is explained in detail, but these are not constituted to of the invention
Limitation.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these
It should be regarded as protection scope of the present invention.
Claims (12)
1. a kind of high-voltage electrostatic protection device, it is characterised in that: a trigger circuit is arranged in the drain terminal of high pressure P-LDMOS, works as electricity
When road works normally, the trigger circuit is off state, and when there is electrostatic interim, the trigger circuit is in the open state,
So that the parasitic SCR structure in high pressure P-LDMOS is triggered, unlatching carrys out static electricity discharge charge.
2. high-voltage electrostatic protection device as described in claim 1, it is characterised in that: the trigger circuit is resistance to by a resistance, one
The capacitor of high pressure forms.
3. high-voltage electrostatic protection device as claimed in claim 2, it is characterised in that: the capacitor by high pressure P-LDMOS grid
Electrode capacitance is formed.
4. high-voltage electrostatic protection device as described in claim 1, it is characterised in that: the trigger circuit is high by a resistance, one
Press diode composition.
5. high-voltage electrostatic protection device as claimed in claim 2 or 4, it is characterised in that: the resistance is using polysilicon come shape
At, or formed using the diffusion resistance of doping.
6. high-voltage electrostatic protection device as described in claim 1, it is characterised in that: the SCR structure is by the leakage in P-LDMOS
Extreme insertion N-type diffusion region is formed, and drain electrode end p type diffusion region is connected to gate terminal by a capacitor by a resistance eutral grounding,
The area N+ ground connection;Gate terminal and source terminal, corresponding trap potential connect end and connect altogether.
7. high-voltage electrostatic protection device as described in claim 1, it is characterised in that: the p-type of the drain electrode end of high pressure P-LDMOS expands
The area for dissipating area is adjusted according to the needs of trigger voltage, and area is bigger, and trigger voltage is lower.
8. high-voltage electrostatic protection device as described in claim 1, it is characterised in that: high pressure P-LDMOS is integrally placed at silicon lining
In buried layer above bottom.
9. high-voltage electrostatic protection device as claimed in claim 6, it is characterised in that: connect the p type diffusion region of capacitance resistance
It is divided into multiple independent bulks, for adjusting trigger voltage.
10. a kind of equivalent circuit of high-voltage electrostatic protection device described in claim 1, it is characterised in that: the circuit is by p-type cross
To diffusion MOS transistor, a capacitor, a PNP transistor, a NPN transistor and three resistance compositions;
Source electrode, grid and the substrate of first p-type laterally diffused MOS transistor, one end of first capacitor, the first PNP transistor
One end of emitter and second resistance is connected with power voltage terminal VDD, the other end of first capacitor and the first p-type horizontal proliferation
Drain electrode, one end of first resistor, the collector of the first PNP transistor, one end of 3rd resistor and the first NPN of MOS transistor
The base stage of transistor is connected, the current collection of the base stage and the first NPN transistor of the other end of second resistance and the first PNP transistor
Pole is connected, and the emitter of first resistor, the other end of 3rd resistor and the first NPN transistor is grounded GND;Wherein, the first electricity
Resistance and first capacitor constitute trigger circuit, and second resistance is parasitic high-pressure N-shaped well resistance, and 3rd resistor is parasitic high pressure
P-type well resistance.
11. a kind of equivalent circuit of high-voltage electrostatic protection device described in claim 1, it is characterised in that: one p-type of circuit is lateral
Spread MOS transistor, a PNP transistor, a NPN transistor and three resistance compositions;
The emitter and second resistance of source electrode, grid and the substrate of first p-type laterally diffused MOS transistor, the first PNP transistor
One end be connected with power voltage terminal VDD, the drain electrode of the first p-type laterally diffused MOS transistor, one end of first resistor,
The collector of one PNP transistor, one end of 3rd resistor are connected with the base stage of the first NPN transistor, second resistance it is another
End be connected with the collector of the base stage of the first PNP transistor and the first NPN transistor, first resistor, 3rd resistor it is another
The emitter of end and the first NPN transistor is grounded GND;Wherein, the first p-type laterally diffused MOS transistor and first resistor composition
Trigger circuit, second resistance are parasitic high-pressure N-shaped well resistance, and 3rd resistor is parasitic high-voltage P-type well resistance.
12. a kind of equivalent circuit of high-voltage electrostatic protection device described in claim 1, it is characterised in that: the circuit is by p-type cross
To diffusion MOS transistor, a capacitor, a PNP transistor, a NPN transistor and two resistance compositions;
Source electrode, grid and the substrate of first p-type laterally diffused MOS transistor, one end of first capacitor, the first PNP transistor
One end of emitter and second resistance is connected with power voltage terminal VDD, the other end of first capacitor and the first p-type horizontal proliferation
The drain electrode of MOS transistor, the collector of the first PNP transistor, 3rd resistor one end be connected with the base stage of the first NPN transistor
It connects, the other end of second resistance is connected with the collector of the base stage of the first PNP transistor and the first NPN transistor, third electricity
The emitter of the other end of resistance and the first NPN transistor is grounded GND;Wherein the first p-type laterally diffused MOS transistor, the first electricity
Hold and 3rd resistor constitutes trigger circuit, second resistance is parasitic high-pressure N-shaped well resistance, and 3rd resistor is parasitic high pressure
P-type well resistance.
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CN201810833863.5A CN109148438B (en) | 2018-07-26 | 2018-07-26 | High-voltage electrostatic protection device and equivalent circuit |
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CN201810833863.5A CN109148438B (en) | 2018-07-26 | 2018-07-26 | High-voltage electrostatic protection device and equivalent circuit |
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CN109148438B CN109148438B (en) | 2020-09-25 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111129002A (en) * | 2019-12-10 | 2020-05-08 | 上海华虹宏力半导体制造有限公司 | Electrostatic protection circuit |
WO2023000489A1 (en) * | 2021-07-19 | 2023-01-26 | 长鑫存储技术有限公司 | Electrostatic protection circuit and chip |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103258814A (en) * | 2013-05-15 | 2013-08-21 | 电子科技大学 | LDMOS SCR for protection against integrated circuit chip ESD |
US20170062406A1 (en) * | 2015-08-31 | 2017-03-02 | Samsung Electronics Co., Ltd. | Electrostatic discharge protection device and electronic device having the same |
CN108281420A (en) * | 2018-01-25 | 2018-07-13 | 上海华虹宏力半导体制造有限公司 | Esd device structure |
-
2018
- 2018-07-26 CN CN201810833863.5A patent/CN109148438B/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103258814A (en) * | 2013-05-15 | 2013-08-21 | 电子科技大学 | LDMOS SCR for protection against integrated circuit chip ESD |
US20170062406A1 (en) * | 2015-08-31 | 2017-03-02 | Samsung Electronics Co., Ltd. | Electrostatic discharge protection device and electronic device having the same |
CN108281420A (en) * | 2018-01-25 | 2018-07-13 | 上海华虹宏力半导体制造有限公司 | Esd device structure |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111129002A (en) * | 2019-12-10 | 2020-05-08 | 上海华虹宏力半导体制造有限公司 | Electrostatic protection circuit |
CN111129002B (en) * | 2019-12-10 | 2022-08-16 | 上海华虹宏力半导体制造有限公司 | Electrostatic protection circuit |
WO2023000489A1 (en) * | 2021-07-19 | 2023-01-26 | 长鑫存储技术有限公司 | Electrostatic protection circuit and chip |
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