CN109120369B - A kind of SDH data processing method, system and relevant apparatus - Google Patents
A kind of SDH data processing method, system and relevant apparatus Download PDFInfo
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- CN109120369B CN109120369B CN201811406700.5A CN201811406700A CN109120369B CN 109120369 B CN109120369 B CN 109120369B CN 201811406700 A CN201811406700 A CN 201811406700A CN 109120369 B CN109120369 B CN 109120369B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1611—Synchronous digital hierarchy [SDH] or SONET
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/16—Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
- H04J3/1605—Fixed allocated frame structures
- H04J3/1652—Optical Transport Network [OTN]
- H04J3/1664—Optical Transport Network [OTN] carrying hybrid payloads, e.g. different types of packets or carrying frames and packets in the paylaod
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0001—Systems modifying transmission characteristics according to link quality, e.g. power backoff
- H04L1/0002—Systems modifying transmission characteristics according to link quality, e.g. power backoff by adapting the transmission rate
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Abstract
This application discloses a kind of SDH data processing methods, it is carried out using oversampling technique oversampled, obtain parallel more bit SDH data that number of bits is up to 64 bits, since the parallel SDH data of 64 bit of highest correspond to the interface rate that highest level is STM-64, by the re-sampling for pressing each lower STM grade, it can obtain the parallel SDH data respectively with each STM grade corresponding interface rate-compatible, the purpose of compatible total interface rate can be realized in the parallel SDH data that recycling frame synchronization code character filters out adaptation current interface rate, flexibility greatly enhances, usage scenario is more extensive.The application further simultaneously discloses a kind of SDH data processing system, compatibility of multi-rate device, computer readable storage medium and data processing equipment, has above-mentioned beneficial effect.
Description
Technical field
This application involves Data Format Transform field, in particular to a kind of SDH data processing method, system, multi tate are simultaneous
Capacitance device, computer readable storage medium and data processing equipment.
Background technique
With the increasingly increase of web database technology, it is based on SDH(Synchronous Digital Hierarchy, same to step number
Font system is corresponding message structure to be provided by the transmission of the digital signal for friction speed, including multiplexing method and reflect
Shooting method and relevant synchronous method composition a technical system) network POS(Packet Over SDH, be SDH net
A kind of implementation of network bearer IP service) requirement of interface bandwidth and complexity is consequently increased, and POS technology is in backbone network
In be widely used.
Meanwhile the demands such as monitoring analysis of pos line also increasingly increase, however the background analysis server of the overwhelming majority is all
It is Ethernet interface, this just needs to realize the conversion between pos line and ethernet link between different data format, and in order to guarantee
The stabilization and uniformity of network, equipment also need support the transparent transmission of link load data and Overhead, allow pos line two
The POS terminal perception at end is truly realized the original operating status for not influencing current ink less than the presence of intermediate concatenation equipment.I.e.
Identifiable POS terminal is high speed serialization single-bit SDH data flow, and background server is identifiable, is high speed serialization digital ratio
Special ethernet data stream.
The format conversion between SDH data and Ethernet data is usually realized by dedicated framer chip on the market,
But current each framer chip defines a fixed interface rate, can only be compatible with the application using respective rate,
It can not be compatible with the application of other rates, so that flexibility is had a greatly reduced quality.Meanwhile each framer chip is also only a POS
Interface realizes the conversion of data format, and when pos interface number increases, increased framer chip can not only be occupied on board therewith
A large amount of limited areas, can also bring bigger power consumption, great difficulty be brought to the design of hardware, so that cannot achieve height
Density pos interface.
Therefore, how to overcome it is existing by framer chip realize Data Format Transform scheme existing for technological deficiency, mention
A kind of SDH data processing method for compatible multiple interfaces rate is those skilled in the art's urgent problem to be solved.
Summary of the invention
The purpose of the application is to provide a kind of SDH data processing method, oversampled using oversampling technique progress, obtains
Number of bits is up to parallel more bit SDH data of 64 bits, since the parallel SDH data correspondence of 64 bit of highest is most high
Grade is that the interface rate of STM-64 can be obtained corresponding with each STM grade respectively by pressing the re-sampling of each lower STM grade
The compatible parallel SDH data of interface rate, recycle frame synchronization code character to filter out the parallel SDH data of adaptation current interface rate
The purpose of compatible total interface rate can be realized, flexibility greatly enhances, and usage scenario is more extensive.
The another object of the application is the provision of a kind of SDH data processing system, compatibility of multi-rate device, computer can
Read storage medium and data processing equipment.
To achieve the above object, the application provides a kind of SDH data processing method, this method comprises:
Receive the serial single-bit SDH data of input；
The serial single-bit SDH data are handled using oversampling technique, obtain parallel more bit SDH data；
Wherein, the number of bits of parallel more bit SDH data is up to 64 bits；
Re-sampling is carried out respectively by the corresponding message transmission rate of each STM grade, is obtained and each STM ranking score
Parallel SDH data after not corresponding each fractionation；
Interface rate matching is carried out to SDH data parallel after each fractionation using frame synchronization code character, is obtained and target STM
The corresponding target parallel SDH data of grade.
Optionally, interface rate matching is carried out to SDH data parallel after each fractionation using frame synchronization code character, comprising:
Data shifting processing is carried out to SDH data parallel after each fractionation；
After the completion of each data shifting processing, location matches are carried out with the frame synchronization code character；
By the continuously parallel SDH data after the fractionation that the same position of N number of consecutive frame recognizes the frame synchronization code character
Corresponding STM grade is as the target STM grade；
Wherein, N is the positive integer more than or equal to 2.
Optionally, the SDH data processing method further include:
After selection obtains the target parallel SDH data, target corresponding with the target parallel SDH data is used
STM grade mark present SDH data transmission network.
To achieve the above object, present invention also provides a kind of SDH data processing systems, comprising:
Single-bit SDH data receipt unit, serial single-bit SDH data for receiving input；
Over-sampling unit is obtained parallel for being handled using oversampling technique the serial single-bit SDH data
More bit SDH data；Wherein, the number of bits of parallel more bit SDH data is up to 64 bits；
By STM grade split cells, for being adopted again respectively by the corresponding message transmission rate of each STM grade
Sample obtains parallel SDH data after each fractionation corresponding with each STM grade；
Target interface de-rate matching unit, for being carried out using frame synchronization code character to SDH data parallel after each fractionation
Interface rate matching, obtains target parallel SDH data corresponding with target STM grade.
Optionally, the target interface de-rate matching unit includes:
Data shift subelement, for carrying out data shifting processing to SDH data parallel after each fractionation；
Location matches subelement, for being carried out with the frame synchronization code character after the completion of each data shifting processing
Location matches；
Target STM grade determines subelement, same for recognizing the frame in the same position of N number of consecutive frame for continuously
The corresponding STM grade of parallel SDH data after the fractionation of code character is walked as the target STM grade.
Optionally, the SDH data processing system further include:
Target STM grade mark unit, for after selection obtains the target parallel SDH data, using with the mesh
Mark the corresponding target STM grade mark present SDH data transmission network of parallel SDH data.
To achieve the above object, present invention also provides a kind of compatibility of multi-rate device, which includes:
Memory, for storing computer program；
Processor realizes the SDH data processing method as described in above content when for executing the computer program
The step of.
To achieve the above object, described computer-readable to deposit present invention also provides a kind of computer readable storage medium
It is stored with computer program on storage media, is realized as described in above content when the computer program is executed by processor
The step of SDH data processing method.
To achieve the above object, present invention also provides a kind of data processing equipments, are applied to pos line and Ethernet link
In, including POS_PHY transceiver module, Overhead extraction module, VC load extraction module, PPP/HDLC solution meaning transferring module, with
Too frame conversion module, ETH_PHY transceiver module, POS Frame Protocol conversion module, PPP/HDLC meaning transferring module, VC load map mould
Block and SDH frame mapping block, further include the compatibility of multi-rate device as described in above content.
Optionally, the data processing equipment is specially FPGA data processing board.
Obviously, a kind of SDH data processing method provided herein, it is oversampled using oversampling technique progress, it obtains
It is up to parallel more bit SDH data of 64 bits to number of bits, due to the parallel SDH data corresponding grade of 64 bit of highest
For the interface rate of STM-64, by pressing the re-sampling of each STM grade, can obtain respectively with each STM grade corresponding interface rate
Compatible parallel SDH data, the parallel SDH data for recycling frame synchronization code character to filter out adaptation current interface rate can be realized
The purpose of compatible total interface rate, flexibility greatly enhance, and usage scenario is more extensive.The application additionally provides one kind simultaneously
SDH data processing system, compatibility of multi-rate device, computer readable storage medium and data processing equipment have with above-mentioned
Beneficial effect, details are not described herein.
Detailed description of the invention
In order to illustrate the technical solutions in the embodiments of the present application or in the prior art more clearly, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
The embodiment of application for those of ordinary skill in the art without creative efforts, can also basis
The attached drawing of offer obtains other attached drawings.
Fig. 1 is the structure chart of STM-N frame；
Fig. 2 is the structure chart of PPP frame；
Fig. 3 is a kind of flow chart of SDH data processing method provided by the embodiments of the present application；
Fig. 4 is the flow chart of another kind SDH data processing method provided by the embodiments of the present application；
Fig. 5 is a kind of structural block diagram of SDH data processing system provided by the embodiments of the present application；
Fig. 6 is a kind of structural block diagram of the concatenation transceiver of POS link provided by the embodiments of the present application.
Specific embodiment
Some proper nouns for occurring in subsequent text in order to facilitate understanding, at this to this application involves technical background progress
It elaborates:
POS is IP data packet by using peer-peer protocol PPP(Point to Point Protocol) to IP data packet
It is packaged, and uses HDLC(High-Level Data Link Control, High-Level Data Link Control is one same
The data link layer protocol of step transfers on network data, Bit Oriented) frame format be mapped to SDH/SONET frame (one group in optical fiber
Upload the rate and format of optical signals) on, it is continuously transmitted by some corresponding linear speed, it remains IP towards disconnected
Characteristic.Backbone network bandwidth with higher based on POS technology, and there are many speed grade for networking selection, wherein
STM-1 is 155.52M, STM-4 622.08M, STM-16 2488.32M, STM-64 9553.28M, networking plan flexibly,
Network administration properties are strong, have the function of the advantages such as fast quick-recovery.
By the frame of STM-N as physical layer load carrying frame, the frame structure of STM-N is made of SDH network 3 parts: section overhead (packet
Include regeneration section overhead (RSOH) and multiplex section overhead (MSOH)), Administrative Unit Pointer (AU-PTR) and information payload, can join
STM-N frame structure diagram as shown in Figure 1.Information payload is that the various letters that will be transmitted by STM-N are stored in STM-N frame structure
Cease the place of code block；Section overhead (SOH) is to guarantee that information payload normally flexibly transmission institute additional must transport for network
Row manages and maintains the byte that (OAM) is used, and section overhead is divided into regeneration section overhead (RSOH) and multiplex section overhead (MSOH) again,
Corresponding section layer is monitored respectively, position of the regeneration section overhead in STM-N frame is first to the first to the 9th of the third line
× N column, totally 3 × 9 × N number of byte；Position of the multiplex section overhead in STM-N frame is the first to 9 × N of the 5th to the 9th row
Column, totally 5 × 9 × N number of byte；Administrative Unit Pointer (AU-PTR) is located at 9 × N column of the 4th row in STM-N frame, totally 9 × N number of word
Section, AU-PTR is used to refer to the indicator of accurate location of the first character section of information payload in STM-N frame, so as to receiving end
Information payload can be properly separated according to the value (pointer value) of this location pointer.
RFC1619 defines the interface of PPP and SONET/SDH, describes PPP specifically answering in SONET/SDH network
With.When SONET/SDH is configured as the link of point-to-point, ppp protocol can support this link well.Ppp protocol will
SONET/SDH transmission channel is considered as the synchronization link of byte-oriented, provides the datagram encapsulation mechanism of link layer.Ppp protocol is given
Physical layer provides a byte type interface, and PPP frame is mapped into SONET/SDH net load as byte stream, and the load of PPP frame
Part may be used for the information transmitted required for encapsulation user, reference can be made to the structure chart of PPP frame shown in Fig. 2.
The core of the application is to provide a kind of SDH data processing method, system, compatibility of multi-rate device, computer-readable
Storage medium and data processing equipment, oversampled using oversampling technique progress, obtaining number of bits is up to 64 bits
Parallel more bit SDH data, due to 64 bit of highest parallel SDH data corresponding grade be STM-64 interface rate, lead to
The re-sampling by each STM grade is crossed, the parallel SDH data respectively with each STM grade corresponding interface rate-compatible, then benefit can be obtained
The mesh of compatible total interface rate can be realized with the parallel SDH data that frame synchronization code character filters out adaptation current interface rate
, flexibility greatly enhances, and usage scenario is more extensive.
To keep the purposes, technical schemes and advantages of the embodiment of the present application clearer, below in conjunction with the embodiment of the present application
In attached drawing, the technical scheme in the embodiment of the application is clearly and completely described, it is clear that described embodiment is
Some embodiments of the present application, instead of all the embodiments.Based on the embodiment in the application, those of ordinary skill in the art
All other embodiment obtained without making creative work, shall fall in the protection scope of this application.
Embodiment one
Below in conjunction with Fig. 3, Fig. 3 is a kind of flow chart of SDH data processing method provided by the embodiments of the present application, specific
The following steps are included:
S101: the serial single-bit SDH data of input are received；
This step is intended to receive by a kind of interface device that 10,000,000,000 optical signals are converted to electric signal of optical port SFP+() input
High speed serialization single-bit SDH data.
S102: being handled serial single-bit SDH data using oversampling technique, obtains parallel more bit SDH data；
On the basis of S101, this step is intended to carry out the serial single-bit SDH received using oversampling technique
Sampling processing obtains parallel more bit SDH data, wherein and the number of bits of parallel more bit SDH data is up to 64,
The parallel SDH data that corresponding grade is STM-64, interface transmission rate is 10G, correspondingly, if corresponding grade is STM-16, connects
Port transmission rate is that 2488.32 M(can approximation 2.5G) the bit numbers of parallel SDH data be 16, and so on obtain and STM-
4 corresponding 4 bit parallel SDH data etc..
Why the parallel SDH data of up to 64 bits are obtained using oversampling technique, be because of present SDH network
The interface rate of middle list serial line interface is up to the corresponding 10G of STM-64, can recognize that number of bits is 64 parallel SDH number
According to, had reached the upper limit, and grade lower STM-16, STM-4 and STM-1 then corresponding identification number of bits be 16,4 with
And 1 SDH data, a kind of therefore method of compatible multiplex roles rate are as follows: the 64 bit parallel SDH obtained using oversampling technique
Data, when corresponding interface rate is 10G, all 64 bits are all valid data；When corresponding interface rate is 2.5G, often
Only having 16 bits in 64 bits is valid data, remaining is duplicate invalid data；It is 9553.28M in corresponding interface rate
When, every 64 bit only have 4 bits be valid data, remaining is duplicate invalid data, can and so on it is corresponding to STM-1
Interface rate 155.52M.
I.e. by the parallel SDH data of the higher bit number that oversampling technique obtains can by simply splitting in the way of compatible low speed
Rate interface, but directly with the parallel SDH data that identical polydispersity index obtains be can not upward-compatible higher rate interface.
Further, there is no the standards that even lower level is only existed based on STM-64(in clearly learning the network) it is corresponding
It is that rate is transmitted in application, can by the bit number of the parallel more bit SDH data obtained by oversampling technique will for 32 ratio
Same purpose also may be implemented in spy, if can further decrease, can flexible choice according to the actual situation, do not do and have herein
Body limits.
S103: re-sampling is carried out respectively by the corresponding message transmission rate of each STM grade, is obtained and each STM grade
SDH data arranged side by side after corresponding fractionation；
On the basis of S102, this step provides a kind of fractionation means, so as to the subsequent frame synchronization in current network
Code character does interface rate matching, i.e., carries out re-sampling respectively by the corresponding message transmission rate of each STM grade, obtain with respectively
SDH data arranged side by side after the corresponding fractionation of STM grade.For example, the 64 bit parallel SDH data that S102 is obtained, are pressed respectively
It is split, is obtained corresponding with STM-16 according to corresponding 16 bit of STM16, STM-4 and STM-1,4 bits and 1 bit
The 16 bit parallel SDH data and corresponding 4 bit parallel SDH data of STM-4 and single-bit SDH number corresponding with STM-1
According to.
S104: interface rate matching is carried out to SDH data parallel after each fractionation using frame synchronization code character, is obtained and target
The corresponding target parallel SDH data of STM grade.
On the basis of S103, this step is intended to carry out interface to SDH data parallel after each fractionation using frame synchronization code character
Rate-matched obtains target parallel SDH data corresponding with target STM grade.Purpose is to find currently used in network
Interface rate, with the compatible application for carrying out data identification using respective rate.A kind of interface rate matching for including but is not limited to
Method are as follows:
Data shifting processing is carried out to SDH data parallel after each fractionation, and after the completion of each data shifting processing, with frame
Synchronous code character carries out location matches；
By continuously parallel SDH data are corresponding after the fractionation that the same position of N number of consecutive frame recognizes frame synchronization code character
STM grade as target STM grade.Wherein, N is the positive integer more than or equal to 2, i.e., at least needs in continuous two consecutive frames
Same position recognize identical frame synchronization code character and could illustrate that corresponding SDH data flow is matching and the rate of current interface
's.
Based on the above-mentioned technical proposal, a kind of SDH data processing method provided by the embodiments of the present application, utilizes oversampling technique
It carries out oversampled, obtains parallel more bit SDH data that number of bits is up to 64 bits, it is parallel due to 64 bit of highest
SDH data correspond to the interface rate that highest level is STM-64, by pressing the re-sampling of each STM grade, can obtain respectively and respectively
The parallel SDH data of lower STM grade corresponding interface rate-compatible recycle frame synchronization code character to filter out adaptation current interface
The purpose of compatible total interface rate can be realized in the parallel SDH data of rate, and flexibility greatly enhances, and usage scenario is wider
It is general.
Embodiment two
Below in conjunction with Fig. 4, Fig. 4 is the flow chart of another kind SDH data processing method provided by the embodiments of the present application, this reality
It applies example on the basis of example 1, gives how one kind carries out the matched method of interface rate by S204 and S205, also
A kind of side for exempting the subsequent interface rate matching process of progress again by label target STM grade is given by S206
Method, it should be noted that the two preferred method can be based solely on embodiment one and obtain single combined embodiment, can also be with
More complicated, implementation more preferably embodiment is freely formed, the present embodiment is only as while comprising above-mentioned two excellent
One embodiment of scheme is selected to exist, specific implementation step is as follows:
S201: the serial single-bit SDH data of input are received；
S202: being handled serial single-bit SDH data using oversampling technique, obtains parallel more bit SDH data；
S203: re-sampling is carried out respectively by the corresponding message transmission rate of each STM grade, is obtained and each STM grade
SDH data arranged side by side after corresponding fractionation；
S204: data shifting processing is carried out to SDH data parallel after each fractionation, and is completed in each data shifting processing
Afterwards, location matches are carried out with frame synchronization code character；
Shifting function is usually to shift fixed position every time to preferably carry out location matches with frame synchronization code character
Number, and location matches are carried out again after each displacement.
S205: by the continuously parallel SDH data after the fractionation that the same position of N number of consecutive frame recognizes frame synchronization code character
Corresponding STM grade is as target STM grade；
Most basic, N can be chosen to be 2, and with the increase of N, matching precision and accuracy are higher.
S206: after selection obtains target parallel SDH data, target STM corresponding with target parallel SDH data etc. is used
Grade label present SDH data transmission network.
When SDH data transmission network has not been changed interface rate, the target STM grade mark that usable S205 is obtained is current
SDH data transmission network accelerates subsequent mistake so as to the subsequent compatible adaptation procedure it is not necessary that above-mentioned complexity is repeated again
Journey.When SDH data transmission network is dynamically adapted interface rate, can also be gone when receiving interface rate variable signal
Except the label, the compatible adaptation procedure of interface rate is re-started.
Because situation is complicated, it can not enumerate and be illustrated, those skilled in the art should be able to recognize according to the application
The basic skills principle combination actual conditions of offer may exist many examples, in the case where not paying enough creative works,
It should within the scope of protection of this application.
Embodiment three
Fig. 5 is referred to below, and Fig. 5 is a kind of structural block diagram of SDH data processing system provided by the embodiments of the present application, should
SDH data processing system may include:
Single-bit SDH data receipt unit 100, serial single-bit SDH data for receiving input；
Over-sampling unit 200 is obtained parallel for being handled using oversampling technique serial single-bit SDH data
More bit SDH data；Wherein, the number of bits of parallel more bit SDH data is up to 64 bits；
By STM grade split cells 300, for being carried out again respectively by the corresponding message transmission rate of each STM grade
Sampling obtains parallel SDH data after each fractionation corresponding with each STM grade；
Target interface de-rate matching unit 400, for being connect using frame synchronization code character to SDH data parallel after each fractionation
Mouth rate-matched, obtains target parallel SDH data corresponding with target STM grade.
Wherein, target interface de-rate matching unit 400 may include:
Data shift subelement, for carrying out data shifting processing to SDH data parallel after each fractionation；
Location matches subelement, for carrying out location matches with frame synchronization code character after the completion of each data shifting processing；
Target STM grade determines subelement, same for continuous n times to be recognized frame in the same position of N number of consecutive frame
The corresponding STM grade of parallel SDH data after the fractionation of code character is walked as target STM grade.
Further, the SDH data processing system further include:
Target STM grade mark unit, for after selection obtains target parallel SDH data, using with target parallel SDH
The corresponding target STM grade mark present SDH data transmission network of data.
Based on the above embodiment, present invention also provides a kind of compatibility of multi-rate device, the apparatus may include memories
And processor, wherein there is computer program in the memory, when which calls the computer program in the memory,
Step provided by above-described embodiment may be implemented.Certainly, the device can also include various necessary network interfaces, power supply with
And other components etc..
Present invention also provides a kind of computer readable storage mediums, have computer program thereon, the computer program
Step provided by above-described embodiment may be implemented when being performed terminal or processor execution.The storage medium may include: U
Disk, mobile hard disk, read-only memory (Read-Only Memory, ROM), random access memory (Random Access
Memory, RAM), the various media that can store program code such as magnetic or disk.
Example IV
On the basis of the various embodiments described above, present invention also provides a kind of data for being provided with the compatibility of multi-rate device
Processing equipment is applied in pos line and Ethernet link, in addition to the compatibility of multi-rate device, is additionally provided with more conventional
POS_PHY transceiver module, Overhead extraction module (are only carried out conventional place by standard practice instructions to obtained SDH data
Reason), VC load extraction module, PPP/HDLC solution meaning transferring module, Ether frame conversion module, ETH_PHY transceiver module, POS frame association
Conversion module, PPP/HDLC meaning transferring module, VC load map module and SDH frame mapping block are discussed, conventional modules are in multi tate
The adaptation and compatibility of multiplex roles rate can be achieved with the help of compatible apparatus.
Further, which can also be the FPGA data processing board manufactured based on FPGA technology
Card the advantages of by modularized design and concurrent operation, lower cost can be used to realize the function due to existing framer chip
Energy.
The present embodiment additionally provides a kind of by function included by the compatibility of multi-rate device and existing other functional modules
The concatenation transceiver of the POS link obtained after being integrated is different from above-mentioned existing capability module, the concatenation of the POS link
Transceiver by the serial parallel conversion of compatibility of multi-rate device, over-sampling thin consolidation into existing POS_PHY transceiver module,
To determine target, the part of the target parallel SDH data of adaptation current scene rate and the progress of Overhead extraction module are whole out
It closes, has obtained the SDH frame synchronization module for replacing former Overhead extraction module.The form integrated is not to increase new function
The mode of module, but new function and existing capability module are integrated, so that functional module quantity is constant, but can be with new
Data processing method realize the purpose to be realized of the application.
I.e. the concatenation transceiver of the POS link will be mentioned by POS_PHY transceiver module, SDH frame synchronization module, VC load
Modulus block, PPP/HDLC solution meaning transferring module, Ether frame conversion module, ETH_PHY transceiver module, POS Frame Protocol conversion module,
PPP/HDLC meaning transferring module, VC load map module, SDH frame mapping block composition.Each intermodule connection type can be found in Fig. 6,
Each functions of modules paraphrase is as follows:
POS_PHY module uplink completes the serioparallel exchange function of accessed SDH high-speed data, parses the big bit wide of low speed simultaneously
Row POS data stream, downlink complete the parallel-serial conversion of the big bit wide parallel data stream of low speed, highspeed serial data stream are issued to SDH
Network.The POS_PHY module uses oversampling technique, and the data of 155m, 622m, 2.5G, 10G interface is supported to restore；
Identification and alignment of the SDH frame synchronization module to SDH frame head in the data flow of over-sampling, adaptation rate and output link
Status information and STM-N frame；
VC load extraction module completes current pointer regulation movement by current AU-PTR pointer value, and extracts
VC4 payload segment (i.e. information payload)；
PPP/HDLC solves meaning transferring module and the data frame (i.e. VC4 payload segment) of the PPP/HDLC of input is carried out 7D/7E word
The solution escape of section operates, and parses PPP information frame；
Ether frame conversion module removes PPP frame head, and exports after entire message is encapsulated as the Ethernet packet an of standard；
ETH_PHY module uplink completes the parallel-serial conversion function of Ethernet data, and high speed Ethernet data flow is exported, under
Row completes the serioparallel exchange function of Ethernet high-speed data, parses the parallel ether data flow of the big bit wide of low speed；
Ether network packet is encapsulated as the output of standard PPP/HDLC frame by POS frame conversion module；
PPP/HDLC meaning transferring module operates the escape that PPP/HDLC frame completes 7D/7E byte；
The load map and frame scrambling code of VC load map module completion VC4；
SDH frame mapping block by packaged VC4 mapping in STM-N frame, and affix overhead part, according to receiving side
The rate that is adapted to of SDH synchronization module exported；
The use process of each above-mentioned each module will be illustrated in detail from POS receiving side and the sending side POS respectively below:
POS receiving side:
It after the SDH frame of access is realized frame synchronization, is extracted by VC load, after solving escape, obtains PPP frame, finally convert
For output after Ether frame to ether side.
(a part of POS_PHY transceiver module, the data for go here and there → simultaneously turn POS_PHY serioparallel exchange module
Change): the high speed serialization single-bit SDH data that optical port SFP+ is inputted are the parallel big bit wide data of low speed by serioparallel exchange,
The simultaneously operating with road synchronised clock, for subsequent parallel data is recovered from high-speed data simultaneously.Meanwhile using over-sampling
Technology makes interface that the data of the interface rates of a variety of SDH such as 155M, 622M, 2.5G, 10G be supported to restore, and output 64bit is simultaneously
Row sampled data, when current interface is 10G route, all 64bit are valid data, and when for 2.5G, in 64bit only
Having 16bit is valid data, and when being 622m, only 4bit is valid data, and when being 155m, only 1bit is valid data,
His invalid data is all to repeat over-sampling data.
SDH frame synchronization module: synchronization module by the 64bit data of input carry out respectively 4 kinds of rates sampling and by pair
The parallel data of input is shifted, constantly compared with frame synchronization code character A1A2 carries out matching, until it is same to recognize frame twice in succession
Step code character appears in the same positions of two frames, then it represents that has found frame head and synchronizes and successfully and correctly identifies current interface rate mould
Formula, while exporting and pulse is identified to frame head.According to frame head synchronization pulse, the VC4 in the STM-N signal inputted parallel
Payload segment is output to rear stage processing module, while the Overhead of the SDH frame such as SOH, POH, pointer is extracted caching
In downlink SDH frame mapping block.
VC load extraction module: by extracting current AU-PTR pointer value, current pointer regulation movement is completed, simultaneously
Judge initial position of the current load in SDH frame, extracts VC4 payload segment.
PPP/HDLC solves meaning transferring module: the solution escape that the data frame of the PPP/HDLC of input carries out 7D/7E byte is operated.
Ether frame conversion module: PPP/HDLC frame is after solving escape, the PPP frame obtained, by the behaviour for removing PPP frame head
Make, and affix ethernet source MAC, mesh MAC, entire message is encapsulated as the Ethernet packet an of standard by ether type field
After export, and the information for the PPP frame head removed is recorded in the MAC of source, ether network packet can be under after guaranteeing conversion
Row output end reverts to PPP frame as former state.
(a part of ETH_PHY transceiver module turns ETH_PHY parallel serial conversion module for realizing simultaneously → string data
Change): it is high-speed single-bit data flow that packaged parallel low-rate Ethernet data, which is carried out parallel-serial conversion, after pass through optical port
SFP+ sends output.
The sending side POS:
The message that Ethernet surveys input is converted into PPP frame, after escape and load map, obtains VC payload segment,
Finally export after the mapping of the frame of SDH to the side POS.
ETH_PHY serioparallel exchange module (a part of ETH_PHY transceiver module, for realizing string → and data turn
Change): the high speed serialization single-bit Ethernet data that optical port SFP+ is inputted is the parallel big bit wide number of low speed by serioparallel exchange
According to, while recovering from high-speed data the simultaneously operating with road synchronised clock, for subsequent parallel data.
POS frame conversion module: after ethernet frame input, the PPP frame originating point information recorded in extraction source MAC, by ethernet source
MAC, mesh MAC, ether type field are removed, and behind affix PPP/HDLC frame head part, entire message is encapsulated as standard PPP/
HDLC frame.
PPP/HDLC meaning transferring module: the inverse process of solution escape is completed.By the data without escape PPP/HDLC of input
Frame carries out the solution escape operation of 7D/7E byte, while the tail portion that 7E frame period byte is additional to each PPP frame being used between frame
Disconnected mark.
VC load map module: the load map of VC4 is completed, and the overhead field that uplink receiving is cached is inserted into entirely
SDH frame, while realizing entire VC4 frame scrambling code.Simultaneously in order to guarantee opposite equip. link examine field B1B2B3 it is correct
Property, all B1B2B3 fields carry out verification again in this module and calculate and be inserted into new SDH frame.
SDH frame mapping block: encapsulation STM-N frame, the expense that uplink receiving is cached and newly-generated VC4 load one
One maps in new STM-N frame, while carrying out physical layer Scrambling Operation to entire STM-N frame.
(a part of POS_PHY transceiver module turns POS_PHY parallel serial conversion module for carrying out simultaneously → string data
Change): it is high-speed single-bit data flow that packaged parallel low-rate SDH data, which are carried out parallel-serial conversion, passes through optical port SFP afterwards
+ send output.
Based on the present embodiment uses FPGA platform, institute is functional to be implemented in programmable logic and passes through modularized processing,
The parallel processing capability that FPGA technology can be made full use of, compared to existing framer chip, cost is lower, density is high and can be easily
Support more pos interfaces.Meanwhile the application of oversampling technique, so that the data processing equipment can automatic identification current interface
Rate, the multi tate for reaching pos interface is supported, single face is allowed to support a variety of speed such as 155M, 622M, 2.5G, 10G
Rate greatly improves interface flexibility.
Specific examples are used herein to illustrate the principle and implementation manner of the present application, and between each embodiment
For progressive relationship, each embodiment focuses on the differences from other embodiments, identical between each embodiment
Similar portion may refer to each other.For the device disclosed in the embodiment, reference can be made to corresponding method part illustration.The above reality
The explanation for applying example is merely used to help understand the present processes and its core concept.For the ordinary skill people of the art
Member for, under the premise of not departing from the application principle, can also to the application, some improvement and modification can also be carried out, these improve and
Modification is also fallen into the protection scope of the claim of this application.
It should also be noted that, in the present specification, relational terms such as first and second and the like be used merely to by
One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant
It is intended to non-exclusive inclusion, so that including that the process, method, article or equipment of a series of elements not only includes
Those elements, but also other elements including being not explicitly listed, or further include for this process, method, article or
The intrinsic element of person's equipment.In the absence of more restrictions, the element limited by sentence "including a ...", not
There is also other identical elements in the process, method, article or equipment for including element for exclusion.
Claims (10)
1. a kind of SDH data processing method characterized by comprising
Receive the serial single-bit SDH data of input；
The serial single-bit SDH data are handled using oversampling technique, obtain parallel more bit SDH data；Wherein,
The number of bits of parallel more bit SDH data is up to 64 bits；
Re-sampling is carried out respectively by the corresponding message transmission rate of each STM grade, and it is right respectively with each STM grade to obtain
Parallel SDH data after each fractionation answered；
Interface rate matching is carried out to SDH data parallel after each fractionation using frame synchronization code character, is obtained and target STM grade
Corresponding target parallel SDH data.
2. SDH data processing method according to claim 1, which is characterized in that described torn open using frame synchronization code character to each
Parallel SDH data carry out interface rate matching after point, comprising:
Data shifting processing is carried out to SDH data parallel after each fractionation；
After the completion of each data shifting processing, location matches are carried out with the frame synchronization code character；
By continuously parallel SDH data are corresponding after the fractionation that the same position of N number of consecutive frame recognizes the frame synchronization code character
STM grade as the target STM grade；
Wherein, N is the positive integer more than or equal to 2.
3. SDH data processing method according to claim 1 or 2, which is characterized in that further include:
After selection obtains the target parallel SDH data, target STM corresponding with the target parallel SDH data etc. is used
Grade label present SDH data transmission network.
4. a kind of SDH data processing system characterized by comprising
Single-bit SDH data receipt unit, serial single-bit SDH data for receiving input；
Over-sampling unit obtains comparing parallel more for handling the serial single-bit SDH data using oversampling technique
Special SDH data；Wherein, the number of bits of parallel more bit SDH data is up to 64 bits；
It is obtained by STM grade split cells for carrying out re-sampling respectively by the corresponding message transmission rate of each STM grade
Parallel SDH data after to each fractionation corresponding with each STM grade；
Target interface de-rate matching unit, for carrying out interface to SDH data parallel after each fractionation using frame synchronization code character
Rate-matched obtains target parallel SDH data corresponding with target STM grade.
5. SDH data processing system according to claim 4, which is characterized in that the target interface de-rate matching unit
Include:
Data shift subelement, for carrying out data shifting processing to SDH data parallel after each fractionation；
Location matches subelement, for carrying out position with the frame synchronization code character after the completion of each data shifting processing
Matching；
Target STM grade determines subelement, for the same position continuously in N number of consecutive frame to be recognized the frame swynchronization code
The corresponding STM grade of parallel SDH data is as the target STM grade after the fractionation of group.
6. SDH data processing system according to claim 4, which is characterized in that further include:
Target STM grade mark unit, for after selection obtains the target parallel SDH data, using with the target simultaneously
The corresponding target STM grade mark present SDH data transmission network of row SDH data.
7. a kind of compatibility of multi-rate device characterized by comprising
Memory, for storing computer program；
Processor realizes SDH data processing as described in any one of claims 1 to 3 when for executing the computer program
The step of method.
8. a kind of computer readable storage medium, which is characterized in that be stored with computer on the computer readable storage medium
Program, the computer program realize the data processing side SDH as described in any one of claims 1 to 3 when being executed by processor
The step of method.
9. a kind of data processing equipment is applied in pos line and Ethernet link, the POS_ including successively establishing data connection
PHY transceiver module, Overhead extraction module, VC load extraction module, PPP/HDLC solve meaning transferring module, Ether frame modulus of conversion
Block, ETH_PHY transceiver module, POS Frame Protocol conversion module, PPP/HDLC meaning transferring module, VC load map module and SDH frame
Mapping block, which is characterized in that further include compatibility of multi-rate device as claimed in claim 7, the compatibility of multi-rate device
It is set between the POS_PHY transceiver module and the Overhead extraction module.
10. data processing equipment according to claim 9, which is characterized in that the data processing equipment is specially FPGA
Data processing board.
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| CN111385065B (en) * | 2020-05-29 | 2020-09-11 | 湖南戎腾网络科技有限公司 | Interface rate self-adaption device and method |
| CN112787744B (en) * | 2020-12-31 | 2022-03-22 | 北京卓讯科信技术有限公司 | SDH frame data processing method, device and computer readable storage medium |
| CN114389753B (en) * | 2021-12-15 | 2024-01-30 | 中国电子科技集团公司第三十研究所 | POS interface capable of adapting to various rates |
| CN117155523B (en) * | 2023-10-30 | 2024-01-26 | 杭州芯旗电子技术有限公司 | Multi-rate data framing device and method based on FPGA |
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