CN109119514A - A kind of preparation method and LED epitaxial slice of LED epitaxial slice - Google Patents
A kind of preparation method and LED epitaxial slice of LED epitaxial slice Download PDFInfo
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- CN109119514A CN109119514A CN201810730032.5A CN201810730032A CN109119514A CN 109119514 A CN109119514 A CN 109119514A CN 201810730032 A CN201810730032 A CN 201810730032A CN 109119514 A CN109119514 A CN 109119514A
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
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- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/16—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
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- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
Abstract
The invention discloses a kind of preparation method of LED epitaxial slice and LED epitaxial slices, belong to technical field of semiconductors.Preparation method includes: that successively grown buffer layer, n type semiconductor layer, active layer, p type semiconductor layer and contact layer, the contact layer are the nitride of p-type doping on substrate using chemical vapour deposition technique；Electron irradiation is carried out to the surface of the contact layer, increases the nitrogen vacancy in the contact layer.The present invention carries out electron irradiation by the surface to contact layer, change the microstructure of contact layer crystal, influence the form and quantity of defect in contact layer, more nitrogen vacancy is generated in the case where not changing nitrogen ratio, increase the nitrogen vacancy in contact layer, promote being incorporated to for P-type dopant, improve the validity that doped chemical is incorporated to, change the high impurity state as caused by heavy doping, improve the mobility of carrier, improve the electrical contact of electrode and contact layer, reduces series resistance, improve the light efficiency of entire light emitting diode.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to the preparation method of a kind of LED epitaxial slice and shine
Diode epitaxial slice.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) it is a kind of semi-conductor electricity that can be luminous
Subcomponent.LED is widely paid close attention to because having many advantages, such as energy conservation and environmental protection, high reliablity, long service life, is being carried on the back in recent years
Light source and field of display screen yield unusually brilliant results, and start to march to domestic lighting market.For domestic lighting, light efficiency and make
It is main measurement standard with the service life, therefore increases the luminous efficiency of LED and improve the antistatic effect of LED for the wide of LED
General application seems particularly critical.
Epitaxial wafer is the primary finished product in LED preparation process.Existing LED epitaxial wafer includes substrate, buffer layer, N-type half
Conductor layer, active layer and p type semiconductor layer, buffer layer, n type semiconductor layer, active layer and p type semiconductor layer are sequentially laminated on lining
On bottom.P type semiconductor layer is used to provide the hole for carrying out recombination luminescence, and n type semiconductor layer, which is used to provide, carries out recombination luminescence
Electronics, the radiation recombination that active layer is used to carry out electrons and holes shine, and substrate is used to provide growing surface for epitaxial material；Lining
The material at bottom generally selects sapphire, and the material of n type semiconductor layer etc. generally selects gallium nitride, and sapphire and gallium nitride are heterogeneous
, there is biggish lattice mismatch in material, the lattice that buffer layer is used to alleviate between substrate and n type semiconductor layer loses between the two
Match.In addition, in order to realize and chip technology in electrode between form good Ohmic contact, it will usually in p type semiconductor layer
The contact layer of upper setting heavy doping.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
The stress and defect that lattice mismatch generates between sapphire and gallium nitride can extend to contact with epitaxial growth
Layer, in addition contact layer is heavy doping, therefore the defects of contact layer is dense, and the defect meeting trapped carrier of high concentration moves
It moves, causes the luminous efficiency of LED lower.
Summary of the invention
The embodiment of the invention provides a kind of preparation method of LED epitaxial slice and its LED epitaxial slice,
It is able to solve the migration of the defect meeting trapped carrier of high concentration in prior art contact layer, causes the luminous efficiency of LED lower
The problem of.The technical solution is as follows:
On the one hand, the embodiment of the invention provides a kind of preparation method of LED epitaxial slice, the preparation methods
Include:
Using chemical vapour deposition technique, successively grown buffer layer, n type semiconductor layer, active layer, p-type are partly led on substrate
Body layer and contact layer, the contact layer are the nitride of p-type doping；
Electron irradiation is carried out to the surface of the contact layer, increases the nitrogen vacancy in the contact layer.
Optionally, the dose of radiation of electron irradiation is 1016/cm2~1022/cm2。
Optionally, the surface to the contact layer carries out electron irradiation, increases the nitrogen vacancy in the contact, wraps
It includes:
The electron beam provided using transmission electron microscope irradiates the surface of the contact layer as light source.
Preferably, the diameter of the electron beam is 8 μm~30 μm.
Optionally, the preparation method further include:
After the surface to the contact layer carries out electron irradiation, the contact layer is made annealing treatment.
Preferably, the temperature of annealing is 700 DEG C~900 DEG C.
Preferably, the contact layer is when being made annealing treatment in nitrogen atmosphere.
It is highly preferred that the vacuum degree of the nitrogen atmosphere is 10-8Torr~10-6Torr。
Preferably, when a length of 15min~50min of annealing.
On the other hand, the embodiment of the invention provides a kind of LED epitaxial slice, the LED epitaxial slices
Including substrate, buffer layer, n type semiconductor layer, active layer, p type semiconductor layer and contact layer, the buffer layer, the N-type are partly led
Body layer, the active layer, the p type semiconductor layer and the contact layer stack gradually over the substrate, the contact layer
Surface is the surface handled by electron irradiation.
Technical solution provided in an embodiment of the present invention has the benefit that
Electron irradiation is carried out by the surface to contact layer, changes the microstructure of contact layer crystal, influences in contact layer
The form and quantity of defect generate more nitrogen vacancy in the case where not changing nitrogen ratio, increase the nitrogen in contact layer
Vacancy promotes being incorporated to for P-type dopant, improves the validity that doped chemical is incorporated to, and changes the high impurity as caused by heavy doping
State improves the mobility of carrier, improves the electrical contact of electrode and contact layer, reduces series resistance, improves entire shine
The light efficiency of diode.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of flow chart of the preparation method of LED epitaxial slice provided in an embodiment of the present invention；
Fig. 2 is a kind of structural schematic diagram of LED epitaxial slice provided in an embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
The embodiment of the invention provides a kind of preparation method of LED epitaxial slice, Fig. 1 mentions for the embodiment of the present invention
A kind of flow chart of the preparation method of the LED epitaxial slice supplied, referring to Fig. 1, which includes:
Step 101: using chemical vapour deposition technique successively grown buffer layer, n type semiconductor layer, active on substrate
Layer, p type semiconductor layer and contact layer, contact layer are the nitride of p-type doping.
Specifically, which may include:
Controlled at 400 DEG C~600 DEG C (preferably 500 DEG C), pressure be 400torr~600torr (preferably
500torr), on substrate growth thickness be 15nm~35nm (preferably 25nm) buffer layer；
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), pressure be 400Torr~600Torr (preferably
500torr), the duration is 5 minutes~10 minutes (preferably 8 minutes), carries out in-situ annealing processing to buffer layer；
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), pressure be 100torr~500torr (preferably
300torr), on the buffer layer growth thickness be 1 μm~5 μm (preferably 3 μm) n type semiconductor layer, N in n type semiconductor layer
The doping concentration of type dopant is 1018cm-3~1019cm-3(preferably 5*1018cm-3)；
Control pressure is 100torr~500torr (preferably 300torr), and active layer is grown on n type semiconductor layer,
Active layer includes that multiple Quantum Well of alternating growth and multiple quantum are built；The quantity of Quantum Well is identical with the quantity that quantum is built, amount
The quantity that son is built is 5~15 (preferably 10)；Quantum Well with a thickness of 2.5nm~3.5nm (preferably 3nm), quantum
The growth temperature of trap is 720 DEG C~829 DEG C (preferably 770 DEG C)；Quantum build with a thickness of 9nm~20nm (preferably 15nm),
The growth temperature that quantum is built is 850 DEG C~959 DEG C (preferably 900 DEG C)；
Controlled at 850 DEG C~1080 DEG C (preferably 960 DEG C), pressure be 100torr~300torr (preferably
200torr), p type semiconductor layer of the growth thickness for 100nm~800nm (preferably 450nm), P-type semiconductor on active layer
The doping concentration of P-type dopant is 10 in layer18cm-3~1019cm-3(preferably 5*1018cm-3)；
Controlled at 850 DEG C~1050 DEG C (preferably 950 DEG C), pressure be 100torr~300torr (preferably
200torr), on p type semiconductor layer growth thickness be 5nm~300nm (preferably 150nm) contact layer.
Specifically, the material of substrate can use the sapphire of [0001] crystal orientation, and the material of buffer layer can be using nitridation
Gallium (GaN).The material of n type semiconductor layer can use the gallium nitride of n-type doping.The material of Quantum Well can use InGaN
(InGaN), the material that quantum is built can use gallium nitride.The material of p type semiconductor layer can be using the gallium nitride of p-type doping.P
The material of type contact layer can be using the InGaN of p-type doping.
Optionally, before step 101, which can also include:
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), in hydrogen atmosphere to substrate carry out 1 minute~
The annealing of 10 minutes (preferably 8 minutes)；
Nitrogen treatment is carried out to substrate.
It is cleaned using surface of the above-mentioned steps to substrate, avoids influencing whole crystal in impurity incorporation epitaxial wafer
Quality reduces the luminous efficiency of LED.
Optionally, before growing n type semiconductor layer on the buffer layer, which can also include:
Controlled at 1000 DEG C~1100 DEG C (preferably 1050 DEG C), pressure be 100torr~500torr (preferably
300torr), on the buffer layer growth thickness be 1 μm~5 μm (preferably 3 μm) undoped gallium nitride layer.
Correspondingly, n type semiconductor layer is grown on undoped gallium nitride layer.
Alleviate the lattice mismatch between substrate and n type semiconductor layer using undoped gallium nitride layer.
In specific implementation, buffer layer is the gallium nitride of the layer of low-temperature epitaxy on substrate first, therefore also referred to as
For low temperature buffer layer.The longitudinal growth for carrying out gallium nitride in low temperature buffer layer again will form multiple mutually independent three-dimensional islands
Structure, referred to as three-dimensional nucleating layer；Then gallium nitride is carried out between each three-dimensional island structure on all three-dimensional island structures
Cross growth, form two-dimension plane structure, referred to as two-dimentional retrieving layer；It is finally one layer of high growth temperature thicker on two-dimensional growth layer
Gallium nitride, referred to as high temperature buffer layer.Three-dimensional nucleating layer, two-dimentional retrieving layer and high temperature buffer layer are referred to as not in the present embodiment
Doped gallium nitride layer.
Optionally, before growing active layer on n type semiconductor layer, which can also include:
Controlled at 800 DEG C~1100 DEG C (preferably 950 DEG C), pressure be 100torr~500torr (preferably
300torr), on n type semiconductor layer growth thickness be 50nm~500nm (preferably 100nm) stress release layer.
Correspondingly, active layer is grown on stress release layer.
Specifically, the material of stress release layer can use gallium indium aluminum nitrogen (AlInGaN), can be released effectively sapphire and
The stress that gallium nitride crystal lattice mismatch generates, improves the crystal quality of epitaxial wafer, improves the luminous efficiency of LED.
Preferably, the molar content of aluminium component can be less than 0.2, and the molar content of indium component can be avoided less than 0.05
Cause adverse effect.
Optionally, on active layer before growing P-type semiconductor layer, which can also include:
Controlled at 850 DEG C~1080 DEG C (preferably 960 DEG C), pressure be 200torr~500torr (preferably
350torr), on active layer growth thickness be 50nm~150nm (preferably 100nm) electronic barrier layer.
Correspondingly, p type semiconductor layer is grown on electronic barrier layer.
Specifically, the material of electronic barrier layer can be using the aluminium gallium nitride alloy (AlGaN) of p-type doping, such as AlyGa1-yN,
0.1 < y < 0.5.
Step 102: electron irradiation being carried out to the surface of contact layer, increases the nitrogen vacancy in contact layer.
In the present embodiment, electron irradiation (English: Electron irradiation) is using high electron beam irradiation
Material causes crystal atoms to be displaced, and improves material property.
The embodiment of the present invention carries out electron irradiation by the surface to contact layer, changes the microstructure of contact layer crystal,
The form and quantity for influencing defect in contact layer, more nitrogen vacancy is generated in the case where not changing nitrogen ratio, is increased
Nitrogen vacancy in contact layer promotes being incorporated to for P-type dopant, improves the validity that doped chemical is incorporated to, and changes due to heavy doping
Caused high impurity state improves the mobility of carrier, improves the electrical contact of electrode and contact layer, reduces series resistance,
Improve the light efficiency of entire light emitting diode.
Optionally, the dose of radiation of electron irradiation can be 1016/cm2~1022/cm2, preferably 1019/cm2。
If the dose of radiation of electron irradiation is less than 1016/cm2, then may it is very little due to the dose of radiation of electron irradiation and
The nitrogen vacancy in contact layer can not be effectively increased, it is unobvious that the light efficiency of light emitting diode promotes effect；If the spoke of electron irradiation
Dosage is penetrated greater than 1022/cm2, then the main structure of contact layer crystal may be influenced since the dose of radiation of electricity irradiation is too many,
The light efficiency of light emitting diode is reduced instead.
Wherein, dose of radiation is the electronics sum of electron irradiation surface unit area radiation.
Optionally, the temperature of contact layer local environment can be 20 DEG C~150 DEG C, preferably 85 DEG C when electron irradiation.
Optionally, the pressure of contact layer local environment can be 5Torr~50Torr, such as 28Torr when electron irradiation.
Optionally, which may include:
It is provided using transmission electron microscope (English: Transmission Electron Microscope, abbreviation TEM)
Electron beam as light source, irradiate the surface of contact layer.
It directlys adopt existing equipment and carries out electron irradiation, it is more simple and convenient in realization.
Specifically, transmission electron microscope may include electron gun, condenser, sample room, object lens, intermediate mirror, diaphotoscope
Deng.Wherein, electron gun (English: electronic gun) is used for launching electronics, by cathode (English: cathode), grid (English
Text: guid), anode (English: anode) composition.
Cathode is the source for generating free electron.Yin is usually also served as by heat filament (English: filament) in TEM
The material of pole, filament can use tungsten or lanthanum hexaboride.When several amperes of heated current flows through filament, it is based on field-causing electron
Transmitting or thermionic emission mechanism, filament start to launch free electron.In a certain range, filament emit from
It is proportional with heating current intensity by amount of electrons.
Anode is the metallic cylinder that a center is had time.Anode is in below cathode.When on anode added with tens of kilovolts or
When up to a hundred kilovolts of acceleration voltage, strong graviational interaction will be generated to the heated free electron emitted of cathode, and be allowed to
Become orderly directed movement from rambling state, while free electron is accelerated to certain movement velocity, forms one
Strands stream directive anode target surface.All electronic beam currents in axe movement, the circular hole for passing through anodes centre project outside electron gun, at
For the light source of irradiating sample.
Grid is between cathode and anode, close to filament top.Grid is the metal object for being similar to hat shape, and center has one small
Hole power supply beamlet passes through.Added with the negative voltage of 0~1000V (for cathode), this negative voltage (referred to as gate bias) on grid
Electron beam can be made to generate the effect converged to central axis, while also having certain regulation to press down the emission measure of free electron on filament
Production is used.
When transmission electron microscope works, under the action of filament supply, electric current flows through filament cathode, and filament is made to generate heat.
When filament fever reaches 2500 DEG C or more, filament generates free electron, the surface of the free electron evolution filament of generation.Simultaneously
The positive charge that acceleration voltage keeps the surface aggregation of anode intensive forms a powerful positive electric field.In this positive electric field
Under effect, free electron has flown out outside electron gun.In addition, the size for adjusting gate bias can control the size of electron beam flow.
It in practical applications, can be using 200 kilo electron volts (English: kilo electron volt, abbreviation: keV)
TEM provide electron beam as light source.Further, the power supply of TEM can be using the up to high pressure of ten thousand volts of 10 Wan Fu -30
Source.By the heated current of cathode in control TEM, the acceleration voltage of TEM Anodic, in TEM grid gate bias and electronics
The duration of irradiation realizes that the dose of radiation of electron irradiation is 1016/cm2~1022/cm2。
Preferably, the diameter of electron beam can be 8 μm~30 μm, preferably 19 μm.
If the diameter of electron beam less than 8 μm, may cause electron beam excessively to collect since the diameter of electron beam is too small
In, and then the main structure of contact layer is damaged, influence the luminous efficiency of LED；If the diameter of electron beam is greater than 30 μm,
Then electron beam may be caused excessively to disperse since the diameter of electron beam is too big, the nitrogen vacancy in contact layer can not be effectively increased,
It is unobvious that the light efficiency of light emitting diode promotes effect.
Step 103: contact layer is made annealing treatment.The step 103 is optional step.
Segmental defect and impurity state are eliminated by annealing.
Optionally, the temperature of annealing can be 700 DEG C~900 DEG C, realize that effect is preferable.
Optionally, contact layer may be in nitrogen atmosphere when being made annealing treatment, and realize that effect is preferable.
Preferably, the vacuum degree of nitrogen atmosphere can be 10-8Torr~10-6Torr realizes that effect is preferable.
Optionally, the duration of annealing can be 15min~50min, realize that effect is preferable.
It should be noted that after the above step, temperature first can be reduced to 500 DEG C~900 DEG C (preferably 800
DEG C), the annealing of 5 minutes~15 minutes (preferably 10 minutes) is carried out to epitaxial wafer in nitrogen atmosphere, it then again will be outer
The temperature for prolonging piece is reduced to room temperature, terminates epitaxy technique growth.
Control temperature, pressure each mean temperature, pressure, such as model in the reaction chamber of control growth epitaxial wafer
Metallo-organic compound chemical gaseous phase deposition (the English: Metal Organic Chemical Vapor of VeecoK465i C4
Deposition, referred to as: MOCVD) temperature, the pressure in equipment.With high-purity hydrogen or high pure nitrogen or hydrogen when realization
The mixed gas of gas and nitrogen is as carrier gas, and high-purity ammonia is as nitrogen source, trimethyl gallium or triethyl-gallium as gallium source, trimethyl
Indium is as indium source, and trimethyl aluminium is as silicon source, and silane is as N type dopant, and two luxuriant magnesium are as P-type dopant.
A kind of specific implementation of preparation method shown in FIG. 1 may include:
Step 201: controlled at 500 DEG C, pressure 500torr, growth thickness is the buffer layer of 25nm on substrate.
Step 202: controlled at 1100 DEG C, pressure 500torr, the duration is 8 minutes, is carried out to buffer layer former
Position annealing.
Step 203: controlled at 1100 DEG C, pressure 300torr, the N-type that growth thickness is 3 μm on the buffer layer is partly
Conductor layer, the doping concentration of N type dopant is 5*10 in n type semiconductor layer18cm-3。
Step 204: control pressure is 300torr, and active layer is grown on n type semiconductor layer, and active layer includes alternately giving birth to
Long 10 Quantum Well and 10 quantum are built；Quantum Well with a thickness of 3nm, the growth temperature of Quantum Well is 770 DEG C；What quantum was built
With a thickness of 15nm, the growth temperature that quantum is built is 900 DEG C.
Step 205: controlled at 960 DEG C, pressure 200torr, growth thickness is the p-type of 450nm on active layer
Semiconductor layer, the doping concentration of P-type dopant is 5*10 in p type semiconductor layer18cm-3。
Step 206: controlled at 950 DEG C, pressure 200torr, growth thickness is 150nm on p type semiconductor layer
Contact layer.
Step 207: electron irradiation being carried out to the surface of contact layer, increases the nitrogen vacancy in contact layer, the spoke of electron irradiation
Penetrating dosage is 1016/cm2。
Chip is made in obtained epitaxial wafer, compared with no progress electron irradiation, the light efficiency of chip improves 3%~
5%.
Another specific implementation of preparation method shown in FIG. 1 may include:
Step 301: controlled at 500 DEG C, pressure 500torr, growth thickness is the buffer layer of 25nm on substrate.
Step 302: controlled at 1100 DEG C, pressure 500torr, the duration is 8 minutes, is carried out to buffer layer former
Position annealing.
Step 303: controlled at 1100 DEG C, pressure 300torr, the N-type that growth thickness is 3 μm on the buffer layer is partly
Conductor layer, the doping concentration of N type dopant is 5*10 in n type semiconductor layer18cm-3。
Step 304: control pressure is 300torr, and active layer is grown on n type semiconductor layer, and active layer includes alternately giving birth to
Long 10 Quantum Well and 10 quantum are built；Quantum Well with a thickness of 3nm, the growth temperature of Quantum Well is 770 DEG C；What quantum was built
With a thickness of 15nm, the growth temperature that quantum is built is 900 DEG C.
Step 305: controlled at 960 DEG C, pressure 200torr, growth thickness is the p-type of 450nm on active layer
Semiconductor layer, the doping concentration of P-type dopant is 5*10 in p type semiconductor layer18cm-3。
Step 306: controlled at 950 DEG C, pressure 200torr, growth thickness is 150nm on p type semiconductor layer
Contact layer.
Step 307: electron irradiation being carried out to the surface of contact layer, increases the nitrogen vacancy in contact layer, the spoke of electron irradiation
Penetrating dosage is 1019/cm2。
Chip is made in obtained epitaxial wafer, compared with no progress electron irradiation, the light efficiency of chip improves 4%~
7%.
Another specific implementation of preparation method shown in FIG. 1 may include:
Step 401: controlled at 500 DEG C, pressure 500torr, growth thickness is the buffer layer of 25nm on substrate.
Step 402: controlled at 1100 DEG C, pressure 500torr, the duration is 8 minutes, is carried out to buffer layer former
Position annealing.
Step 403: controlled at 1100 DEG C, pressure 300torr, the N-type that growth thickness is 3 μm on the buffer layer is partly
Conductor layer, the doping concentration of N type dopant is 5*10 in n type semiconductor layer18cm-3。
Step 404: control pressure is 300torr, and active layer is grown on n type semiconductor layer, and active layer includes alternately giving birth to
Long 10 Quantum Well and 10 quantum are built；Quantum Well with a thickness of 3nm, the growth temperature of Quantum Well is 770 DEG C；What quantum was built
With a thickness of 15nm, the growth temperature that quantum is built is 900 DEG C.
Step 405: controlled at 960 DEG C, pressure 200torr, growth thickness is the p-type of 450nm on active layer
Semiconductor layer, the doping concentration of P-type dopant is 5*10 in p type semiconductor layer18cm-3。
Step 406: controlled at 950 DEG C, pressure 200torr, growth thickness is 150nm on p type semiconductor layer
Contact layer.
Step 407: electron irradiation being carried out to the surface of contact layer, increases the nitrogen vacancy in contact layer, the spoke of electron irradiation
Penetrating dosage is 1022/cm2。
Chip is made in obtained epitaxial wafer, compared with no progress electron irradiation, the light efficiency of chip improves 2%~
4%.
The embodiment of the invention provides a kind of LED epitaxial slice, it is suitable for using preparation method system shown in FIG. 1
It is standby to form.Fig. 2 is a kind of structural schematic diagram of LED epitaxial slice provided in an embodiment of the present invention, and referring to fig. 2, this shines
The diode epitaxial slice LED epitaxial slice includes substrate 10, buffer layer 20, n type semiconductor layer 30, active layer 40, p-type
Semiconductor layer 50 and contact layer 60, buffer layer 20, n type semiconductor layer 30, active layer 40, p type semiconductor layer 50 and contact layer 60
It is sequentially laminated on substrate 10.
In the present embodiment, the surface of contact layer 60 is the surface handled by electron irradiation.
Specifically, the material of substrate 10 can use sapphire.The material of buffer layer 20 can use gallium nitride (GaN).N
The material of type semiconductor layer 30 can use the gallium nitride of n-type doping.Active layer 40 may include multiple Quantum Well and multiple amounts
Son is built, and multiple Quantum Well and multiple quantum build alternately laminated setting；The material of Quantum Well can use InGaN (InGaN),
The material that quantum is built can use gallium nitride.The material of p type semiconductor layer 50 can be using the gallium nitride of p-type doping.Contact layer
60 material can be using the InGaN of p-type doping.
More specifically, the thickness of buffer layer 20 can be 15nm~35nm (preferably 25nm).The thickness of n type semiconductor layer 30
Degree can be 1 μm~5 μm (preferably 3 μm), and the doping concentration of N type dopant is 10 in n type semiconductor layer 3018cm-3~
1019cm-3(preferably 5*1018cm-3).The quantity of Quantum Well is identical with the quantity that quantum is built, and the quantity that quantum is built can be 5
~15 (preferably 10)；The thickness of Quantum Well can be 2.5nm~3.5nm (preferably 3nm), and the thickness that quantum is built can be with
For 9nm~20nm (preferably 15nm).The thickness of p type semiconductor layer 60 can be 100nm~800nm (preferably 450nm), P
The doping concentration of P-type dopant is 10 in type semiconductor layer 5018cm-3~1019cm-3(preferably 5*1018cm-3).Contact layer 60
Thickness can be 5nm~300nm (preferably 150nm).
Optionally, undoped as shown in Fig. 2, the LED epitaxial slice can also include undoped gallium nitride layer 70
Gallium nitride layer 70 is arranged between buffer layer 20 and n type semiconductor layer 30, to alleviate the lattice between substrate and n type semiconductor layer
Mismatch.
Specifically, the thickness of undoped gallium nitride layer 70 can be 1 μm~5 μm (preferably 3 μm).
Optionally, as shown in Fig. 2, the LED epitaxial slice can also include stress release layer 80, stress release layer
80 are arranged between n type semiconductor layer 30 and active layer 40, to discharge the stress of sapphire and the generation of gallium nitride crystal lattice mismatch.
Specifically, the material of stress release layer 80 can use gallium indium aluminum nitrogen (AlInGaN)；Wherein, mole of aluminium component
Content can be less than 0.2, and the molar content of indium component can be less than 0.05；The thickness of stress release layer 80 can for 50nm~
500nm (preferably 100nm).
Optionally, as shown in Fig. 2, the LED epitaxial slice can also include electronic barrier layer 90, electronic barrier layer
90 are arranged between active layer 40 and p type semiconductor layer 50, carry out into p type semiconductor layer with hole to avoid electron transition non-
Radiation recombination and the luminous efficiency for reducing LED.
Specifically, the material of electronic barrier layer 90 can be using the aluminium gallium nitride alloy (AlGaN) of p-type doping, such as AlyGa1-yN,
0.1 < y < 0.5；The thickness of electronic barrier layer 90 can be 50nm~150nm (preferably 100nm).
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of preparation method of LED epitaxial slice, which is characterized in that the preparation method includes:
Using chemical vapour deposition technique successively grown buffer layer, n type semiconductor layer, active layer, p type semiconductor layer on substrate
And contact layer, the contact layer are the nitride of p-type doping；
Electron irradiation is carried out to the surface of the contact layer, increases the nitrogen vacancy in the contact layer.
2. preparation method according to claim 1, which is characterized in that the dose of radiation of electron irradiation is 1016/cm2~
1022/cm2。
3. preparation method according to claim 1 or 2, which is characterized in that the surface to the contact layer carries out electricity
Son irradiation, increases the nitrogen vacancy in the contact, comprising:
The electron beam provided using transmission electron microscope irradiates the surface of the contact layer as light source.
4. preparation method according to claim 3, which is characterized in that the diameter of the electron beam is 8 μm~30 μm.
5. preparation method according to claim 1 or 2, which is characterized in that the preparation method further include:
After the surface to the contact layer carries out electron irradiation, the contact layer is made annealing treatment.
6. preparation method according to claim 5, which is characterized in that the temperature of annealing is 700 DEG C~900 DEG C.
7. preparation method according to claim 5, which is characterized in that the contact layer is in nitrogen when being made annealing treatment
In gas atmosphere.
8. preparation method according to claim 7, which is characterized in that the vacuum degree of the nitrogen atmosphere is 10-8Torr~
10-6Torr。
9. preparation method according to claim 5, which is characterized in that when a length of 15min~50min of annealing.
10. a kind of LED epitaxial slice, the LED epitaxial slice include substrate, buffer layer, n type semiconductor layer,
Active layer, p type semiconductor layer and contact layer, the buffer layer, the n type semiconductor layer, the active layer, the p-type are partly led
Body layer and the contact layer stack gradually over the substrate, which is characterized in that the surface of the contact layer is by electronics spoke
According to the surface of processing.
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| US20030194826A1 (en) * | 2002-04-16 | 2003-10-16 | Toyoda Gosei Co., Ltd. | Method for producing group III nitride compound semiconductor device |
| JP2013026374A (en) * | 2011-07-20 | 2013-02-04 | Ulvac Japan Ltd | Semiconductor device and method of manufacturing semiconductor device |
| CN108075019A (en) * | 2017-11-15 | 2018-05-25 | 华灿光电（浙江）有限公司 | A kind of LED epitaxial slice and preparation method thereof |
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|---|---|---|---|---|
| US20030194826A1 (en) * | 2002-04-16 | 2003-10-16 | Toyoda Gosei Co., Ltd. | Method for producing group III nitride compound semiconductor device |
| JP2013026374A (en) * | 2011-07-20 | 2013-02-04 | Ulvac Japan Ltd | Semiconductor device and method of manufacturing semiconductor device |
| CN108075019A (en) * | 2017-11-15 | 2018-05-25 | 华灿光电（浙江）有限公司 | A kind of LED epitaxial slice and preparation method thereof |
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