CN109100635A - The circuit and method of integrity detection are carried out to multi-channel metal shield wiring layer - Google Patents
The circuit and method of integrity detection are carried out to multi-channel metal shield wiring layer Download PDFInfo
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- CN109100635A CN109100635A CN201810756556.1A CN201810756556A CN109100635A CN 109100635 A CN109100635 A CN 109100635A CN 201810756556 A CN201810756556 A CN 201810756556A CN 109100635 A CN109100635 A CN 109100635A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/31719—Security aspects, e.g. preventing unauthorised access during test
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- Semiconductor Integrated Circuits (AREA)
- Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
Abstract
The invention discloses circuits and method that a kind of pair of multi-channel metal shield wiring layer carries out integrity detection.The circuit includes random number generation circuit and signal fusing circuit.Random number generation circuit passes through two transmission channels per random number all the way and is transmitted, described two transmission channels are respectively the lower metal line of the multi-channel metal shield wiring layer and the chip for generating random number sequence；The random data signal that described two transmission channels are exported to the signal fusing circuit is compared in signal fusing circuit, when the number for comparing failure is more than certain numerical value, then it is assumed that the multi-channel metal shield wiring layer of the chip is under attack and generates alarm signal.It is described the circuit of integrity detection carried out to multi-channel metal shield wiring layer and method whether can accurately detect multi-channel metal shield wiring layer under attack, avoid erroneous judgement caused by signal interference in cabling.
Description
Technical field
The present invention relates to security chip design fields, carry out especially with regard to a kind of pair of multi-channel metal shield wiring layer
The circuit and method of integrity detection.
Background technique
In recent years, in integrated circuit fields, the security protection of chip is increasingly taken seriously.A kind of common preventive means
It is to construct intensive metal protection network in the top layer metallic layer of chip, is detected by the integrity state to metalolic network
To determine whether by external attack.Therefore, the integrality for how quickly and accurately detecting metallic shield network, for chip
Security fields have important research and application value.
Currently, metallic shield network integrity detection method is generally divided into passive detection mode and active detecting mode.Quilt
Dynamic detection mode carrys out the electrical parameters such as capacitance, the resistance value of passive detection metal protection structure by using signal amplification circuit
Variation, and then determine physical attacks.Active detection mode is carried out by the way of injecting stream cipher to Sensor Network network layers
Protection determines open circuit, the open circuit detection physical attacks of protective layer by the equivalence inspection of signal.Active detection side
Formula can be by full digital starting, and technogenic migration is good, and noise margin and robustness are high, therefore have been widely used.
In chip top-layer metal layer, metal routing is longer for the metallic shield network coverage.When external electromagnetic field variation is more acute
When strong, pickup electrode interferes vulnerable to external electromagnetic field and mistake occurs in metal routing.Existing active detection technologies are mostly list bit
Code value compares, once signal is disturbed in cabling, false alarm situation will occurs, and chip error is caused to execute safeguard protection behavior.
The information disclosed in the background technology section is intended only to increase the understanding to general background of the invention, without answering
When being considered as recognizing or imply that the information constitutes the prior art already known to those of ordinary skill in the art in any form.
Summary of the invention
The purpose of the present invention is to provide a kind of pair of multi-channel metal shield wiring layer carry out integrity detection circuit and
Whether method, it is under attack accurately to detect multi-channel metal shield wiring layer, and signal interference in cabling is avoided to cause
Erroneous judgement.
To achieve the above object, the present invention provides a kind of pair of multi-channel metal shield wiring layers to carry out integrity detection
Circuit, the circuit include random number generation circuit and signal fusing circuit.Random number generation circuit is used to generate random number sequence,
Every random number all the way in random number sequence passes through two transmission channels and is transmitted, and described two transmission channels are respectively institute
State the lower metal line of multi-channel metal shield wiring layer and the chip；Signal fusing circuit and described two transmission channels are equal
It is connected, the random data signal for being input to the signal fusing circuit to described two transmission channels is compared, if at random
Number generation circuits generate certain random number is output to two of signal fusing circuit via described two transmission channels respectively all the way
Signal is identical, thinks to compare successfully, conversely, if described two signals are different, then it is assumed that failure is compared, when time for comparing failure
Number is more than certain numerical value, then it is assumed that the multi-channel metal shield wiring layer of the chip is under attack and generates alarm signal.
In a preferred embodiment, the random number generation circuit includes feedback shift register, the feedback shift
Register is composed in series by multiple d type flip flops, the positive output end of the input termination afterbody d type flip flop of the 1st grade of d type flip flop,
The input signal of a part of d type flip flop of remaining d type flip flop is provided by the positive output end of upper level d type flip flop, remaining d type flip flop
Another part d type flip flop input signal by the positive output end of upper level d type flip flop and the positive output of afterbody d type flip flop
It being provided after the exclusive or of end, the quantity of another part trigger is identical as the number of channels of the multi-channel metal shield wiring layer,
Every road random number of each trigger output of the another part forms the random number sequence.
In a preferred embodiment, the signal fusing circuit includes multiple comparison modules, the comparison module
Quantity is identical as the number of channels of the multi-channel metal shield wiring layer, and each comparison module includes two input terminals and one
Output end, certain all the way random number respectively via described two transmission channels be output in each input terminal of some comparison module into
Row compares, if comparison result is abnormal, which exports alarm signal.
In a preferred embodiment, each comparison module further include: one group of d type flip flop, adds up at XOR gate
Device, threshold value judgment module.One group of d type flip flop is used to sample the random number of described two transmission channel outputs；The input of XOR gate
End is connected with the output end of this group of d type flip flop, for carrying out exclusive or to the random number sampled；The input terminal of accumulator with it is described
The output end of XOR gate is connected, for adding up to exclusive or result；The input terminal of threshold value judgment module and the accumulator
Output end is connected, and for judging whether accumulation result is more than threshold value, exports alarm signal if being more than threshold value.
In a preferred embodiment, the signal fusing circuit further includes and door the output of all comparison modules
It holds as the input with door, exports alarm signal with door when some comparison module output alarm signal is then described.
The present invention also provides the methods that a kind of pair of multi-channel metal shield wiring layer carries out integrity detection.This method packet
It includes: generating random number sequence；Every random number all the way in random number sequence passes through two transmission channels and is transmitted, and described two
A transmission channel is respectively the lower metal line of the multi-channel metal shield wiring layer and the chip；To with random number all the way
By described two transmission channels export one group of random data signal be compared, think if this group of signal is identical compare at
Function, conversely, if this group of signal difference, then it is assumed that failure is compared, when the number for comparing failure is more than threshold value, then it is assumed that the core
The multi-channel metal shield wiring layer of piece is under attack and generates alarm signal.
In a preferred embodiment, this method further include: provide random number before generating random number sequence and generate electricity
Road, the random number generation circuit include feedback shift register, which is composed in series by multiple d type flip flops,
The positive output end of the input termination afterbody d type flip flop of 1st grade of d type flip flop, a part of d type flip flop of remaining d type flip flop
Input signal is provided by the positive output end of upper level d type flip flop, the input signal of another part d type flip flop of remaining d type flip flop
By being provided after the positive output end of upper level d type flip flop and the positive output end exclusive or of afterbody d type flip flop, another part triggering
The quantity of device is identical as the number of channels of the multi-channel metal shield wiring layer, each trigger output of the another part
Every road random number forms the random number sequence.
In a preferred embodiment, this method further include: after random number generation circuit is provided and random generating
Before Number Sequence, to all d type flip flop set in the random number generation circuit, so that the output of all triggers is 1.
In a preferred embodiment, the random number with random number all the way by the output of described two transmission channels is believed
Number being compared includes: to provide multiple comparison modules, the quantity of the comparison module and the multi-channel metal shield wiring layer
Number of channels is identical, and each comparison module includes one group of d type flip flop, XOR gate, accumulator, threshold value judgment module, this group of D triggering
The input terminal of device is connected with the output end of described two transmission channels, two input terminals and this group of d type flip flop of the XOR gate
Two output ends be connected, the input terminal of the accumulator is connected with the output end of the XOR gate, the threshold value judgment module
Input terminal be connected with the output end of the accumulator；The d type flip flop of each comparison module was made of multiple clock cycle
One group of output signal of corresponding two transmission channels is sampled in one comparison period, if one sampled group output is believed
Number identical, then XOR gate output 0, compares successfully, otherwise XOR gate output 0, and comparison fails, result of the accumulator to the comparison
It adds up, the threshold value judgment module judges whether accumulation result is more than threshold value, is more than threshold value then comparison module output alarm
Signal.
In a preferred embodiment, the d type flip flop of the random number generation circuit is triggered by clock falling edge, institute
The d type flip flop for stating comparison module is triggered by rising edge clock, when the clock half cycle time is greater than random number generation circuit holding
Between thold, cabling decay time tdealyWith the signal fusing circuit settling time tsetupThe sum of three.
Compared with prior art, the circuit according to the present invention that integrity detection is carried out to multi-channel metal shield wiring layer
And the metallic shield protected network that method forms more wirings, a kind of multichannel active detecting circuit is devised, the circuit knot
Structure injects random number sequence into metalolic network starting point by random number generation circuit, passes through signal in the terminal point of metalolic network
The consistency of Comparison Circuit monitoring random number sequence.By the way that redundant safety threshold value is arranged, when comparing the frequency of failure in some cycles
When more than redundant safety threshold value, alarm behavior is just triggered, to ensure that the accuracy of alarm signal.
Detailed description of the invention
Fig. 1 is the main body that integrity detection is carried out to multi-channel metal shield wiring layer according to an embodiment of the present invention
Circuit diagram；
Fig. 2 is random number generation circuit schematic diagram according to an embodiment of the present invention；
Fig. 3 is comparison module schematic diagram according to an embodiment of the present invention；
Fig. 4 is comparison module detection cycle schematic diagram according to an embodiment of the present invention.
Specific embodiment
With reference to the accompanying drawing, specific embodiments of the present invention will be described in detail, it is to be understood that guarantor of the invention
Shield range is not limited by the specific implementation.
Unless otherwise explicitly stated, otherwise in entire disclosure and claims, term " includes " or its change
Changing such as "comprising" or " including " etc. will be understood to comprise stated element or component, and not exclude other members
Part or other component parts.
The metallic shield protected network that the present invention is formed for more wirings devises a kind of multichannel active detecting electricity
Road, the circuit structure inject random bit stream into metalolic network starting point, in terminal point monitoring rate to the consistency of code stream.By setting
Redundant safety threshold value is set, when comparing the frequency of failure more than redundant safety threshold value in some cycles, just triggers alarm behavior, thus
It ensure that the accuracy of alarm signal.
Fig. 1 is the main body that integrity detection is carried out to multi-channel metal shield wiring layer according to an embodiment of the present invention
Circuit diagram.The main body circuit structure includes random number generation circuit and signal fusing circuit.
For random number generation circuit for generating multichannel pseudo random number, every road pseudo random number is different.Per pseudorandom all the way
Number is all transferred to signal fusing circuit by two ways, and a kind of mode is reached signal by top-level metallic to be detected wiring
Signal is directly transferred to Comparison Circuit by lower metal cabling by Comparison Circuit, another way.Signal fusing circuit is containing multiple
Comparison module, each comparison module respectively compare and analyze the pseudo random number of two ways transmitting.
It is illustrated using 32 channels metallic shield wiring layer to be detected as embodiment.
Fig. 2 is random number generation circuit schematic diagram according to an embodiment of the present invention.Optionally, random number generation circuit
It is made of linear feedback shift register (LFSR).LFSR is composed in series by 64 d type flip flops, and every grade of d type flip flop is believed by clock
The triggering of number Clk failing edge.The positive output end Q64 of 1st grade of d type flip flop D1 input termination afterbody d type flip flop D64, the 2nd grade is arrived
The input terminal of 64th grade of d type flip flop is provided by two ways: mode 1, is provided by the positive output end of upper level d type flip flop；Side
Formula 2, by being provided after the positive output end of upper level d type flip flop and the positive output end Q64 exclusive or of the 64th grade of d type flip flop.Mode 1 and side
Formula 2 can be freely combined, but need to guarantee, in a manner of 2 d type flip flop sums as input are 32.Specific implementation as shown in Figure 2
In example, the 2nd grade of d type flip flop employing mode 2 is as input, with the 1st grade of d type flip flop positive output end Q1 and the 64th grade of d type flip flop
Signal after positive output end Q64 exclusive or is as input signal.3rd level d type flip flop employing mode 1 is touched as input by the 2nd grade of D
The positive output end Q2 signal of device is sent out as input signal.4th grade and the 63rd grade of conduct input of employing mode 2.2 conduct of employing mode
The positive output end of every level-one d type flip flop of input generates 1 tunnel random sequence, since in a manner of 2 d type flip flops as input are total
Number is 32, therefore raw 32 tunnels of common property are not significantly related to the pseudo-random sequence of property, extremely with Channel1, Channel2
Channel32 respectively represents 32 tunnel pseudo-random sequences.Per random sequence all the way all respectively by top wire to be measured under
Layer metal wire is transferred to corresponding comparison module.In practical applications, LFSR tandom number generator can adjust D according to actual needs
The d type flip flop number that the total series of trigger and employing mode 2 input.The only output ability of the d type flip flop of the input of employing mode 2
For signal fusing, therefore metallic shield wiring channel number should be identical as the d type flip flop number that employing mode 2 inputs.LFSR with
The pseudo random number period that machine number producer generates is positively correlated with the total series of its d type flip flop, therefore to realize preferable randomness, it needs
Guarantee that the total series of d type flip flop is more than or equal to the d type flip flop number that employing mode 2 inputs.
Correspondingly, Comparison Circuit is made of 32 completely identical in structure comparison modules and one 32 input with door.Each
There are two input terminal and an output ends for comparison module tool.The 32 tunnel pseudo-random sequences generated by random number generation circuit, it is each
Road random sequence all respectively by top wire to be measured and lower metal line be transferred to two of corresponding comparison module it is defeated
Enter end.The output end of all comparison modules is connected to the input terminal of 32 inputs and door.Output end with door is comparison result.
In embodiment illustrated in fig. 2, it is illustrated with the 1st comparison access.1st compares access by pseudo-random sequence Channel1, top layer gold
Belong to line 1, lower metal line 1 and comparison module 1 to constitute.Second level d type flip flop positive output end Q2 generates pseudo-random sequence
Channel1, respectively by top wire 1 and lower metal line 1 be connected to comparison module 1 two input terminal COM1_0 and
COM1_1, the output terminals A LARM1 of comparison module 1 are connected to an input terminal of 32 inputs and door.Other compare access structure,
It is similar that access is compared with the 1st.
32 comparison module structures are identical.By taking comparison module 1 as shown in Figure 3 as an example, its structure is illustrated.
Comparison module 1 includes two d type flip flops, is triggered by the rising edge of clock CLK, the positive output end D_COM1_ of two d type flip flops
0 and D_COM1_1 is connected to two input terminals of one two input XOR gate XOR respectively, and the output end XOUT of the XOR gate is connected to
The input terminal of accumulator, accumulator output are connected to threshold value judgment module, and the output ALARM1 of threshold value judgment module is the ratio
Comparison result output to module.In clock CLK rising edge, two d type flip flops are sampled respectively from top wire 1 and lower layer's gold
Belong to the pseudo random number that line 1 inputs, and exports to XOR gate.If top wire 1 is not modified completely, pass through thereon it is pseudo- with
Machine number is identical as the pseudo random number in lower metal line 1, then XOR gate is always maintained at output 0.If top wire 1 is modified,
The pseudo random number then passed through thereon and the pseudo random number in lower metal line 1 be not identical, and XOR gate will export 1.Using accumulator
To a counting number of output 1, when accumulator output reaches threshold value, threshold value judgment module will export ALARM1 high level alarm signal
Number.
Based on foregoing circuit structure, the present invention also provides a kind of inspections of the integrality of chip multi-channel metal shield wiring layer
Survey method.The both ends for the metalolic network for needing to detect involved in chip are respectively connected to the wherein defeated all the way of random number generation circuit
The input all the way of comparison module out and in signal fusing circuit.The same output all the way of random number generation circuit passes through lower metal
Multi-branch transport to the same Comparison Circuit another input terminal.In one embodiment, specific detection method is as follows:
The work initial stage makes in tandom number generator all d type flip flop set in LFSR tandom number generator
The output of all d type flip flops is 1, to avoid being endless loop caused by zero as XOR gate feed circuit input and output.Thereafter
LFSR generates random number sequence.
Random number sequence reaches an input terminal of Comparison Circuit by lower metal branch, and passes through metal mesh to be detected
The random number sequence of network transmission, can have certain delay, rising edge clock will to reach Comparison Circuit for the previous period defeated
Enter end.For the validity for guaranteeing detection signal, the clock half cycle time needs to be greater than random number generation circuit retention time thold、
Cabling decay time tdealyWith signal fusing circuit settling time tsetupThe sum of three, i.e. T/2 > thold+tdealy+tsetup.Such as figure
Shown in 4, by taking Channel1 as an example, comparison process is illustrated.Every detection path all individually carries out signal fusing.Compare mould
Block rises on each clock cycle to be sampled along to two input end signals, and every 8 clock cycle are a comparison period, is adopted
Sample obtains 8bit data.In continuous three comparison periods, a detection cycle is constituted, a detection cycle samples to obtain 3*8bit number
According to.In each comparison period, respectively successively to logical in each progress lower metal line of 8bit and top wire to be measured
The pseudo-random signal uniformity comparison crossed, if top wire is not modified completely, the pseudo random number passed through thereon and lower layer
Pseudo random number in metal wire is identical, different if being modified.Signal is identical, compares success, otherwise XOR gate output 0 compares
Failure then exports 1.Added up using accumulator to comparison result, if accumulated value is more than 2, then it is assumed that this compare period in by
Attack；If accumulated value is equal to 1 or 2, then it is assumed that by external interference；If accumulated value is equal to 0, then it is assumed that normal.Continuous 3 ratios
To the period, if all thinking under attack, determine it is subject to attacks, Comparison Circuit export high level alarm signal, otherwise export
Low level normal signal.
In embodiment as shown in Figure 4, there is 1bit and compares failure in the 1st comparison period, it is believed that and it is to be interfered, rear 3
There is 3bit or more and compares failure in a comparison period, it is believed that under attack.The detection cycle 1 for comparing the composition of period 1,2,3, due to
It compares the period 1 normally, does not generate alarm signal.The detection cycle 2 for comparing the composition of period 2,3,4, due to all thinking under attack,
Then generate alarm signal.
The system and method for carrying out integrity detection to multi-channel metal shield wiring layer is suitable for the big of chip
Scale metallic shield network carries out quickly and accurately integrity detection, and exports digitized testing result, copes with convenient for chip
Attack executes corresponding safeguard procedures.And full digital starting, technogenic migration are good.In addition also there is fault tolerant mechanism, can be avoided
False alarm caused by some external disturbances.
The aforementioned description to specific exemplary embodiment of the invention is in order to illustrate and illustration purpose.These descriptions
It is not wishing to limit the invention to disclosed precise forms, and it will be apparent that according to the above instruction, can much be changed
And variation.The purpose of selecting and describing the exemplary embodiment is that explaining specific principle of the invention and its actually answering
With so that those skilled in the art can be realized and utilize a variety of different exemplary implementation schemes of the invention and
Various chooses and changes.The scope of the present invention is intended to be limited by claims and its equivalents.
Claims (10)
1. the circuit that a kind of pair of multi-channel metal shield wiring layer carries out integrity detection, which is characterized in that the circuit includes:
Random number generation circuit passes through two biographies per random number all the way in random number sequence for generating random number sequence
Defeated channel is transmitted, and described two transmission channels are respectively the lower layer of the multi-channel metal shield wiring layer and the chip
Metal wire；And
Signal fusing circuit is connected with described two transmission channels, for being input to the letter to described two transmission channels
The random data signal of number Comparison Circuit is compared, if random number generation circuit generate certain all the way random number respectively via described
Two signals that two transmission channels are output to signal fusing circuit are identical, think to compare successfully, conversely, if described two letters
Number difference, then it is assumed that failure is compared, when the number for comparing failure is more than certain numerical value, then it is assumed that the multi-channel metal screen of the chip
It is under attack and generate alarm signal to cover wiring layer.
2. the circuit of integrity detection is carried out to multi-channel metal shield wiring layer as described in claim 1, which is characterized in that
The random number generation circuit includes feedback shift register, which is composed in series by multiple d type flip flops, the
The positive output end of the input termination afterbody d type flip flop of 1 grade of d type flip flop, a part of d type flip flop of remaining d type flip flop it is defeated
Enter signal to be provided by the positive output end of upper level d type flip flop, the input signal of another part d type flip flop of remaining d type flip flop by
It is provided after the positive output end of upper level d type flip flop and the positive output end exclusive or of afterbody d type flip flop, another part trigger
Quantity it is identical as the number of channels of the multi-channel metal shield wiring layer, the output of each trigger of the another part it is every
Road random number forms the random number sequence.
3. the circuit of integrity detection is carried out to multi-channel metal shield wiring layer as claimed in claim 2, which is characterized in that
The signal fusing circuit includes multiple comparison modules, the quantity of the comparison module and the multi-channel metal shield wiring layer
Number of channels it is identical, each comparison module include two input terminals and an output end, certain all the way random number respectively via institute
It states two transmission channels and is output in each input terminal of some comparison module and be compared, if comparison result is abnormal, the ratio
Alarm signal is exported to module.
4. the circuit of integrity detection is carried out to multi-channel metal shield wiring layer as claimed in claim 3, which is characterized in that
Each comparison module further include:
One group of d type flip flop, for sampling the random number of described two transmission channel outputs；
XOR gate, input terminal are connected with the output end of this group of d type flip flop, for carrying out exclusive or to the random number sampled；
Accumulator, input terminal are connected with the output end of the XOR gate, for adding up to exclusive or result；And
Threshold value judgment module, input terminal are connected with the output end of the accumulator, for judging whether accumulation result is more than threshold
Value exports alarm signal if being more than threshold value.
5. the circuit of integrity detection is carried out to multi-channel metal shield wiring layer as claimed in claim 4, which is characterized in that
The signal fusing circuit further includes and door that the output end of all comparison modules is as the input with door, when some ratio
It is then described to module output alarm signal to export alarm signal with door.
6. the method that a kind of pair of multi-channel metal shield wiring layer carries out integrity detection characterized by comprising
Generate random number sequence；
Every random number all the way in random number sequence passes through two transmission channels and is transmitted, described two transmission channels difference
For the lower metal line of the multi-channel metal shield wiring layer and the chip；And
One group of random data signal with random number all the way by the output of described two transmission channels is compared, if this group of signal
It is identical, think to compare successfully, conversely, if this group of signal difference, then it is assumed that failure is compared, when the number for comparing failure is super
Cross threshold value, then it is assumed that the multi-channel metal shield wiring layer of the chip is under attack and generates alarm signal.
7. the method for carrying out integrity detection to multi-channel metal shield wiring layer as claimed in claim 6, which is characterized in that
This method further include:
Random number generation circuit is provided before generating random number sequence, which includes feedback shift register,
The feedback shift register is composed in series by multiple d type flip flops, the input termination afterbody d type flip flop of the 1st grade of d type flip flop
The input signal of positive output end, a part of d type flip flop of remaining d type flip flop is provided by the positive output end of upper level d type flip flop,
The input signal of another part d type flip flop of remaining d type flip flop is triggered by the positive output end and afterbody D of upper level d type flip flop
It is provided after the positive output end exclusive or of device, the channel of the quantity of another part trigger and the multi-channel metal shield wiring layer
Quantity is identical, and every road random number of each trigger output of the another part forms the random number sequence.
8. the method for carrying out integrity detection to multi-channel metal shield wiring layer as claimed in claim 7, which is characterized in that
This method further include:
After providing random number generation circuit and before generating random number sequence, to all D in the random number generation circuit
Trigger set, so that the output of all triggers is 1.
9. the method for carrying out integrity detection to multi-channel metal shield wiring layer as claimed in claim 7, which is characterized in that
Random data signal with random number all the way by the output of described two transmission channels is compared and includes:
Multiple comparison modules, the number of channels phase of the quantity of the comparison module and the multi-channel metal shield wiring layer are provided
Together, each comparison module includes one group of d type flip flop, XOR gate, accumulator, threshold value judgment module, the input terminal of this group of d type flip flop
It is connected with the output end of described two transmission channels, two outputs of two input terminals and this group of d type flip flop of the XOR gate
End be connected, the input terminal of the accumulator is connected with the output end of the XOR gate, the input terminal of the threshold value judgment module and
The output end of the accumulator is connected；And
The d type flip flop of each comparison module transmits corresponding two within a comparison period being made of multiple clock cycle
One group of output signal in channel is sampled, if one sampled group output signal is identical, XOR gate output 0 is compared successfully,
Otherwise XOR gate output 0, compares failure, and accumulator adds up to the result of the comparison, the threshold value judgment module judgement
Whether accumulation result is more than threshold value, is more than that then comparison module exports alarm signal to threshold value.
10. the method for carrying out integrity detection to multi-channel metal shield wiring layer as claimed in claim 9, feature exist
In, the d type flip flop of the random number generation circuit is triggered by clock falling edge, the d type flip flop of the comparison module by when
The triggering of clock rising edge, clock half cycle time are greater than random number generation circuit retention time thold, cabling decay time tdealyWith
The signal fusing circuit settling time tsetupThe sum of three.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109782154A (en) * | 2019-02-27 | 2019-05-21 | 大唐微电子技术有限公司 | A kind of tamper detection protection circuit, implementation method and tamper chip |
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