CN109085395A - A kind of high pressure is fastly along negative pulse generating device - Google Patents
A kind of high pressure is fastly along negative pulse generating device Download PDFInfo
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- CN109085395A CN109085395A CN201810818797.4A CN201810818797A CN109085395A CN 109085395 A CN109085395 A CN 109085395A CN 201810818797 A CN201810818797 A CN 201810818797A CN 109085395 A CN109085395 A CN 109085395A
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- negative pulse
- generating device
- pulse generating
- signal
- fpga
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/28—Provision in measuring instruments for reference values, e.g. standard voltage, standard waveform
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- General Physics & Mathematics (AREA)
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Abstract
The invention discloses a kind of high pressures fastly along negative pulse generating device, control of the device based on FPGA, it is adjusted by the resistance value to resistance R1 and resistance R2, to adjust the amplitude of output voltage, pass through the adjusting to capacitor C1, it can realize that the failing edge time of the negative pulse generating device reaches within 30ns well, and waveforms amplitude is stablized, ripple is small；The circuit of the negative pulse generating device is realized simple, and the high reliablity and cost of device are lower, it can easily realize the setting of voltage magnitude, pulsewidth and failing edge time, and signal accuracy is high, it can be widely used in high harsh nanosecond field of industrial measurement, improve effective measurement accuracy.
Description
Technical field
The present invention relates to commercial measurement apparatus fields, and in particular to a kind of high pressure is fastly along negative pulse generating device.
Background technique
Pulse signal generator can generate the generator of width, amplitude and the adjustable rectangular pulse of repetition rate, extensively
Radar, multichannel communication multiple telecommunication and other umber of pulse type families are tested for testing linear system's transient response, or as analog signal
The performance of system.
And in field of industrial measurement, the negative pulse that existing high voltage negative pulse generating device mainly uses plate grade integrated is sent out
Generating apparatus, and nanosecond is not achieved in the failing edge time for the negative pulse generating device that this kind of plate grade integrates, and can not meet high harsh
The demand of nanosecond field of industrial measurement；In addition, also occurring some can be realized the negative arteries and veins that the failing edge time reaches nanosecond
Rush generating device, however the negative pulse generating device of these nanoseconds is using bulky special signal generating device,
It is expensive, and it is unfavorable for the testing requirement of integration and miniaturization.
Summary of the invention
Nanosecond is not achieved in order to solve the failing edge time of existing plate grade negative pulse generating device, is unable to satisfy nanosecond
Grade measurement demand；And special signal generating device, it is expensive, it is bulky not to be suitable for integration and miniaturization test need
The technical problems such as seek, the invention proposes a kind of high pressures fastly along negative pulse generating device, and the apparatus structure is simple, and reliability
Height, it is at low cost, the setting of voltage magnitude, pulsewidth and failing edge time can be realized well, suitable for high harsh Industrial Measurement
Amount field.
The present invention is achieved through the following technical solutions:
A kind of high pressure is fastly along negative pulse generating device, by FPGA, D/A conversion equipment, analog switch and operational amplifier structure
At；
The FPGA outputs a control signal to the control signal of D/A conversion equipment and analog switch, realizes and converts to D/A
The control of device and analog switch；The FPGA output voltage signal is converted to the data input pin of D/A conversion equipment through D/A
Device converts digital signals into analog signal and exports through its output end, and the analog signal of the D/A conversion equipment output is passed through
Analog switch output；The inverting input terminal that the analog signal of the analog switch output passes through resistance R1 to operational amplifier；Institute
The signal for stating the output end output of operational amplifier passes through resistance R2 and capacitor C1 feedback to its inverting input terminal respectively；It is described
The output end of operational amplifier exports a negative pulse, the operational amplifier non-inverting input terminal ground connection；By adjusting resistance R1
The amplitude of output voltage is adjusted with the resistance value of resistance R2；It is adjusted under negative pulse by adjusting the capacitance of capacitor C1
Drop is along the time.
For high pressure of the invention fastly along negative pulse generating device, circuit realizes simpler, the high reliablity and cost of device
It is low；It can easily realize and voltage magnitude, pulsewidth and failing edge time are set in conjunction with resistance and capacitor based on FPGA
It sets, can simply and reliablely make the failing edge time reach nanosecond, can be widely applied for the Industrial Measurement of high harsh nanosecond
Amount demand, and it is suitable for the integrated and miniaturization test in industrial test field.
Preferably, the resistance R1 takes 1k Ω, resistance value 7.87k Ω, capacitor C1 value 1.8pF.
Preferably, the FPGA outputs a control signal to the number that D/A conversion equipment control D/A conversion equipment exports FPGA
Word signal is converted to analog signal.
Preferably, the FPGA outputs a control signal to analog switch, controls the switch off time of analog switch, thus controls
The pulsewidth of undersuing.
Preferably, the D/A conversion equipment is AD5620, and the analog switch is TS5A63157, the operational amplifier
For PA119CE.
The present invention has the advantage that and the utility model has the advantages that
A kind of high pressure of the invention is fastly along negative pulse generating device, the control based on FPGA, by resistance R1 and resistance
The resistance value of R2 is adjusted, and to adjust the amplitude of output voltage, by the adjusting to capacitor C1, can realize this well
The failing edge time of negative pulse generating device reaches 30ns, and waveforms amplitude is stablized, and ripple is small；The electricity of the negative pulse generating device
Road realize it is simple, and the high reliablity of device and cost it is lower, when can easily realize voltage magnitude, pulsewidth and failing edge
Between setting, and signal accuracy is high, can be widely used in the field of industrial measurement of high harsh nanosecond, improve effective survey
Accuracy of measurement, and there is very high practicability and economic benefit.
Detailed description of the invention
Attached drawing described herein is used to provide to further understand the embodiment of the present invention, constitutes one of the application
Point, do not constitute the restriction to the embodiment of the present invention.In the accompanying drawings:
Fig. 1 is negative pulse generating device circuit diagram of the invention.
Fig. 2 is negative pulse generating device emulation testing figure of the invention.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below with reference to embodiment and attached drawing, to this
Invention is described in further detail, and exemplary embodiment of the invention and its explanation for explaining only the invention, are not made
For limitation of the invention.
Embodiment 1
As shown in Figure 1, a kind of high pressure is fastly along negative pulse generating device, by FPGA, D/A conversion equipment, analog switch and fortune
Amplifier is calculated to constitute；In the present embodiment, shown FPGA (not showing that in Fig. 1), the D/A conversion equipment (U142 in Fig. 1) is
The DAC chip AD5620 of ADI company, the analog switch (U143 in Fig. 1) are the analog switch TS5A63157 of TI company, institute
State the operational amplifier PA119CE that operational amplifier (U13 in Fig. 1) selects APEX company.
Specifically, the output signal of FPGA includes digital voltage signal and control signal, the digital voltage letter of the FPGA
It number is input in chip AD5620 by the pin 7 of chip AD5620, and the control signal of FPGA passes through drawing for chip AD5620
Foot 5 and pin 6 input, and control chip AD5620 for the digital signal of input and are converted to analog signal, logical after the analog signal
The pin 4 for crossing chip AD5620 exports, and is input to analog switch by the pin 1 of analog switch TS5A63157 later
In TS5A63157, while FPGA output control signal inputs analog switch through the pin 6 of analog switch TS5A63157
TS5A63157 controls the switch off time of the analog switch, thus controls the pulsewidth of undersuing, and analog signal is opened through simulation
The pin 4 of pass exports, and the inverting input terminal (pin 5) of operational amplifier PA119CE is entered by resistance R64, is put by operation
The pin 1 of big device exports, and the signal of the output is again respectively through resistance R63 and capacitor C197 feedback to the anti-of operational amplifier
Phase input terminal realizes and has carried out reverse phase amplification to the analog signal of input, then the signal that the pin 1 of the operational amplifier exports
Through resistance R65 (resistance R65 is 0) one negative pulse of output, the non-inverting input terminal of the operational amplifier passes through resistance R66 (electricity
Hindering R66 is 0) to be grounded.The amplitude for changing the resistance value adjustable output voltage of resistance R64 and resistance R63, by adjusting capacitor
The failing edge time of negative pulse is adjusted in the capacitance of C197.
In the present embodiment, the chip AD5620 is connected to filter condenser C2 between pin 4 and ground, and (capacitance is 1 μ
F), it is connected between the pin 3 and ground of the operational amplifier PA119CE filter condenser C196 (capacitance is 100 μ F), it is described
Filter condenser C205 (capacitance is 100 μ F), above-mentioned 3 electricity are connected between the pin 6 and ground of operational amplifier PA119CE
Hold: C2, C196 and C205 play filter action.Electricity is connected between the pin 1 and pin 8 of the operational amplifier PA119CE
Container C204 (capacitance 27pF), plays the role of phase compensation.
Embodiment 2
The high pressure has carried out emulation testing to it fastly along negative pulse generating device based on the above embodiment.The electricity
Resistance R1 takes 1k Ω, resistance value 7.87k Ω；By adjusting the capacitance of capacitor C1, available test as shown in table 1 below
As a result, as shown in Table 1, capacitor C1 value 1.8pF, can guarantee the failing edge time of negative pulse generating device reach 30ns with
It is interior, and waveforms amplitude is stablized, ripple is smaller, as shown in Figure 1.
The failing edge time of negative pulse generating device when 1 capacitor C1 of table takes different capacitances
| Serial number | The capacitance of capacitor C1 | The failing edge time |
| 1 | 1pF | 40~45ns |
| 2 | 1.2pF | 30~35ns |
| 3 | 1.8pF | 25~30ns |
| 4 | 2.7pF | 55~70ns |
| 5 | 3.3pF | 100ns or more |
| 6 | 4.7pF | 100ns or more |
As shown in table 1 and Fig. 2, as capacitor C1 value 1.8pF, the failing edge time of negative pulse generating device be can achieve
Within 30ns.And waveforms amplitude is stablized, ripple is smaller.Voltage magnitude is controlled by FPGA, and voltage range is big, can be from 0V to minus tens
V, failing edge time are shorter.Precision determines by FPGA and DAC, can by control errors 1/1000 hereinafter, the other devices of ratio of precision
It is much higher.Amplitude can be arranged and change more convenient as needed at any time by control FPGA adjustment.Negative pulse pulse width time
Control FPGA adjustment can be passed through at any time as needed.For the present apparatus relative to other similar devices, circuit realization is simpler, mentions
The reliability and cost of high device are lower.It can easily realize the setting of voltage magnitude, pulsewidth and failing edge time,
And signal accuracy is high.
The negative pulse generating device of the present embodiment can be applicable to high harsh nanosecond field of industrial measurement.It improves effectively
Measurement accuracy.With very high practical value and economic benefit.It is certainly not limited to field of industrial measurement, is also applied for other measurements
Field.
Above-described specific embodiment has carried out further the purpose of the present invention, technical scheme and beneficial effects
It is described in detail, it should be understood that being not intended to limit the present invention the foregoing is merely a specific embodiment of the invention
Protection scope, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should all include
Within protection scope of the present invention.
Claims (5)
1. a kind of high pressure is fastly along negative pulse generating device, which is characterized in that by FPGA, D/A conversion equipment, analog switch and operation
Amplifier is constituted；
The FPGA outputs a control signal to the control signal of D/A conversion equipment and analog switch, realizes to D/A conversion equipment
With the control of analog switch；The FPGA output voltage signal to D/A conversion equipment data input pin, through D/A conversion equipment
It converts digital signals into analog signal to export through its output end, the analog signal of the D/A conversion equipment output is by simulation
Switch output；The inverting input terminal that the analog signal of the analog switch output passes through resistance R1 to operational amplifier；The fortune
The signal for calculating the output end output of amplifier passes through resistance R2 and capacitor C1 feedback to its inverting input terminal respectively；The operation
The output end of amplifier exports a negative pulse, the operational amplifier non-inverting input terminal ground connection；By adjusting resistance R1 and electricity
The resistance value of R2 is hindered to adjust the amplitude of output voltage；The failing edge of negative pulse is adjusted by adjusting the capacitance of capacitor C1
Time.
2. a kind of high pressure according to claim 1 is fastly along negative pulse generating device, which is characterized in that the resistance R1 takes 1k
Ω, resistance value 7.87k Ω, capacitor C1 value 1.8pF.
3. a kind of high pressure according to claim 1 is fastly along negative pulse generating device, which is characterized in that the FPGA output control
The FPGA digital signal exported is converted to analog signal to D/A conversion equipment control D/A conversion equipment by signal processed.
4. a kind of high pressure according to claim 1 is fastly along negative pulse generating device, which is characterized in that the FPGA output control
Signal processed controls the switch off time of analog switch to analog switch, thus controls the pulsewidth of undersuing.
5. a kind of high pressure according to claim 1 is fastly along negative pulse generating device, which is characterized in that the D/A converting means
It is set to AD5620, the analog switch is TS5A63157, and the operational amplifier is PA119CE.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201810818797.4A CN109085395A (en) | 2018-07-24 | 2018-07-24 | A kind of high pressure is fastly along negative pulse generating device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810818797.4A CN109085395A (en) | 2018-07-24 | 2018-07-24 | A kind of high pressure is fastly along negative pulse generating device |
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| CN105357819A (en) * | 2015-11-09 | 2016-02-24 | 山东航天电子技术研究所 | Light source control device capable of outputting arbitrary profile waveform and extremely narrow pulse |
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