CN109061375A - A kind of SiC MOSFET short-circuit detecting circuit and method with temperature-compensating - Google Patents
A kind of SiC MOSFET short-circuit detecting circuit and method with temperature-compensating Download PDFInfo
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Abstract
The embodiment of the invention provides a kind of SiC MOSFET short-circuit detecting circuit and method with temperature-compensating.The detection circuit includes: generating circuit from reference voltage, short-circuit detecting circuit, short-circuit detecting circuit, SiC MOSFET and soft breaking circuit;Generating circuit from reference voltage passes through posive temperature coefficient thermistor, different reference voltages is generated according to environment temperature and SiC MOSFET variations injunction temperature, and by reference voltage input short detection circuit, logical signal processing circuit generates two different fault detection blind areas time by FPGA and is sent to short-circuit detecting circuit, short-circuit detecting circuit is under Short-circuit Working Condition, short trouble based on saturation voltage drop and logical process detection SiC MOSFET, export fault-signal, and it generates driving signal and is sent to soft breaking circuit, after soft breaking circuit receives driving signal, SiC MOSFET is subjected to safe shutdown under Short-circuit Working Condition.The present invention is enable to respond quickly, the flexible setting blind area time, improves the reliability of SiC MOSFET application, meets the use demand of high-power SiC MOSFET driving protection.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to a SiC MOSFET short circuit detection circuit with temperature compensation and a method thereof.
Background
SiC MOSFETs (silicon carbide Metal-Oxide-Semiconductor Field-effect transistors) are third-generation wide bandgap semiconductors. The larger the forbidden band width of the semiconductor material, the higher the temperature the device can withstand, and thus is advantageous in high temperature applications. The electronic saturation drift velocity of the SiC material is high and is about 2.5 times that of the Si material, so that the SiC power device has high switching speed and high current density, is particularly suitable for being applied to high-frequency and high-power occasions, and the volume of a filter element is reduced due to the improvement of the switching frequency. The critical breakdown electric field of the SiC material is about 10 times that of a Si device, and compared with the Si power device of the same type, the SiC power device can bear higher working voltage and has advantages in high-voltage application occasions, and the commercial products of 900V-1700V exist at present. The specific on-resistance of the SiC power device is small, so that the loss of the system can be reduced, and the efficiency of the system can be improved. The SiC material has high thermal conductivity which is about 3 times that of the Si material, and the high thermal conductivity can simplify and improve a heat dissipation system, so that the weight and the volume of the whole system are effectively reduced, and the power density of the system is improved.
Compared with the Si MOSFET, the SiC MOSFET can bear higher voltage and the on-resistance can be kept smaller; compared with the Si IGBT, the SiC MOSFET has no trailing current, so that the switching loss is greatly reduced. The SiC power device has better development prospect in high-temperature, high-voltage, high-frequency and high-power occasions, and can gradually replace Si devices in the future. The silicon carbide power device is mainly applied to occasions such as photovoltaic inversion, motor control, charging piles, PFC (power factor correction), uninterruptible power supply and electric/hybrid electric vehicles at present, and can be applied to occasions such as smart grids, electric locomotives, wind power generation and ships in the future.
When the short-circuit working condition occurs, the output characteristic of the IGBT shows sharp transition from a saturated region to an unsaturated region, and the fault current is limited to be 3-5 times of the nominal current in the unsaturated state, so that the IGBT can bear fault energy during the short-circuit period for a few microseconds, the short-circuit detection scheme is easy to realize, and the requirement on short-circuit detection delay is not high. The channel mobility of the SiCMOS MOSFET is low, the required driving voltage is 18-20V, the current reaches more than 10 times of the rated current during short circuit, no obvious saturation region exists, the short circuit bearing capacity of the SiCMOS MOSFET is very weak, the detection delay must be short enough to prevent the damage of the SiCMOS MOSFET, the short circuit protection circuit can quickly perform protection action, the switching tube is safely turned off, and the detection blind area time of the detection circuit when the SiCMOS MOSFET is turned on needs to be flexibly set.
Because the actual power electronic converter works at various environmental temperatures, junction temperature of the SiC MOSFET changes, on-state resistance rises along with the rise of the junction temperature of the SiC MOSFET, and if the junction temperature of the SiC MOSFET rises under a short-circuit working condition, the drain-source voltage is larger due to the same short-circuit current. When the scheme of simply detecting the saturation voltage drop is adopted, error protection is easily caused under normal working conditions because the reference voltage in the detection circuit is unchanged, and therefore certain compensation needs to be carried out on the reference voltage. According to different short-circuit working conditions, the voltage at two ends of the switching tube is always in a higher value when HSF occurs, and the switching tube needs to be protected after a short dead zone time when being switched on, so that the reference voltage value required in a saturated voltage drop detection scheme is higher; when FUL or OC occurs, the saturation voltage drop rises from a low value, and the non-saturation current of the SiC MOSFET is more than ten times of the rated current, so that a low reference voltage value is required for detecting the occurrence of FUL or OC.
Therefore, it is necessary to design a SiC MOSFET short circuit detection circuit for detecting an open instantaneous overcurrent, full (short circuit during conduction) and HSF (Hard switching Fault); when the temperature change is overcome, the inaccurate fault detection of the short-circuit detection current is realized, so that the short-circuit protection delay is greatly reduced.
Disclosure of Invention
Embodiments of the present invention provide a SiC MOSFET short detection circuit and method with temperature compensation to solve the above-mentioned problems in the background art.
In order to achieve the purpose, the invention adopts the following technical scheme:
in one aspect of the invention, a SiC MOSFET short detection circuit with temperature compensation is provided.
An embodiment of the present invention provides a SiC MOSFET short-circuit detection circuit with temperature compensation, including: the device comprises a reference voltage generating circuit, a logic signal processing circuit, a short circuit detection circuit, a SiC MOSFET and a soft turn-off circuit, wherein the reference voltage generating circuit, the short circuit detection circuit and the SiC MOSFET are sequentially connected, the short circuit detection circuit is respectively connected with the logic signal processing circuit and the soft turn-off circuit, and the soft turn-off circuit is connected with the SiC MOSFET;
the reference voltage generating circuit is used for generating different reference voltages according to the ambient temperature and the junction temperature change of the SiCMOS through a positive temperature coefficient thermistor and inputting the reference voltages into the short circuit detection circuit;
the logic signal processing circuit is used for generating two different fault detection dead zone times through the FPGA and sending the two different fault detection dead zone times to the short circuit detection circuit;
the short circuit detection circuit is used for detecting the short circuit fault of the SiCMOS based on saturation voltage drop and logic processing under the short circuit working condition, outputting a fault signal, generating a driving signal and sending the driving signal to the soft turn-off circuit;
and the soft turn-off circuit is used for receiving a driving signal of the short-circuit detection circuit and safely turning off the SiC MOSFET under a short-circuit working condition.
Preferably, the reference voltage generating circuit includes: the temperature control circuit comprises a positive temperature coefficient thermistor, a first metal film resistor and a second metal film resistor, wherein the first metal film resistor, the positive temperature coefficient thermistor and the second metal film resistor are sequentially connected in series;
the positive temperature coefficient thermistor is connected with the first metal film resistor and the second metal film resistor in series for voltage division according to the change of the ambient temperature and the junction temperature of the SiC MOSFET, and two reference voltages are generated between the first metal film resistor and the positive temperature coefficient thermistor: an HSF reference voltage and an FUL/OC reference voltage, wherein the value of the HSF reference voltage is higher than that of the FUL/OC reference voltage;
the HSF reference voltage and the FUL/OC reference voltage are used for being respectively input into the short-circuit detection circuit.
Preferably, the logic signal processing circuit includes: an FPGA;
the FPGA is used for adjusting the time of the fault detection dead zone and generating two different fault detection dead zone times; wherein,
the FPGA receives a driving signal OUT output by driving, and the driving signal OUT passes through tdelay1After a digital logic delay, an input signal t for detecting HSF faults is generatedblank HSFPassing through tdelay2After a digital logic delay, an input signal t for detecting the FUL/OC fault is generatedblank FUL;
The input signal tblank HSFAnd said input signal tblank FULAnd are respectively input into the short circuit detection circuit.
Preferably, the short detection circuit includes: detection diode, divider resistance one, divider resistance two, divider resistance three, divider resistance four, comparator and combinational logic gate circuit, the combinational logic gate circuit includes: the first and the second and the or gate;
the input end of the detection diode is connected with a first divider resistor, the output end of the detection diode is connected with the drain electrode of the SiC MOSFET, and the first end of the first divider resistor is connected with the second end of the second divider resistor and the first end of the third divider resistor;
the second voltage-dividing resistor, the third voltage-dividing resistor and the fourth voltage-dividing resistor are sequentially connected in series, the first end of the second voltage-dividing resistor is connected with OUT output by the driving part, and the second end of the fourth voltage-dividing resistor is connected with-4V;
the comparator is two, includes: the first comparator and the second comparator are used for being connected with the reference voltage generating circuit, the positive phase input end of the first comparator is connected with the second end of the third divider resistor and the first end of the fourth divider resistor, the negative phase input end of the first comparator is connected with the HSF reference voltage, the positive phase input end of the second comparator is connected with the second end of the third divider resistor and the first end of the fourth divider resistor, and the negative phase input end of the second comparator is connected with the FUL/OC reference voltage;
in the combinational logic gate circuit, the input end of the AND gate I is respectively connected with the output end of the comparator I and the tblank HSFThe input end of the AND gate II is respectively connected with the output end of the comparator II and the tblank FULThe output ends of the first and second and gates are respectively connected with the input end of the OR gate;
and the output end of the OR gate is connected with the soft turn-off circuit.
Preferably, the input end of the SiC MOSFET driving part is connected with a driving signal IN, and the output end OUT is connected with the soft turn-off circuit.
Preferably, the soft shutdown circuit includes: protective resistor RsoftAnd controlling the Mosfet; the protective resistor RsoftAnd the control devices are connected in series.
In another aspect of the invention, a SiC MOSFET short circuit detection method with temperature compensation is provided.
The embodiment of the invention provides a SiC MOSFET short circuit detection method with temperature compensation, which is characterized by comprising the following steps:
setting a reference voltage generating circuit, generating different reference voltages according to the ambient temperature and the junction temperature change of the SiCMOS through a positive temperature coefficient thermistor, and inputting the reference voltages into the short circuit detection circuit;
setting a logic signal processing circuit based on an FPGA, generating two different fault detection dead zone times through the FPGA and sending the two different fault detection dead zone times to the short circuit detection circuit;
setting a short-circuit detection circuit, detecting the short-circuit fault of the SiC MOSFET based on saturation voltage drop and logic processing under the short-circuit working condition, outputting a fault signal, generating a driving signal and sending the driving signal to the soft turn-off circuit;
and a soft turn-off circuit is arranged for receiving the driving signal of the short-circuit detection circuit and safely turning off the SiC MOSFET under the short-circuit working condition.
Preferably, the setting reference voltage generating circuit generates different reference voltages according to the ambient temperature and the junction temperature change of the SiC MOSFET by using a positive temperature coefficient thermistor, and inputs the reference voltages to the short circuit detecting circuit, and includes:
in the reference voltage generating circuit, a positive temperature coefficient thermistor is arranged, and two reference voltages are generated by utilizing the positive temperature coefficient thermistor according to the change of the ambient temperature and the junction temperature of the SiC MOSFET: and respectively inputting the reference voltage into a short circuit detection circuit by using the HSF reference voltage and the FUL/OC reference voltage, and judging whether the SiC MOSFET has a fault or not and the fault type of the SiC MOSFET by comparing the reference voltage with the voltage value under the actual working condition.
Preferably, the setting of the logic signal processing circuit based on the FPGA, generating two different dead zone times of fault detection by the FPGA and sending the dead zone times to the short circuit detection circuit includes:
taking the positive drive voltage of the drive output as a reference, sending OUT a drive signal OUT of the drive output through the FPGA and then passing through tdelay1After a digital logic delay of (a), an input signal t of an AND gate for detecting an HSF faultblank HSFIs turned over to high level, passing tdelay2After a digital logic delay, the input signal t of the AND gate for detecting FUL/OC faultsblank FULTurning to a high level;
said t isdelay1For dead zone time, at tdelay1Within a time range of (3), not detecting a failure of the SiC MOSFET;
will be at t after issuing a drive signal OUT at the drive outputdelay1~tdelay2Judging the fault in the time range as an HSF fault;
at tdelay2The latter fault is determined to be a FUL/OC fault.
Preferably, a short circuit detection circuit is provided, under a short circuit condition, the short circuit fault of the SiCMOSFET is detected based on saturation voltage drop and logic processing, a fault signal is output, and a driving signal is generated and sent to the soft shutdown circuit, including:
by arranging two comparators, the HSF reference voltage and the FUL/OC reference voltage generated by the reference voltage generating circuit are compared with the voltage under the actual working condition;
connecting the output end of the comparator with a combined logic gate circuit, wherein when a short-circuit fault occurs, the output level of the comparator is inverted, changed from low to high, and connected to the input end of an AND gate, and then performing AND operation on the output of the comparator and an input signal generated after a drive signal OUT of the drive output is subjected to digital logic delay, and adjusting the dead zone time for detection to prevent the transient process of opening the SiC MOSFET from being mistakenly judged as a short circuit;
the first voltage-dividing resistor, the second voltage-dividing resistor, the third voltage-dividing resistor and the fourth voltage-dividing resistor which are arranged in the short circuit detection circuit are respectively:R1、R2、R3、R4Then, performing steady state analysis on the short circuit detection circuit, wherein the voltage of the point X is as follows:
wherein, VDSIs the value of the saturation pressure drop, V, desired to be protectedDesatIs to detect the conduction voltage drop of the diode, passing through VDSCalculating the reference voltage V of the comparatorcomIf the voltage at the positive phase input terminal of the comparator is:
as can be seen from the technical solutions provided by the embodiments of the present invention, an embodiment of the present invention provides a SiC MOSFET short circuit detection circuit with temperature compensation, where the detection circuit includes: the device comprises a reference voltage generating circuit, a short circuit detection circuit, a SiC MOSFET and a soft turn-off circuit; the reference voltage generating circuit generates different reference voltages according to the ambient temperature and junction temperature changes of the SiC MOSFET through a positive temperature coefficient thermistor, the reference voltages are input into the short-circuit detection circuit, the logic signal processing circuit generates two different fault detection dead zone times through the FPGA and sends the two different fault detection dead zone times to the short-circuit detection circuit, the short-circuit detection circuit detects the short-circuit fault of the SiC MOSFET based on saturation voltage drop and logic processing under the short-circuit working condition, outputs a fault signal, generates a driving signal and sends the driving signal to the soft turn-off circuit, and the soft turn-off circuit receives the driving signal and then safely turns off the SiMOSFET under the short-circuit working condition. The invention can change the saturation voltage drop detection value of the short-circuit detection circuit when the temperature changes, the detection dead zone time is adjustable by the FPGA, the short-circuit protection delay is very small, and the SiC MOSFET can be effectively protected from being damaged when the short-circuit fault occurs. The invention can quickly respond, flexibly set the dead zone time, improve the reliability of the application of the SiC MOSFET and meet the use requirement of the drive protection of the high-power SiC MOSFET.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive labor.
Fig. 1 is a schematic structural diagram of a short circuit detection circuit of a SiC MOSFET short circuit detection circuit with temperature compensation according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a logic signal processing circuit of a SiC MOSFET short circuit detection circuit with temperature compensation according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a reference voltage generating circuit structure (full/OC operating condition) of a SiC MOSFET short-circuit detection circuit with temperature compensation according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a reference voltage generating circuit structure (HSF operating mode) of the SiC MOSFET short circuit detection circuit with temperature compensation according to the embodiment of the present invention;
fig. 5 is a schematic diagram of a soft turn-off circuit of a SiC MOSFET short circuit detection circuit with temperature compensation according to an embodiment of the present invention;
fig. 6 is a processing flow chart of a SiC MOSFET short circuit detection method with temperature compensation according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
As used herein, the singular forms "a", "an", "the" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may also be present. Further, "connected" or "coupled" as used herein may include wirelessly connected or coupled. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
For the convenience of understanding the embodiments of the present invention, the following description will be further explained by taking several specific embodiments as examples in conjunction with the drawings, and the embodiments are not to be construed as limiting the embodiments of the present invention.
Example one
The embodiment of the invention provides a SiC MOSFET short-circuit detection circuit with temperature compensation and a method thereof, which overcome the defect that the dead zone time can be flexibly set through a digital circuit for the inaccurate fault detection of short-circuit detection current when the temperature changes, so that the short-circuit protection delay is greatly reduced.
In one aspect of the embodiments of the present invention, a SiC MOSFET short circuit detection circuit with temperature compensation is provided.
The structural schematic diagram of the SiC MOSFET short circuit detection circuit with temperature compensation provided by the embodiment of the present invention is shown in fig. 1 to 5, and specifically includes: the device comprises a reference voltage generating circuit, a logic signal processing circuit, a short circuit detection circuit, a SiCSMOSFET and a soft turn-off circuit, wherein the reference voltage generating circuit, the short circuit detection circuit and the SiC MOSFET are sequentially connected, the short circuit detection circuit is respectively connected with the logic signal processing circuit and the soft turn-off circuit, and the soft turn-off circuit is connected with the SiC MOSFET. The specific contents of each component of the SiC MOSFET short circuit detection circuit are as follows:
(1) reference voltage generating circuit
And the reference voltage generating circuit is used for generating different reference voltages according to the ambient temperature and the junction temperature change of the SiCMOS through a positive temperature coefficient thermistor and inputting the reference voltages into the short circuit detection circuit.
As shown in fig. 3 and 4, the reference voltage generating circuit includes: the temperature control circuit comprises a positive temperature coefficient thermistor, a first metal film resistor and a second metal film resistor, wherein the first metal film resistor, the positive temperature coefficient thermistor and the second metal film resistor are sequentially connected in series.
The positive temperature coefficient thermistor is connected with the first metal film resistor and the second metal film resistor in series for voltage division according to the change of the ambient temperature and the junction temperature of the SiC MOSFET, and two reference voltages are generated between the first metal film resistor and the positive temperature coefficient thermistor: the voltage reference circuit comprises an HSF reference voltage and an FUL/OC reference voltage, wherein the value of the HSF reference voltage is higher than that of the FUL/OC reference voltage.
The HSF reference voltage and the FUL/OC reference voltage are used for being respectively input into the short-circuit detection circuit.
(2) Logic signal processing circuit
And the logic signal processing circuit is used for generating two different fault detection dead zone times through the FPGA and sending the two different fault detection dead zone times to the short circuit detection circuit.
As shown in fig. 2, the logic signal processing circuit includes: and (5) FPGA.
The FPGA is used for adjusting the time of the fault detection dead zone and generating two different fault detection dead zone times; the FPGA receives a driving signal OUT output by driving, and the driving signal OUT passes through tdelay1After a digital logic delay, an input signal t for detecting HSF faults is generatedblank HSFPassing through tdelay2After a digital logic delay, an input signal t for detecting the FUL/OC fault is generatedblank FUL。
The input signal tblank HSFAnd said input signal tblank FULAnd are respectively input into the short circuit detection circuit.
(3) Short circuit detection circuit
And the short-circuit detection circuit is used for detecting the short-circuit fault of the SiCMOS based on saturation voltage drop and logic processing under the short-circuit working condition, outputting a fault signal, generating a driving signal and sending the driving signal to the soft turn-off circuit.
The short circuit detection circuit does not act when the SiC MOSFET works normally, and can detect short circuit fault in a very short time and output a fault signal when the SiC MOSFET is in short circuit.
The short circuit detection circuit includes: detection diode, divider resistance one, divider resistance two, divider resistance three, divider resistance four, comparator and combinational logic gate circuit, the combinational logic gate circuit includes: and the AND gate I, the AND gate II and the OR gate.
The input end of the detection diode is connected with the first divider resistor, the output end of the detection diode is connected with the drain electrode of the SiC MOSFET, and the first end of the first divider resistor is connected with the second end of the second divider resistor and the first end of the third divider resistor.
The second divider resistor, the third divider resistor and the fourth divider resistor are sequentially connected in series, the first end of the second divider resistor is connected with a driving part for driving output to output OUT, and the second end of the fourth divider resistor is connected with-4V.
The comparator is two, includes: the first comparator and the second comparator are used for being connected with the reference voltage generating circuit, a positive phase input end of the first comparator is connected with the second end of the third divider resistor and the first end of the fourth divider resistor, an inverted phase input end of the first comparator is connected with the HSF reference voltage, a positive phase input end of the second comparator is connected with the second end of the third divider resistor and the first end of the fourth divider resistor, and an inverted phase input end of the second comparator is connected with the FUL/OC reference voltage.
In the combinational logic gate circuit, the input end of the AND gate I is respectively connected with the output end of the comparator I and the tblank HSFThe input end of the AND gate II is respectively connected with the output end of the comparator II and the tblank FULAnd the output ends of the first and second and gates are respectively connected with the input end of the OR gate.
The output end of the OR gate is connected with the soft turn-off circuit.
(4) Soft turn-off circuit
And the soft turn-off circuit is used for receiving the driving signal of the short-circuit detection circuit and safely turning off the SiC MOSFET under the short-circuit working condition.
As shown in fig. 5, a protection resistor R connected in series is provided in the soft-off circuitsoftAnd controlling the Mosfet.
In another aspect of the embodiments of the present invention, a SiC MOSFET short circuit detection method with temperature compensation is provided.
Fig. 6 shows a processing flow chart of a SiC MOSFET short circuit detection method with temperature compensation according to an embodiment of the present invention, where the method includes the following specific steps:
step S610: and setting a reference voltage generating circuit, generating different reference voltages according to the ambient temperature and the junction temperature change of the SiC MOSFET by using the positive temperature coefficient thermistor, and inputting the reference voltages into the short circuit detection circuit.
In the reference voltage generating circuit, a positive temperature coefficient thermistor is arranged, and two reference voltages are generated by utilizing the positive temperature coefficient thermistor according to the change of the ambient temperature and the junction temperature of the SiC MOSFET: and respectively inputting the reference voltage into a short circuit detection circuit by using the HSF reference voltage and the FUL/OC reference voltage, and judging whether the SiC MOSFET has a fault or not and the fault type of the SiC MOSFET by comparing the reference voltage with the voltage value under the actual working condition.
Step S620: a logic signal processing circuit based on the FPGA is arranged, two different fault detection dead zone times are generated through the FPGA and are sent to a short circuit detection circuit.
Taking the positive drive voltage of the drive output as a reference, sending OUT a drive signal OUT of the drive output through the FPGA and then passing through tdelay1After a digital logic delay of (a), an input signal t of an AND gate for detecting an HSF faultblank HSFIs turned over to high level, passing tdelay2After a digital logic delay, the input signal t of the AND gate for detecting FUL/OC faultsblank FULToggling to a high level.
Said t isdelay1For dead zone time, at tdelay1Does not detect a failure of the SiC MOSFET.
Will be at t after issuing a drive signal OUT at the drive outputdelay1~tdelay2And the fault in the time range is judged as the HSF fault.
At tdelay2The latter fault is determined to be a FUL/OC fault.
Step S630: and a short circuit detection circuit is arranged, under the short circuit working condition, the short circuit fault of the SiCMOS is detected based on saturation voltage drop and logic processing, a fault signal is output, and a driving signal is generated and sent to the soft turn-off circuit.
By arranging two comparators, the HSF reference voltage and the FUL/OC reference voltage generated by the reference voltage generating circuit are compared with the voltage under the actual working condition.
And connecting the output end of the comparator with a combined logic gate circuit, wherein when a short-circuit fault occurs, the output level of the comparator is inverted and is changed from low to high, the output level of the comparator is connected with the input end of an AND gate, and then the output of the comparator is compared with an input signal generated after a drive signal OUT of the drive output is subjected to digital logic delay, so that the dead zone time for detection is adjusted, and the transient process of opening the SiC MOSFET is prevented from being judged as a short circuit by mistake.
The first voltage dividing resistor, the second voltage dividing resistor, the third voltage dividing resistor and the fourth voltage dividing resistor which are arranged in the short circuit detection circuit are respectively as follows: r1、R2、R3、R4Then, performing steady state analysis on the short circuit detection circuit, wherein the voltage of the point X is as follows:
wherein, VDSIs the value of the saturation pressure drop, V, desired to be protectedDesatIs to detect the conduction voltage drop of the diode, passing through VDSCalculating the reference voltage V of the comparatorcomIf the voltage at the positive phase input terminal of the comparator is:
in the short detection circuit as in fig. 1, the high level of the driving signal OUT may be set to 20V and the low level may be set to-4V.
Step S640: and a soft turn-off circuit is arranged to receive a driving signal of the short circuit detection circuit and safely turn off the SiC MOSFET under the short circuit working condition.
Compared with the prior art, the invention has the following advantages:
(1) under the condition that the ambient temperature and the junction temperature of the SiC MOSFET change, the saturation voltage drop detection value of the short-circuit detection circuit can be changed.
(2) Two different dead zone times can be set, and the digital circuit sets the dead zone times in two fault states of HSF and FUL or OC respectively.
(3) The short-circuit fault of the SiC MOSFET can be accurately and quickly detected, the fault signal is output almost without delay, and the delay almost only comes from the transmission delay of a comparator and a logic device.
In summary, the embodiment of the present invention provides a SiC MOSFET short circuit detection circuit with temperature compensation, which includes: the device comprises a reference voltage generating circuit, a short circuit detection circuit, a SiC MOSFET and a soft turn-off circuit; the reference voltage generating circuit generates different reference voltages according to the ambient temperature and junction temperature changes of the SiC MOSFET through a positive temperature coefficient thermistor, the reference voltages are input into the short-circuit detection circuit, the logic signal processing circuit generates two different fault detection dead zone times through the FPGA and sends the two different fault detection dead zone times to the short-circuit detection circuit, the short-circuit detection circuit detects the short-circuit fault of the SiC MOSFET based on saturation voltage drop and logic processing under the short-circuit working condition, outputs a fault signal, generates a driving signal and sends the driving signal to the soft turn-off circuit, and the soft turn-off circuit receives the driving signal and then safely turns off the SiC MOSFET under the short-circuit working condition. The invention can change the saturation voltage drop detection value of the short-circuit detection circuit when the temperature changes, the detection dead zone time is adjustable by the FPGA, the short-circuit protection delay is very small, and the SiC MOSFET can be effectively protected from being damaged when the short-circuit fault occurs. The invention can quickly respond, flexibly set the dead zone time, improve the reliability of the application of the SiC MOSFET and meet the use requirement of the drive protection of the high-power SiC MOSFET.
Those of ordinary skill in the art will understand that: the figures are merely schematic representations of one embodiment, and the blocks or flow diagrams in the figures are not necessarily required to practice the present invention.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for apparatus or system embodiments, since they are substantially similar to method embodiments, they are described in relative terms, as long as they are described in partial descriptions of method embodiments. The above-described embodiments of the apparatus and system are merely illustrative, and the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A SiC MOSFET short detection circuit with temperature compensation, comprising: the device comprises a reference voltage generating circuit, a logic signal processing circuit, a short circuit detection circuit, a SiC MOSFET and a soft turn-off circuit, wherein the reference voltage generating circuit, the short circuit detection circuit and the SiC MOSFET are sequentially connected, the short circuit detection circuit is respectively connected with the logic signal processing circuit and the soft turn-off circuit, and the soft turn-off circuit is connected with the SiC MOSFET;
the reference voltage generating circuit is used for generating different reference voltages according to the ambient temperature and the junction temperature change of the SiCMOS through a positive temperature coefficient thermistor and inputting the reference voltages into the short circuit detection circuit;
the logic signal processing circuit is used for generating two different fault detection dead zone times through the FPGA and sending the two different fault detection dead zone times to the short circuit detection circuit;
the short circuit detection circuit is used for detecting the short circuit fault of the SiCMOS based on saturation voltage drop and logic processing under the short circuit working condition, outputting a fault signal, generating a driving signal and sending the driving signal to the soft turn-off circuit;
and the soft turn-off circuit is used for receiving a driving signal of the short-circuit detection circuit and safely turning off the SiC MOSFET under a short-circuit working condition.
2. The SiC MOSFET short detection circuit with temperature compensation of claim 1, wherein the reference voltage generation circuit comprises: the temperature control circuit comprises a positive temperature coefficient thermistor, a first metal film resistor and a second metal film resistor, wherein the first metal film resistor, the positive temperature coefficient thermistor and the second metal film resistor are sequentially connected in series;
the positive temperature coefficient thermistor is connected with the first metal film resistor and the second metal film resistor in series for voltage division according to the change of the ambient temperature and the junction temperature of the SiC MOSFET, and two reference voltages are generated between the first metal film resistor and the positive temperature coefficient thermistor: an HSF reference voltage and an FUL/OC reference voltage, wherein the value of the HSF reference voltage is higher than that of the FUL/OC reference voltage;
the HSF reference voltage and the FUL/OC reference voltage are used for being respectively input into the short-circuit detection circuit.
3. The SiC MOSFET short detection circuit with temperature compensation of claim 2, wherein the logic signal processing circuit comprises: an FPGA;
the FPGA is used for adjusting the time of the fault detection dead zone and generating two different fault detection dead zone times; wherein,
the FPGA receives a driving signal OUT output by driving, and the driving signal OUT passes through tdelay1After a digital logic delay, an input signal t for detecting HSF faults is generatedblank HSFPassing through tdelay2After a digital logic delay, an input signal t for detecting the FUL/OC fault is generatedblank FUL;
The input signal tblank HSFAnd said input signal tblank FULAnd are respectively input into the short circuit detection circuit.
4. The SiC MOSFET short detection circuit with temperature compensation of claim 3, wherein the short detection circuit comprises: detection diode, divider resistance one, divider resistance two, divider resistance three, divider resistance four, comparator and combinational logic gate circuit, the combinational logic gate circuit includes: the first and the second and the or gate;
the input end of the detection diode is connected with a first divider resistor, the output end of the detection diode is connected with the drain electrode of the SiC MOSFET, and the first end of the first divider resistor is connected with the second end of the second divider resistor and the first end of the third divider resistor;
the second voltage-dividing resistor, the third voltage-dividing resistor and the fourth voltage-dividing resistor are sequentially connected in series, the first end of the second voltage-dividing resistor is connected with OUT output by the driving part, and the second end of the fourth voltage-dividing resistor is connected with-4V;
the comparator is two, includes: the first comparator and the second comparator are used for being connected with the reference voltage generating circuit, the positive phase input end of the first comparator is connected with the second end of the third divider resistor and the first end of the fourth divider resistor, the negative phase input end of the first comparator is connected with the HSF reference voltage, the positive phase input end of the second comparator is connected with the second end of the third divider resistor and the first end of the fourth divider resistor, and the negative phase input end of the second comparator is connected with the FUL/OC reference voltage;
in the combinational logic gate circuit, the input end of the AND gate I is respectively connected with the output end of the comparator I and the tblank HSFThe input end of the AND gate II is respectively connected with the output end of the comparator II and the tblank FULThe output ends of the first and second and gates are respectively connected with the input end of the OR gate;
and the output end of the OR gate is connected with the soft turn-off circuit.
5. The SiC MOSFET short-circuit detection circuit with temperature compensation of claim 1, wherein the SiC MOSFET driving portion has an input terminal connected to a driving signal IN and an output terminal OUT connected to the soft turn-off circuit.
6. The SiC MOSFET short detection circuit with temperature compensation of claim 1, wherein the soft turn-off circuit comprises: protective resistor RsoftAnd controlling the Mosfet; the protective resistor RsoftAnd the control devices are connected in series.
7. A method for detecting short circuit of SiC MOSFET with temperature compensation, applied to the detection circuit of any of claims 1-6, characterized in that it comprises:
setting a reference voltage generating circuit, generating different reference voltages according to the ambient temperature and the junction temperature change of the SiC MOSFET through a positive temperature coefficient thermistor, and inputting the reference voltages into the short circuit detection circuit;
setting a logic signal processing circuit based on an FPGA, generating two different fault detection dead zone times through the FPGA and sending the two different fault detection dead zone times to the short circuit detection circuit;
setting a short-circuit detection circuit, detecting the short-circuit fault of the SiC MOSFET based on saturation voltage drop and logic processing under the short-circuit working condition, outputting a fault signal, generating a driving signal and sending the driving signal to the soft turn-off circuit;
and a soft turn-off circuit is arranged for receiving the driving signal of the short-circuit detection circuit and safely turning off the SiC MOSFET under the short-circuit working condition.
8. The SiC MOSFET short circuit detection circuit with temperature compensation of claim 7, wherein the set reference voltage generation circuit generates different reference voltages according to ambient temperature and junction temperature variation of the SiC MOSFET by a positive temperature coefficient thermistor and inputs the reference voltages to the short circuit detection circuit, comprising:
in the reference voltage generating circuit, a positive temperature coefficient thermistor is arranged, and two reference voltages are generated by utilizing the positive temperature coefficient thermistor according to the change of the ambient temperature and the junction temperature of the SiC MOSFET: and respectively inputting the reference voltage into a short circuit detection circuit by using the HSF reference voltage and the FUL/OC reference voltage, and judging whether the SiC MOSFET has a fault or not and the fault type of the SiC MOSFET by comparing the reference voltage with the voltage value under the actual working condition.
9. The SiC MOSFET short circuit detection circuit with temperature compensation of claim 7, wherein the setting is based on logic signal processing circuit of FPGA, two different dead time of fault detection are generated by FPGA and sent to the short circuit detection circuit, comprising:
taking the positive drive voltage of the drive output as a reference, sending OUT a drive signal OUT of the drive output through the FPGA and then passing through tdelay1After a digital logic delay of (a), an input signal t of an AND gate for detecting an HSF faultblank HSFIs turned over to high level, passing tdelay2After a digital logic delay, the input signal t of the AND gate for detecting FUL/OC faultsblank FULTurning to a high level;
said t isdelay1For dead zone time, at tdelay1Within a time range of (3), not detecting a failure of the SiC MOSFET;
will be at t after issuing a drive signal OUT at the drive outputdelay1~tdelay2Judging the fault in the time range as an HSF fault;
at tdelay2The latter fault is determined to be a FUL/OC fault.
10. The SiC MOSFET short circuit detection circuit with temperature compensation of claim 8, wherein the short circuit detection circuit is configured to detect a short circuit fault of the SiC MOSFET based on saturation voltage drop and logic processing, output a fault signal, and generate a drive signal to send to the soft shutdown circuit during a short circuit condition, comprising:
by arranging two comparators, the HSF reference voltage and the FUL/OC reference voltage generated by the reference voltage generating circuit are compared with the voltage under the actual working condition;
connecting the output end of the comparator with a combinational logic gate circuit, when a short-circuit fault occurs, inverting the output level of the comparator, changing from low to high, connecting the output level to the input end of an AND gate, and then performing digital logic delay on the output of the comparator and a driving signal OUT of the driving output to generate an input signal phase, adjusting the dead zone time for detection, and preventing the transient process of the opening of the SiCMOS from being mistakenly judged as a short circuit;
the first voltage dividing resistor, the second voltage dividing resistor, the third voltage dividing resistor and the fourth voltage dividing resistor which are arranged in the short circuit detection circuit are respectively as follows: r1、R2、R3、R4Then, performing steady state analysis on the short circuit detection circuit, wherein the voltage of the point X is as follows:
wherein, VDSIs the value of the saturation pressure drop, V, desired to be protectedDesatIs to detect the conduction voltage drop of the diode, passing through VDSCalculating the reference voltage V of the comparatorcomIf the voltage at the positive phase input terminal of the comparator is:
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