CN109004927A - Pulse signal transmission circuit and refresh pulse signal circuit - Google Patents
Pulse signal transmission circuit and refresh pulse signal circuit Download PDFInfo
- Publication number
- CN109004927A CN109004927A CN201811214673.1A CN201811214673A CN109004927A CN 109004927 A CN109004927 A CN 109004927A CN 201811214673 A CN201811214673 A CN 201811214673A CN 109004927 A CN109004927 A CN 109004927A
- Authority
- CN
- China
- Prior art keywords
- pull
- switch device
- pulse signal
- refresh
- drop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000008054 signal transmission Effects 0.000 title claims abstract description 56
- 238000002955 isolation Methods 0.000 claims abstract description 50
- 230000005540 biological transmission Effects 0.000 claims description 9
- 230000005611 electricity Effects 0.000 claims description 6
- 239000004065 semiconductor Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 description 27
- 230000008859 change Effects 0.000 description 16
- 239000003990 capacitor Substances 0.000 description 13
- 230000008569 process Effects 0.000 description 12
- 230000000630 rising effect Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 9
- 230000006870 function Effects 0.000 description 9
- 230000004913 activation Effects 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 210000001367 artery Anatomy 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 238000004590 computer program Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 210000003462 vein Anatomy 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017509—Interface arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Electronic Switches (AREA)
Abstract
Pulse signal transmission circuit provided by the embodiments of the present application, the pulse signal transmission circuit include: transmitter, isolation capacitance, receiver and drop-down refresh switch device;The output end of the transmitter is connect with one end of the isolation capacitance, and the other end of the isolation capacitance is connect with the input terminal of the receiver;One end of the drop-down refresh switch device is connect with one end far from the receiver of the output end of the transmitter and the isolation capacitance respectively, the control terminal of the other end ground connection of the drop-down refresh switch device, the drop-down refresh switch device controls the conducting and shutdown of drop-down refresh switch device according to the duration of transmitter logic state and logic state.
Description
Technical field
This application involves electrical component fields, in particular to a kind of pulse signal transmission circuit and pulse signal brush
Novel circuit.
Background technique
Isolation signals transmission be widely used in digital isolator, gate drivers, isolated data bus transceiver (such as
CAN bus, 485 buses, 232 buses etc.).Currently based on high-voltage capacitance isolation signals transmit technology due to power consumption, can
Advantage in property, transmission rate has gradually replaced traditional optical coupling isolator.
Isolation signals transmission technology based on high-voltage capacitance has two major classes code encoding/decoding mode, is impulse type and on & off switch respectively
Type (On-Off-Key).The coding mode of bond type is switched in the case where signal is long by 1 (or long 0), continuous transmission is needed to carry
Wave signal, so the power consumption of transceiver is main related with the duty ratio of signal, will not with the data transfer rate reduction of transmission signal and
Reduce.The transceiver of impulse type only works in the rising edge of signal and failing edge, rising edge and failing edge is carried out different
Coding is transmitted by high-voltage capacitance again.Using impulse type scheme, when data transfer rate is very low, the power consumption of system can significantly drop
It is low.But when signal be long 0 or it is long 1 when, transmitter can not output signal for a long time, in this process if receiver by
Error code occurs to interference, needs just be corrected when transmitter emits signal next time, leads to the make-up time
It is very long.
Apply for content
In view of this, the embodiment of the present application provides a kind of pulse signal transmission circuit and refresh pulse signal circuit.
The embodiment of the present application provides a kind of pulse signal transmission circuit, and the pulse signal transmission circuit includes: transmitting
Device, isolation capacitance, receiver and drop-down refresh switch device;One end of the output end of the transmitter and the isolation capacitance
Connection, the other end of the isolation capacitance are connect with the input terminal of the receiver;One end of the drop-down refresh switch device
It is connect respectively with one end far from the receiver of the output end of the transmitter and the isolation capacitance, the drop-down brush
The other end ground connection of new switching device, the control terminal of the drop-down refresh switch device is according to transmitter logic state and logic shape
The conducting and shutdown of the duration control drop-down refresh switch device of state.
The embodiment of the present application also provides a kind of refresh pulse signal circuits, including two above-mentioned pulse signal transmission electricity
Road, two pulse signal transmission circuits can be denoted as the first pulse signal transmission circuit and the second pulse signal transmission circuit;
The output end of signal source is connect with the input terminal of the input terminal of the first phase inverter and the second pulse signal transmission circuit respectively, institute
The output end for stating the first phase inverter is connect with the input terminal of the first pulse signal transmission circuit, and first pulse signal passes
Transmission of electricity road and the second same receiver of pulse signal transmission circuit connection.
Pulse signal transmission circuit and refresh pulse signal circuit provided by the embodiments of the present application have the beneficial effect that
Pulse signal transmission circuit provided by the embodiments of the present application, the pulse signal transmission circuit include: transmitter, every
From capacitor, receiver and drop-down refresh switch device;The output end of the transmitter is connect with one end of the isolation capacitance,
The other end of the isolation capacitance is connect with the input terminal of the receiver;It is described drop-down refresh switch device one end respectively with
One end far from the receiver of the output end of the transmitter and the isolation capacitance connects, the drop-down refresh switch
The other end of device is grounded, and the control terminal of the drop-down refresh switch device is held according to transmitter logic state and logic state
The conducting and shutdown of continuous time control drop-down refresh switch device.Pulling down refresh switch device can be by being slowly connected and quickly closing
It closes, so that the voltage of the output end of transmitter slowly declines and rapid increase, due to the mistake of the voltage of output end slowly declined
Cheng Bianhua is slower, and the change procedure of electric signal is difficult to pass to receiver by isolation capacitance, and the zooming process of voltage
Variation is very fast, can pass to receiver by capacitor, thus play in the case where the internal signal of transmitter does not change,
Generate again one can by the rising edge signal of isolation capacitance, come maintain receiver output level and transmitter output
End is consistent.
Above objects, features, and advantages to enable the embodiment of the present application to be realized are clearer and more comprehensible, be cited below particularly compared with
Good embodiment, and cooperate appended attached drawing, it is described in detail below.
Detailed description of the invention
Illustrate the technical solutions in the embodiments of the present application or in the prior art in order to clearer, to embodiment or will show below
There is attached drawing needed in technical description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of application for those of ordinary skill in the art without creative efforts, can be with
It obtains other drawings based on these drawings.
Fig. 1 is the circuit diagram of pulse signal transmission circuit in the prior art;
Fig. 2 shows the circuit diagrams of pulse signal transmission circuit provided by the embodiments of the present application;
Fig. 3 shows a kind of circuit of specific embodiment of pulse signal transmission circuit provided by the embodiments of the present application
Figure;
Fig. 4 shows the waveform diagram of the working principle of pulse signal transmission circuit provided by the embodiments of the present application;
Fig. 5 shows the waveform diagram of the working principle of pulse signal transmission circuit provided by the embodiments of the present application;
Fig. 6 shows the circuit diagram of refresh pulse signal circuit provided by the embodiments of the present application.
Specific embodiment
Existing pulse signal transmission circuit is as shown in Figure 1, input signal is A01, by what is be made of multistage phase inverter
Buffer circuit A10 is driven, the whole grade driver A11 of driving high_voltage isolation capacitor A20 is connected to.The other end of isolation capacitance A20
Receiver A30 is connected, receiver A30 is for detecting and decoding the signal transmitted by A20.
Since the impedance of capacitor reduces as frequency rises, so decaying when high-frequency signal passes through capacitor is small, low frequency
Signal passes through decaying height when capacitor.If the variation of signal is fast (dV/dt high, signal edge are precipitous), then receiver is transferred to
The signal amplitude of A30 is big;If the variation of signal is slow (dV/dt is low, and signal edge is gentle), then the letter of receiver A30 is transferred to
Number amplitude is small.
In order to illustrate working principle, the logic of a rising edge A02 and one long 1 are contained in input signal A01
A03, i.e. A03 indicate that the input of system is for a long time 1 without changing.The quantity of multistage phase inverter according to driving capability and
The Demand Design of delay can be odd number or even number, this is explained for sentencing odd number.In the grid of afterbody driver
On the A40 of pole, input signal reverse phase, the rising edge A02 of input corresponds to the failing edge A04 at A40, and the 1 logic A03 of length inputted
Correspond to the 0 logic A05 of length at A40.Afterbody driver A11 is also phase inverter, so the voltage of its output point A41 is patrolled
It volume reverts to identical with input voltage, contains rising edge A06 and long 1 logic A07.After the signal of A41 passes through capacitor A20, by
In the frequency response characteristic of capacitor, it includes that an amplitude is larger that rising edge A06, which is transferred to the signal A08 that receiver A30 is received,
Direct impulse A09, output terminals A 42 is set 1 by the logic circuit inside receiver A30, without signal along (rising edge or decline
Edge) period corresponding reception signal A08 be zero region, next pulse arrival before, patrolling inside receiver A30
The latch function of volume circuit will export A42, and to maintain 1 constant.
But if sufficiently large negative (opposite with an A09) pulse-couple has been arrived receiver by extraneous interference A60
The input terminal of A30, then output terminals A 42 will be set 0 by the logic circuit inside A30 by this negative pulse, and the latch inside A30
A42 can be maintained always 0 by function, until the next pulse of transmitter transmission reaches.There have been the inputs of system in this way
The situation different with output, and A30 can not identify this mistake caused by the extraneous interference of discovery, so error code can not obtain always
To correction.
In order to solve the above technical problems, the embodiment of the present application provides following pulse signal transmission circuit, it below will knot
Attached drawing is closed, is described in detail to the pulse signal transmission circuit in the embodiment of the present application.
Embodiment
Fig. 2 specifically is referred to, it is described Fig. 2 shows a kind of pulse signal transmission circuit 10 provided by the embodiments of the present application
Pulse signal transmission circuit include: transmitter 110 (not marking 110 range in figure), isolation capacitance A20, receiver A30 and
Pull down refresh switch device B20.The output end of the transmitter 110 is connect with one end of the isolation capacitance A20, the isolation
The other end of capacitor A20 is connect with the input terminal of the receiver A30.One end difference of the drop-down refresh switch device B20
It is connect with one end far from the receiver A30 of the output end of the transmitter 110 and the isolation capacitance A20, it is described
The other end ground connection of refresh switch device B20 is pulled down, the control terminal (i.e. grid) of the drop-down refresh switch device B20 is according to hair
The conducting and shutdown of the duration of emitter logic state and logic state control drop-down refresh switch device.
Fig. 3 is referred to, transmitter 110 includes timer A15, multiple phase inverters and whole grade phase inverter A11, the timing
The input terminal of device A15 is connect with input signal source and A41 respectively, the logical AND transmitter of the output end of the timer A15
Logic carry out by the first drive terminal carry out logical operation.Input signal or the whole grade phase inverter when transmitter 110
There is no when variation, one pulse width of timer A15 circuit output is second within the first waiting time for the output point of A11
The refresh signal of waiting time (WQt).The logic state of transmitter refers to determined by the input signal of transmitter, transmitter
The state of each logical node in circuit.The input of transmitter or the input/output of whole grade phase inverter are representative
Logical node.
It may include one or more phase inverters being connected between the input terminal of transmitter 110 and whole grade phase inverter A11, and
Whole grade phase inverter A11 is the afterbody for the phase inverter being connected in transmitter 110.
The input signal is also successively connect through the multiple phase inverter with the input terminal of the whole grade phase inverter A11, institute
The output end for stating whole grade phase inverter A11 is connect with the isolation capacitance A20.
The end grade phase inverter A11 includes pull-up switch device A50 and the device A51 that pulls down switch, the pull-up switch device
Output of the grid of the grid of part A50 and the device A51 that pulls down switch with the phase inverter in the multiple phase inverter
End connection;The source electrode of the pull-up switch device A50 is connect with power vd D, the drain electrode of the pull-up switch device A50 and institute
The drain electrode for stating the device A51 that pulls down switch is connect with one end of the isolation capacitance A20;The source of the device A51 that pulls down switch
Pole ground connection.
Isolation capacitance A20 is specifically as follows high_voltage isolation capacitor A20.Receiver A30 is used to detect and decoding passes through isolation
The signal that capacitor A20 is transmitted, wherein including comparator and latch circuit.
Drop-down refresh switch device B20 be set to whole grade phase inverter A11 output end and transmitter 110 ground potential it
Between, the drop-down refresh switch device B20 can be metal-oxide-semiconductor, be specifically as follows NMOS tube, refer to Fig. 3, the circuit also wraps
It includes drop-down and refreshes driver B10, it acts as control drop-down brush according to the duration of transmitter logic state and logic state
The conducting and shutdown of new switching device.The drop-down refreshes the output end and the drop-down refresh switch device B20 of driver B10
Grid connection, it is described drop-down refresh switch device B20 drain electrode respectively with the output end of the transmitter 110 and it is described every
One end far from the receiver A30 from capacitor A20 connects, the source electrode ground connection of the drop-down refresh switch device B20.
The conducting resistance for pulling down refresh switch device B20 is less than the conducting resistance of pull-up switch device A50, it is preferable that under
Draw the one third of conducting resistance of the conducting resistance of refresh switch device B20 less than pull-up switch device A50.Drop-down, which refreshes, opens
It closes device B20 and driver B10 control is refreshed by drop-down.
It includes the first drive terminal and asymmetric drop-down phase inverter that the drop-down, which refreshes driver B10,.Under the asymmetry
Drawing phase inverter includes the first control switch B21 and the second control switch B22, the grid of the first control switch B21 and the
The grid of two control switch B22 is connect with first drive terminal, the output end logic state and transmitting of the timer
The logic state of device carries out logical operation by first drive terminal;Operation result is connected to the drop-down and refreshes driving
Device makes it control conducting and the pass of drop-down refresh switch device according to the duration of transmitter logic state and logic state
It is disconnected.
The source electrode of the first control switch B21 connects to power supply, the drain electrode of the first control switch B21 and described
The drain electrode of second control switch B22 is connect with the grid of the drop-down refresh switch device B20, second control switch
The source electrode of B22 is grounded.The conducting resistance of the first control switch B21 is greater than the conducting resistance of the second control switch B22.
Specifically, the 50% of conducting resistance of the conducting resistance of the second control switch B22 less than the first control switch B21.
Fig. 3 is referred to, pulse signal transmission circuit provided by the embodiments of the present application further includes pull-up refresh switch device
B23, it is described pull-up refresh switch device B23 one end respectively with the output end and the isolation capacitance of the transmitter 110
One end far from the receiver A30 of A20 connects, and the other end of the pull-up refresh switch device B23 connects to power supply, institute
The control terminal for stating pull-up refresh switch device controls pull-up according to the duration of transmitter logic state and logic state and refreshes
The conducting and shutdown of switching device.The conducting resistance of pull-up refresh switch device B23 is less than the electric conduction for the device A51 that pulls down switch
Resistance, it is preferable that the three of conducting resistance of the conducting resistance of pull-up refresh switch device B23 less than the device A51 that pulls down switch/
One.
The pull-up refresh switch device B23 can be metal-oxide-semiconductor, be specifically as follows PMOS tube, on the circuit further includes
It draws and refreshes driver B11, the pull-up refreshes the output end of driver B11 and the grid of the pull-up refresh switch device B23
(i.e. control terminal) connection, it is described pull-up refresh switch device B23 drain electrode respectively with the output end of the transmitter 110 and institute
The one end far from the receiver A30 for stating isolation capacitance A20 connects, the source electrode of the pull-up refresh switch device B23 and institute
State power vd D connection.Pull-up refreshes driver B11 control pull-up refresh switch device B23.
It includes the second drive terminal and asymmetric pull-up phase inverter that the pull-up, which refreshes driver B11, in the asymmetry
Drawing phase inverter includes third control switch B24 and the 4th control switch B25, the grid of the third control switch B24 and the
The grid of four control switch B25 is connect with second drive terminal.The output end logic state and transmitting of the timer
The logic state of device carries out logical operation by second drive terminal;Operation result is connected to the pull-up and refreshes driving
Device makes it control conducting and the pass of pull-up refresh switch device according to the duration of transmitter logic state and logic state
It is disconnected.
The source electrode of the third control switch B24 is connect with power vd D, the drain electrode of the third control switch B24 and
The drain electrode of the 4th control switch B25 is connect with the grid of the pull-up refresh switch device B23, and the 4th control is opened
Close the source electrode ground connection of B25.The 50% of conducting resistance of the conducting resistance of third control switch B24 less than the 4th control switch B25.
The working principle of pulse signal transmission circuit provided by the embodiments of the present application are as follows:
When timer A15 circuit does not export refresh signal, the pull-up refresh switch device B23 shutdown, under described
Draw refresh switch device B20 shutdown.
If there is no variation, timers in the first waiting time Wf for the output point of Vin or whole grade phase inverter
TIMER exports a logical signal by the second waiting time (WQt) for pulse width (in the present embodiment by taking logic 1 as an example)
As refresh signal, other moment, TIMER exported opposite logical signal, i.e., without refresh signal (in the present embodiment with logical zero
For).
When timer A15 circuit output refresh signal, below by the output of whole grade phase inverter A11 be high level for into
Row explanation:
Drop-down refreshes driver B10 control drop-down refresh switch device B20 in the fisrt feature time after refresh signal starts
The transformation from shutdown to conducting is completed in section, completes to be restored to pass from conducting within the second feature period after refresh signal
It is disconnected;Wherein the duration of fisrt feature period is 3 times or more of the duration of the second feature period.
When the input point A40 of the whole grade phase inverter is 0 and the timer A15 circuit has output refresh signal, no
The input B43 of symmetrical drop-down phase inverter is logical zero;Input B43 of asymmetric drop-down phase inverter is logic 1 in the case of other.
Second waiting time is greater than or equal to the fisrt feature period.
When whole grade phase inverter output point A41 export be high level (logic 1) signal when, Fig. 4 is referred to, first etc.
To without refresh signal, pull up refresh circuit at this time and drop-down refresh circuit does not work, is i.e. pull-up refresh switch device in the time
Part B23 and drop-down refresh switch device B20 are in off state, and the output point A41 of whole grade phase inverter is exported not by shadow at this time
It rings, maintains the state of high level.For pulling down refresh switch device B20 and be NMOS: the input of asymmetry drop-down phase inverter
B43 is 1;The grid input of first drop-down refresh switch device B20 is 0.
Within the second waiting time, there is refresh signal, the input B44 of asymmetric pull-up phase inverter remains 0, B43 at this time
Become 0 from 1, pull-up refresh circuit does not work, drop-down refresh circuit work.That is pull-up refresh switch device B23 is still in shutdown
State, drop-down refresh switch device B20 are gradually opened under the action of asymmetry pulls down phase inverter, since asymmetry pulls down reverse phase
The pull-down capability of device is sufficiently large, and pull-up ability is sufficiently small, it is possible to the different signal of two speed is generated in refresh process
Edge, specific:
The input of asymmetry drop-down phase inverter becomes 0 from 1, at this time the first control switch in asymmetric drop-down phase inverter
B21 is opened, the second control switch B22 shutdown;Since the conducting resistance of the second control switch B22 is less than the first control switch B21
Conducting resistance 50%;So supply voltage is filled by the first control switch B21 to the grid of drop-down refresh switch device B20
The speed of electricity is slower, therefore the first drop-down refresh switch device B20 is to be gradually turned on, this conducting speed is very slow, whole grade reverse phase
The output point A41 signal edge of device is gentle (pace of change is slow), is reached by the signal that isolation capacitance A20 is transferred to receiver A30
Less than the threshold value of receiver A30, it is not enough to trigger receiver A30.On the other hand, leading due to drop-down refresh switch device B20
The resistance that is powered is less than the 1/3 of the pull-up switch device A50 conducting resistance, so fully in drop-down refresh switch device B20
Afterwards, the voltage of A41 is determined by the partial pressure of A50 and B20, i.e., minimum value A61 of the whole grade inverter output voltage when refreshing is less than
The 1/4 of the corresponding voltage of high level.Then, the second waiting time terminated, and the input of asymmetry drop-down phase inverter is restored to 1, this
When the first control switch B21 turn off, the second control switch B22 conducting.
Due to the conducting resistance of the second control switch B22 less than the first control switch B21 50%, so to drop-down refresh
The electric discharge of switching device B20 is very fast, causes the rapid shutdown of B20, thus by the defeated of whole grade phase inverter under the action of A50
Voltage A41 quickly recovers to 1 out.Quickly, the output point (A41) of whole grade phase inverter forms very precipitous letter to this turn-off speed
Number edge (pace of change is fast), refers to Fig. 4, has been more than A30's by the signal that isolation capacitance A20 is transferred to receiver A30
Threshold value, it is sufficient to trigger receiver A30.To transmit an arteries and veins from high level to low level (from 0 to 1) to receiver A30
Punching allows receiver A30 to can be confirmed that the output of present transmitter 110 is 1.
I.e. by realizing the on or off of the first control switch B21 and the second control switch B22, so that B20 is slow
Be connected and rapidly switch off, and being slowly connected and rapidly switching off for B20 may be implemented A41 and slowly drop to 0 by 1, and by 0 quickly on
Rise to 1.Wherein, Fig. 4 is referred to, since the A41 corresponding change procedure of process for slowly dropping to 0 by 1 more mitigates, therefore is generated
Pulse signal do not reach receiver A30 activation threshold value, A41 by 0 rapidly increase to 1 the corresponding change procedure of process it is more fast
Therefore speed, the activation threshold value that the pulse signal accordingly generated reaches receiver A30 can allow again receiver A30 to receive one
The signal of a rising edge, so that the output of receiver A30 is consistent with the output of transmitter 110.
When timer A15 circuit output refresh signal, below by the output of whole grade phase inverter A11 be low level for into
Row explanation:
If the output A41 of the whole grade phase inverter described at this time is low level, pull-up refreshes driving after refresh signal starts
Device B11 control pull-up refresh switch device B23 completes the transformation from shutdown to conducting, refresh signal within the third feature period
After complete from conducting to be restored to shutdown within the fourth feature period;The duration of the third feature period is described
3 times or more of the duration of four characteristic times section.
When the input point A40 of the whole grade phase inverter is 1 and the timer A15 circuit has output refresh signal, no
The input B44 of symmetrical pull-up phase inverter is logic 1;In the case of other, the input B44 of asymmetry pull-up phase inverter is logical zero.
The input B44 of asymmetry pull-up phase inverter is 0;The grid input of first pull-up refresh switch device B23 is 1.
Within the first waiting time, without refresh signal, B44 remains 0, B43 and remains 1 at this time, pulls up refresh circuit
It does not work with drop-down refresh circuit, i.e. pull-up refresh switch device B23 and drop-down refresh switch device B20 are in shutdown shape
State, the output point A41 output of whole grade phase inverter is unaffected at this time, maintains the state of high level.To pull up refresh switch device
For part B23 is PMOS: the input B44 of asymmetry pull-up phase inverter is 0;The grid of first pull-up refresh switch device B23 is defeated
Enter is 1.
Within the second waiting time, there is refresh signal, pulls down refresh circuit at this time and do not work, pull-up refresh circuit work.
That is drop-down refresh switch device B20 pulls up refresh switch device B23 in the work of asymmetric pull-up phase inverter still in off state
It is gradually opened under, since the pull-down capability of asymmetric pull-up phase inverter is sufficiently small, pull-up ability is sufficiently large, it is possible to brush
The different signal edge of two speed is generated during new, specific:
The input B44 of asymmetry pull-up phase inverter becomes 1 from 0, and the 4th control in asymmetric pull-up phase inverter is opened at this time
Close B25 conducting, third control switch B24 shutdown;Since the conducting resistance of third control switch B24 is less than the 4th control switch
The 50% of the conducting resistance of B25;So the speed that ground is discharged by the 4th control switch B25 to pull-up refresh switch device B23
It is relatively slow, therefore pulling up refresh switch device B23 is to be gradually turned on, this conducting speed is very slow, refers to Fig. 5, whole grade phase inverter
Output point A41 signal edge it is gentle (pace of change is slow), the signal for being transferred to receiver A30 by isolation capacitance A20 is insufficient
To trigger receiver A30.
On the other hand, since the conducting resistance of pull-up refresh switch device B23 is less than the device A51 conducting that pulls down switch
The 1/3 of resistance, so the voltage of A41 is determined by the partial pressure of A51 and B23 after pull-up refresh switch device B23 is fully on,
Maximum value A62 of the i.e. whole grade inverter output voltage when refreshing is greater than the 3/4 of the corresponding voltage of high level.Then, second etc.
To the end of the time, the input B44 of asymmetry pull-up phase inverter is restored to 0, and the 4th control switch B25 is turned off at this time, third control
Switch B24 conducting.Since the conducting resistance of third control switch B24 is less than the 4th control switch B25, so power supply passes through third
Control switch B24 is very fast to the charging of the grid of pull-up refresh switch device B23, causes the rapid shutdown of B23, thus
The output voltage A41 of whole grade phase inverter is quickly recovered to 0 under the action of A51.This turn-off speed quickly, forms very precipitous
Signal edge (pace of change is fast), refer to Fig. 5, be enough to trigger by the signal that isolation capacitance A20 is transferred to receiver A30
Receiver A30.To receiver A30 transmit a pulse from high level to low level (from 1 to 0), receiver A30 is allowed
The output that present transmitter 110 can be confirmed is 0.
Fig. 5 is referred to, since the A41 corresponding change procedure of process for slowly rising to 1 by 0 more mitigates, therefore generate
Pulse signal does not reach receiver A30 activation threshold value, A41 by 1 drop quickly to 0 the corresponding change procedure of process it is more fast
Therefore speed, the activation threshold value that the pulse signal accordingly generated reaches receiver A30 can allow again receiver A30 to receive one
The signal of a failing edge confirms that the output of A30 should be 0, so that the output of the output of receiver A30 and transmitter 110
Unanimously.
According to above to the description of working principle, it is available below logical relation:
That is:
Asymmetry pull-up phase inverter input=end grade phase inverter input AND has refresh signal
Asymmetry drop-down phase inverter input=end grade phase inverter input OR (NOT has refresh signal)
Upper relation of plane can also use other signals or other equivalent logical expressions in system to realize, should not
As limitation of the invention.In conclusion the output end logic state of timer and the logic state of transmitter are driven by first
Moved end carries out logical operation, and result is connected with the input terminal of asymmetric drop-down phase inverter;The output end logic shape of timer
State and the logic state of transmitter pass through another logical operation of the second drive terminal progress, result and asymmetric pull-up phase inverter
Input terminal be connected.
It should be noted that the pull-up refresh circuit and the drop-down refresh circuit are all connected to the defeated of whole grade phase inverter
Point out.It can be connected by certain logic circuit between end grade phase inverter A11 and the input of the transmitter 110, it is excellent
Choosing, several phase inverters amplified step by step are further comprised before the whole grade phase inverter, for enhancing driving capability.Refresh electricity
The output of whole grade phase inverter, i.e., the position being connected with isolation capacitance A20 can only be arranged in road, and cannot be arranged in the phase inverter it
The output of preceding other phase inverters.If being arranged refresh circuit before whole grade phase inverter, one can only be generated at this
A gentle edge, when one end by reaching isolation capacitance A20 after one or more levels phase inverter of this gentle edge again
Precipitous edge signal can be reverted to, all transmits amplitude to receiver A30 so as to cause the rising edge and failing edge of refresh signal
More than the pulse of threshold value, receiver A30 is caused to receive the signal of mistake.
The embodiment of the present application also provides a kind of refresh pulse signal circuits, refer to Fig. 6, including two above-mentioned pulses
Signal circuit, two pulse signal transmission circuits can be denoted as the first pulse signal transmission circuit and the second pulse signal
Transmission circuit;
The output end of signal source is connect with the input terminal of the input terminal of the first phase inverter 210 and delayer 220 respectively, institute
The output end for stating the first phase inverter 210 is connect with the input terminal of the first pulse signal transmission circuit, the output of delayer 220
End is connect with the input terminal of the second pulse signal transmission circuit, and the first pulse signal transmission circuit and the second pulse signal pass
The defeated same receiver A30 of circuit connection.
The output end of signal source prolongs with the first pulse signal transmission circuit for having connect the first phase inverter 210 and having connect respectively
When device 220 the second pulse signal transmission circuit connection, can preferably eliminate during electric signal transmission caused by error.
Pulse signal transmission circuit provided by the embodiments of the present application, the pulse signal transmission circuit includes: transmitter
110, isolation capacitance A20, receiver A30 and drop-down refresh switch device B20;The output end of the transmitter 110 with it is described
One end of isolation capacitance A20 connects, and the other end of the isolation capacitance A20 is connect with the input terminal of the receiver A30;It is described
The one end for pulling down refresh switch device B20 is separate with the output end of the transmitter 110 and the isolation capacitance A20 respectively
One end of the receiver A30 connects, the other end ground connection of the drop-down refresh switch device B20.Pull down refresh switch device
B20 can by being slowly connected and quick-make, so that the voltage of the output end of transmitter 110 slowly decline simultaneously rapid increase, by
Slower in the change in process of the voltage of output end slowly declined, the change procedure of electric signal is difficult to pass by isolation capacitance A20
To receiver A30, and the zooming change in process of voltage is very fast, receiver A30 can be passed to by capacitor, to play
In the case where the internal signal of transmitter 110 does not change, the rising of isolation capacitance A20 can be passed through by generating one again
Along signal, to maintain the output level of receiver A30 consistent with the output end of transmitter 110.
It should be noted that all the embodiments in this specification are described in a progressive manner, each embodiment weight
Point explanation is the difference from other embodiments, and the same or similar parts between the embodiments can be referred to each other.
For device class embodiment, since it is basically similar to the method embodiment, so being described relatively simple, related place ginseng
See the part explanation of embodiment of the method.
In several embodiments provided herein, it should be understood that disclosed device and method can also pass through it
Its mode is realized.The apparatus embodiments described above are merely exemplary, for example, the flow chart and block diagram in attached drawing are aobvious
The device of multiple embodiments according to the application, architectural framework in the cards, the function of method and computer program product are shown
It can and operate.In this regard, each box in flowchart or block diagram can represent one of a module, section or code
Point, a part of the module, section or code includes one or more for implementing the specified logical function executable
Instruction.It should also be noted that function marked in the box can also be attached to be different from some implementations as replacement
The sequence marked in figure occurs.For example, two continuous boxes can actually be basically executed in parallel, they sometimes may be used
To execute in the opposite order, this depends on the function involved.It is also noted that each of block diagram and or flow chart
The combination of box in box and block diagram and or flow chart can be based on the defined function of execution or the dedicated of movement
The system of hardware is realized, or can be realized using a combination of dedicated hardware and computer instructions.
In addition, each functional module in each embodiment of the application can integrate one independent portion of formation together
Point, it is also possible to modules individualism, an independent part can also be integrated to form with two or more modules.
It, can be with if the function is realized and when sold or used as an independent product in the form of software function module
It is stored in a computer readable storage medium.Based on this understanding, the technical solution of the application is substantially in other words
The part of the part that contributes to existing technology or the technical solution can be embodied in the form of software products, the meter
Calculation machine software product is stored in a storage medium, including some instructions are used so that a computer equipment (can be a
People's computer, server or network equipment etc.) execute each embodiment the method for the application all or part of the steps.
And storage medium above-mentioned includes: that USB flash disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), arbitrary access are deposited
The various media that can store program code such as reservoir (RAM, Random Access Memory), magnetic or disk.It needs
Illustrate, herein, relational terms such as first and second and the like be used merely to by an entity or operation with
Another entity or operation distinguish, and without necessarily requiring or implying between these entities or operation, there are any this realities
The relationship or sequence on border.Moreover, the terms "include", "comprise" or its any other variant are intended to the packet of nonexcludability
Contain, so that the process, method, article or equipment for including a series of elements not only includes those elements, but also including
Other elements that are not explicitly listed, or further include for elements inherent to such a process, method, article, or device.
In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that including the element
Process, method, article or equipment in there is also other identical elements.
The foregoing is merely preferred embodiment of the present application, are not intended to limit this application, for the skill of this field
For art personnel, various changes and changes are possible in this application.Within the spirit and principles of this application, made any to repair
Change, equivalent replacement, improvement etc., should be included within the scope of protection of this application.It should also be noted that similar label and letter exist
Similar terms are indicated in following attached drawing, therefore, once being defined in a certain Xiang Yi attached drawing, are then not required in subsequent attached drawing
It is further defined and explained.
The above, the only specific embodiment of the application, but the protection scope of the application is not limited thereto, it is any
Those familiar with the art within the technical scope of the present application, can easily think of the change or the replacement, and should all contain
Lid is within the scope of protection of this application.Therefore, the protection scope of the application shall be subject to the protection scope of the claim.
Claims (10)
1. a kind of pulse signal transmission circuit, which is characterized in that the pulse signal transmission circuit includes: transmitter, isolation electricity
Appearance, receiver and drop-down refresh switch device;
The output end of the transmitter is connect with one end of the isolation capacitance, the other end of the isolation capacitance and the reception
The input terminal of device connects;
One end of the drop-down refresh switch device is separate with the output end of the transmitter and the isolation capacitance respectively
One end of the receiver connects, the other end ground connection of the drop-down refresh switch device, the drop-down refresh switch device
Control terminal controls the conducting and shutdown of drop-down refresh switch device according to the duration of transmitter logic state and logic state.
2. pulse signal transmission circuit according to claim 1, which is characterized in that the drop-down refresh switch device is
Metal-oxide-semiconductor, the control terminal are the grid of metal-oxide-semiconductor, and the circuit further includes that drop-down refreshes driver, and the drop-down refreshes driver
Output end with it is described drop-down refresh switch device grid connect, it is described pull down refresh switch device drain electrode respectively with it is described
One end far from the receiver of the output end of transmitter and the isolation capacitance connects, the drop-down refresh switch device
Source electrode ground connection.
3. pulse signal transmission circuit according to claim 2, which is characterized in that it includes that the drop-down, which refreshes driver,
One drive terminal and asymmetric drop-down phase inverter, the asymmetric drop-down phase inverter include that the first control switch and the second control are opened
It closes, the grid of first control switch and the grid of the second control switch are connect with first drive terminal;
The source electrode of first control switch connects to power supply, and the drain electrode of first control switch and second control are opened
The drain electrode of pass is connect with the grid of the drop-down refresh switch device, the source electrode ground connection of second control switch.
4. pulse signal transmission circuit according to claim 3, which is characterized in that the electric conduction of first control switch
Resistance is greater than the conducting resistance of second control switch.
5. pulse signal transmission circuit according to claim 3, which is characterized in that the transmitter includes timer, more
A phase inverter and whole grade phase inverter, the input terminal of the timer are connect with input signal source, the output end of the timer
The logic state of logic state and the transmitter output of output carries out logical operation by first drive terminal;
The input signal source is successively connect through the multiple phase inverter with the input terminal of the whole grade phase inverter, and the end grade is anti-
The output end of phase device is connect with the isolation capacitance.
6. pulse signal transmission circuit according to claim 5, which is characterized in that the end grade phase inverter includes above pulling open
Close device and pull down switch device, the grid of the grid of the pull-up switch device and the device that pulls down switch with it is multiple
The output end of a phase inverter in phase inverter connects;
The source electrode of the pull-up switch device connects to power supply, the drain electrode of the pull-up switch device and the device that pulls down switch
The drain electrode of part is connect with one end of the isolation capacitance;
The source electrode of the device that pulls down switch is grounded.
7. pulse signal transmission circuit according to claim 1, which is characterized in that it further include pull-up refresh switch device,
One end of the pull-up refresh switch device is respectively with the output end of the transmitter and the isolation capacitance far from described
One end of receiver connects, and the other end of the pull-up refresh switch device connects to power supply, the pull-up refresh switch device
Control terminal according to the duration of transmitter logic state and logic state control pull-up refresh switch device conducting and pass
It is disconnected.
8. pulse signal transmission circuit according to claim 7, which is characterized in that the pull-up refresh switch device is
Metal-oxide-semiconductor, the control terminal are the grid of the metal-oxide-semiconductor, and the circuit further includes that pull-up refreshes driver, and the pull-up, which refreshes, drives
The output end of dynamic device is connect with the grid of the pull-up refresh switch device, the drain electrode for pulling up refresh switch device respectively with
One end far from the receiver of the output end of the transmitter and the isolation capacitance connects, the pull-up refresh switch
The source electrode of device is connect with the power supply.
9. pulse signal transmission circuit according to claim 8, which is characterized in that it includes that the pull-up, which refreshes driver,
Two drive terminals and asymmetric pull-up phase inverter, the asymmetric pull-up phase inverter include that third control switch and the 4th control are opened
It closes, the grid of the third control switch and the grid of the 4th control switch are connect with second drive terminal;
The source electrode of the third control switch connects to power supply, and the drain electrode of the third control switch and the 4th control are opened
The drain electrode of pass is connect with the grid of the pull-up refresh switch device, the source electrode ground connection of the 4th control switch.
10. a kind of refresh pulse signal circuit, which is characterized in that including the described in any item pulse letters of two claims 1 to 9
Number transmission circuit, two pulse signal transmission circuits can be denoted as the first pulse signal transmission circuit and the second pulse signal passes
Transmission of electricity road;
The output end of signal source connects with the input terminal of the input terminal of the first phase inverter and the second pulse signal transmission circuit respectively
It connects, the output end of first phase inverter is connect with the input terminal of the first pulse signal transmission circuit, first pulse
Signal circuit and the second same receiver of pulse signal transmission circuit connection.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811214673.1A CN109004927B (en) | 2018-10-18 | 2018-10-18 | Pulse signal transmission circuit and pulse signal refreshing circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811214673.1A CN109004927B (en) | 2018-10-18 | 2018-10-18 | Pulse signal transmission circuit and pulse signal refreshing circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
CN109004927A true CN109004927A (en) | 2018-12-14 |
CN109004927B CN109004927B (en) | 2024-01-12 |
Family
ID=64590071
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811214673.1A Active CN109004927B (en) | 2018-10-18 | 2018-10-18 | Pulse signal transmission circuit and pulse signal refreshing circuit |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109004927B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110266303A (en) * | 2019-07-17 | 2019-09-20 | 重庆线易电子科技有限责任公司 | Refresh circuit, method, chip and data transmission system |
CN112290931A (en) * | 2020-12-07 | 2021-01-29 | 南京元络芯科技有限公司 | Compound semiconductor-based logic control circuit |
CN113422600A (en) * | 2021-08-23 | 2021-09-21 | 南京志杰通信技术有限公司 | Analysis method suitable for digital isolator |
Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1474575A (en) * | 2002-08-06 | 2004-02-11 | 华为技术有限公司 | Subscriber line interface method and circuit of program control exchange board |
US20070229138A1 (en) * | 2006-03-31 | 2007-10-04 | International Business Machines Corporation | Apparatus for improved delay voltage level shifting for large voltage differentials |
CN101359904A (en) * | 2008-07-25 | 2009-02-04 | 北京航空航天大学 | Multipath insulated resetting circuit preventing constant reset |
CN201528322U (en) * | 2009-09-25 | 2010-07-14 | 安徽华东光电技术研究所 | Full solid wide pulse floating-deck modulator |
US20150015556A1 (en) * | 2013-07-09 | 2015-01-15 | Pixtronix, Inc. | All n-type transistor inverter circuit |
CN105569859A (en) * | 2015-12-14 | 2016-05-11 | 中国北方发动机研究所(天津) | High-speed electromagnetic valve drive method with boosting and fault diagnosing functions and circuit |
CN106412686A (en) * | 2016-09-26 | 2017-02-15 | 龙迅半导体(合肥)股份有限公司 | Data transmission method and single-networkcable extender for HDMI (High Definition Multimedia Interface) signals |
CN106411136A (en) * | 2016-08-25 | 2017-02-15 | 浙江大学 | High-voltage capacitance coupling based control chip of isolated type power converter |
CN106961272A (en) * | 2016-01-11 | 2017-07-18 | 德克萨斯仪器股份有限公司 | The common mode transient state vulnerability to jamming circuit emulated for optoisolator |
CN206674236U (en) * | 2017-03-02 | 2017-11-24 | 上海灿瑞科技股份有限公司 | A kind of LED drive chip and circuit improved to controllable silicon dimmer compatibility |
CN108563279A (en) * | 2018-07-11 | 2018-09-21 | 重庆线易电子科技有限责任公司 | Filter circuit of pressure-stabilizing and signal deteching circuit |
CN209001927U (en) * | 2018-10-18 | 2019-06-18 | 重庆线易电子科技有限责任公司 | Pulse signal transmission circuit and refresh pulse signal circuit |
-
2018
- 2018-10-18 CN CN201811214673.1A patent/CN109004927B/en active Active
Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1474575A (en) * | 2002-08-06 | 2004-02-11 | 华为技术有限公司 | Subscriber line interface method and circuit of program control exchange board |
US20070229138A1 (en) * | 2006-03-31 | 2007-10-04 | International Business Machines Corporation | Apparatus for improved delay voltage level shifting for large voltage differentials |
CN101359904A (en) * | 2008-07-25 | 2009-02-04 | 北京航空航天大学 | Multipath insulated resetting circuit preventing constant reset |
CN201528322U (en) * | 2009-09-25 | 2010-07-14 | 安徽华东光电技术研究所 | Full solid wide pulse floating-deck modulator |
US20150015556A1 (en) * | 2013-07-09 | 2015-01-15 | Pixtronix, Inc. | All n-type transistor inverter circuit |
CN105569859A (en) * | 2015-12-14 | 2016-05-11 | 中国北方发动机研究所(天津) | High-speed electromagnetic valve drive method with boosting and fault diagnosing functions and circuit |
CN106961272A (en) * | 2016-01-11 | 2017-07-18 | 德克萨斯仪器股份有限公司 | The common mode transient state vulnerability to jamming circuit emulated for optoisolator |
CN106411136A (en) * | 2016-08-25 | 2017-02-15 | 浙江大学 | High-voltage capacitance coupling based control chip of isolated type power converter |
CN106412686A (en) * | 2016-09-26 | 2017-02-15 | 龙迅半导体(合肥)股份有限公司 | Data transmission method and single-networkcable extender for HDMI (High Definition Multimedia Interface) signals |
CN206674236U (en) * | 2017-03-02 | 2017-11-24 | 上海灿瑞科技股份有限公司 | A kind of LED drive chip and circuit improved to controllable silicon dimmer compatibility |
CN108563279A (en) * | 2018-07-11 | 2018-09-21 | 重庆线易电子科技有限责任公司 | Filter circuit of pressure-stabilizing and signal deteching circuit |
CN209001927U (en) * | 2018-10-18 | 2019-06-18 | 重庆线易电子科技有限责任公司 | Pulse signal transmission circuit and refresh pulse signal circuit |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110266303A (en) * | 2019-07-17 | 2019-09-20 | 重庆线易电子科技有限责任公司 | Refresh circuit, method, chip and data transmission system |
CN110266303B (en) * | 2019-07-17 | 2023-04-28 | 重庆线易电子科技有限责任公司 | Refreshing circuit, refreshing method, chip and data transmission system |
CN112290931A (en) * | 2020-12-07 | 2021-01-29 | 南京元络芯科技有限公司 | Compound semiconductor-based logic control circuit |
CN113422600A (en) * | 2021-08-23 | 2021-09-21 | 南京志杰通信技术有限公司 | Analysis method suitable for digital isolator |
Also Published As
Publication number | Publication date |
---|---|
CN109004927B (en) | 2024-01-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9437152B2 (en) | Scan driving circuit | |
CN109004927A (en) | Pulse signal transmission circuit and refresh pulse signal circuit | |
CN103928009B (en) | Grid electrode driver for narrow frame liquid crystal display | |
CN104409058B (en) | Scanning drive circuit | |
CN106023919B (en) | Shift register and its driving method, driving circuit and display device | |
CN106951123B (en) | Touch-control driving unit and its driving method, touch drive circuit, display device | |
CN104835442B (en) | Shift register and its driving method, gate driving circuit and display device | |
CN104157259B (en) | Gate driver circuit based on IGZO processing procedure | |
CN105609136A (en) | Shifting register unit, drive method, grid drive circuit and display device | |
CN104157260A (en) | Grid electrode driving circuit on basis of IGZO preparation process | |
CN104575436A (en) | Shifting register unit, grid driving circuit and display device | |
CN106157867A (en) | Shift register cell, driving method, gate driver circuit and display device | |
CN104835475A (en) | Shift register unit and driving method thereof, grid electrode drive circuit and display device | |
CN103985341A (en) | Shift register unit, grid driving circuit and display device | |
CN209001927U (en) | Pulse signal transmission circuit and refresh pulse signal circuit | |
CN104104362B (en) | High-amplitude picosecond balance pulse signal generator | |
CN104599620A (en) | Inverter of grid integrated driving circuit, grid integrated driver and driving method | |
CN202838909U (en) | Shifting register, grid driving circuit and display device | |
CN104038219B (en) | For reducing the unmatched apparatus and method of sample circuit sequential | |
CN105185342A (en) | Grid drive substrate and liquid crystal display employing same | |
CN103745696A (en) | Gate drive circuit | |
CN108062935A (en) | A kind of gate driving circuit and display device | |
CN106782281A (en) | Shift register circuit | |
CN106448538A (en) | Grid driving unit, grid driving circuit, driving method of grid driving circuit and display device | |
WO2016115797A1 (en) | Touch control circuit, touch control panel and display apparatus |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
TA01 | Transfer of patent application right | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20231218 Address after: Room 803, Building D, Jinxiu Phase III, No. 85 Hudipi, Songxuan Community, Guanhu Street, Longhua District, Shenzhen City, Guangdong Province, 518110 Applicant after: Shenzhen Line Easy Microelectronics Co.,Ltd. Address before: 401120 data of Xiantao street, Yubei District, Chongqing 19 Applicant before: CHONGQING XIANYI ELECTRONIC TECHNOLOGY Co.,Ltd. |
|
GR01 | Patent grant | ||
GR01 | Patent grant |