CN108964434B - Power-down delay protection circuit for switching power supply - Google Patents

Power-down delay protection circuit for switching power supply Download PDF

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CN108964434B
CN108964434B CN201810981467.7A CN201810981467A CN108964434B CN 108964434 B CN108964434 B CN 108964434B CN 201810981467 A CN201810981467 A CN 201810981467A CN 108964434 B CN108964434 B CN 108964434B
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power supply
circuit
mos
sub
switch
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CN108964434A (en
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张斌
王新兵
曹海江
郭鑫
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Beijing Machinery Equipment Research Institute
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Beijing Machinery Equipment Research Institute
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/32Means for protecting converters other than automatic disconnection
    • H02M1/34Snubber circuits

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  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
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Abstract

The invention relates to a power-down delay protection circuit for a switching power supply, belongs to the technical field of switching power supplies, and solves the problems that the power-down delay protection circuit in the prior art is insufficient in discharge depth and uncontrollable in power supply under multiple loads. The power-down delay protection circuit comprises an MOS switch sub-circuit, a delay protection sub-circuit and an MOS power-down protection sub-circuit, wherein the MOS switch sub-circuit and the MOS power-down protection sub-circuit adopt metal oxide semiconductor field effect transistors to replace diodes in the prior art for energy transmission, so that the problem of insufficient effective discharge time of a capacitor caused by large voltage drop of the existing diodes is solved; meanwhile, the metal oxide semiconductor field effect transistor has a controllable on-off function, so that the problem that a power supply object cannot be controlled due to the fact that a capacitor supplies power to other equipment connected with an input power supply after the input power supply is powered off in the prior art is solved.

Description

Power-down delay protection circuit for switching power supply
Technical Field
The invention relates to the technical field of switching power supplies, in particular to a power-down delay protection circuit for a switching power supply.
Background
The existing switching power supply control circuit generally relates to a power failure delay protection circuit, and has the main function that after an input power supply fails, the switching power supply control circuit can be additionally powered for a period of time in a delay mode, and the switching power supply control circuit can record the operating state information of the switching power supply before the power failure.
The existing power-down delay protection circuit is mainly divided into two types. One is mainly composed of a capacitor and a diode, which is common, but has the following disadvantages: 1) when the capacitor is charged, the magnitude of the charging current cannot be controlled, and the input power supply is easily impacted greatly and even burnt out; 2) after the input power supply is powered down, the capacitor discharges through the diode, and certain voltage drop can be generated due to the fact that discharge current passes through the diode, so that the discharge depth of the capacitor is reduced, and the time delay power supply time of the power-down time delay protection circuit can be shortened. The other circuit mainly comprises a capacitor, a current-limiting resistor and a diode, overcomes the defects of the first circuit through the current-limiting resistor, ensures that the power failure delay protection circuit cannot cause impact on an input power supply, and still has the serious problems of insufficient capacitor discharge depth, uncontrollable power supply objects in multi-load and the like.
Disclosure of Invention
In view of the foregoing analysis, an embodiment of the present invention is directed to provide a power-down delay protection circuit for a switching power supply, so as to solve the problems in the prior art that the power-down delay protection circuit has insufficient discharge depth and is uncontrollable in power supply when multiple loads are applied.
On one hand, the embodiment of the invention provides a power-down delay protection circuit for a switching power supply, which comprises an MOS (metal oxide semiconductor) switching sub-circuit, a delay protection sub-circuit and an MOS power-down protection sub-circuit; the input end of the MOS switch sub-circuit is connected with the output end of an input power supply, one path of the output end of the MOS switch sub-circuit is connected with the positive electrode of the power supply end of the switch power supply control circuit, and the other path of the output end of the MOS switch sub-circuit is connected with the negative electrode of the power supply end of the switch power supply control circuit through the delay protection sub-circuit and the MOS power-down protection sub-circuit; the charging and discharging end of the MOS power-down protection sub-circuit is connected with the output end of the MOS switch sub-circuit;
when the input power supply normally supplies power, the MOS switch sub-circuit is conducted, the delay protection sub-circuit works, and the MOS power-down protection sub-circuit is charged;
when the input power supply is powered off, the MOS switch sub-circuit is switched off, the time delay protection sub-circuit works, and the MOS power-off protection sub-circuit discharges.
The beneficial effects of the above technical scheme are as follows: the MOS power-down protection sub-circuit does not comprise a diode and can be replaced by a metal oxide semiconductor field effect transistor, the performance of the MOS power-down protection sub-circuit is more suitable for the invention, and the problem of insufficient effective time of capacitor discharge caused by the adoption of the diode in the prior art is solved; meanwhile, the introduced MOS switch sub-circuit has a controllable on-off function, so that the problem that after the input power supply is powered off in the prior art, the power supply object cannot be controlled because the capacitor supplies power to other electric equipment connected with the input power supply is solved.
In another embodiment based on the above method, the MOS switch sub-circuit includes a one-way conductor, a driver 1, and a MOS switch 1;
the anode of the unidirectional breakover device is connected with the output end of the input power supply and is connected with the grid of the MOS switch 1 through the driver 1, one path of the cathode of the unidirectional breakover device is directly connected with the positive pole of the power supply end of the switch power supply control circuit, and the other path of the cathode of the unidirectional breakover device is connected with the negative pole of the power supply end of the switch power supply control circuit through the time delay protection sub-circuit and the MOS power-down protection sub-circuit; the source electrode of the MOS switch 1 is grounded or connected with a negative power supply, and the drain electrode of the MOS switch is connected with the input reference ground end of the time delay protection sub-circuit.
The beneficial effects of the above technical scheme are: the driver 1 is used for driving the MOS switch 1 to normally operate. The driver 1 may take many forms, such as the form of a commonly used power supply and resistor (power supply + resistor), or power supply + driver chip + resistor. The MOS switch 1 is used for the MOS switch sub-circuit, so that the input power supply and the following MOS power-down protection sub-circuit can be isolated and controlled, when the input power supply is powered down, the capacitor in the MOS power-down protection sub-circuit can not supply power for other power objects connected with the input power supply any more, and only supplies power for the switch power supply control circuit alone, so that the power supply process is controllable.
Further, the delay protection sub-circuit comprises a delay device and a driver 2; the delay device is connected with the driver in series;
the delay device is used for limiting the charging and discharging speed of the MOS power-down protection circuit and prolonging the power supply time of the input power supply;
and the driver 2 is used for driving the MOS power-down protection sub-circuit to charge and discharge.
The beneficial effects of the further scheme are as follows: the driver 2 is used for driving an MOS switch (namely the MOS switch 2) in the MOS power-down protection sub-circuit to normally work, the delay device is used for ensuring that the voltage of a control end (grid) of the MOS switch slowly rises to a linear region and a saturation region when being charged and finally reaches conduction, slowly falls from the saturation region to the linear region when being discharged and finally reaches a cut-off region, and then the discharge is stopped, namely the charging and discharging speed of the MOS power-down protection circuit is limited, and the power supply time of an input power supply is prolonged.
Further, the MOS power-down protection sub-circuit comprises a rechargeable energy storage, an MOS switch 2 and a current limiter;
the grid of the MOS switch 2 is connected with the output end of the driver 2, the source and the drain are connected through the current limiter, the source is connected with the cathode of the unidirectional conductor and the anode of the power supply end of the switch power supply control circuit through the rechargeable energy storage, and the drain is connected with the cathode of the power supply end of the switch power supply control circuit.
The beneficial effects of the further scheme are as follows: the rechargeable energy storage is used for charging when the input power supply works normally, and discharging after the input power supply is powered off and powered off to prolong the time of supplying power to the switching power supply control circuit. And the MOS switch 2 is used for controlling the charging and discharging state of the rechargeable energy accumulator. And the current limiter is used for limiting the current magnitude passing through the rechargeable energy storage.
Further, the one-way conductor adopts a diode D1The driver adopts a resistor R1And an input power supply, the MOS switch adopts a field effect transistor Q1
Said D1Is connected with the positive pole of the input power supply and passes through a resistor R1And field effect transistor Q1Of the gate electrode, D1The cathode of the switch power supply control circuit is connected with the anode of the power supply end of the switch power supply control circuit and is connected with the cathode of the power supply end of the switch power supply control circuit through the delay protection sub-circuit and the MOS power-down protection sub-circuit; the field effect transistor Q1The source of the delay protection sub-circuit is connected with the negative electrode of the input power supply, and the drain of the delay protection sub-circuit is connected with the input reference ground end of the delay protection sub-circuit.
The beneficial effects of the further scheme are as follows: compared with the right 2, the circuit is simplified by the further scheme, and corresponding functions can be realized by only adopting 3 components. Diode D1When the input power supply works normally, the rechargeable energy storage device is conducted in a single direction to supply power to the rear-stage circuit, and is cut off in a reverse direction after the input power supply is powered off and power is lost, so that the rechargeable energy storage device is prevented from discharging other electric equipment connected with the input power supply. The MOS switch 1 is in a conducting state when the input power supply normally works, and is in a closing state after the input power supply is powered off and powered off. Resistance R1For limiting MOS turn-onOff 1 gate drive current magnitude.
Further, the delay protection sub-circuit comprises a resistor R2Capacitor C2
The resistor R2And the diode D1And the resistor R is connected with the MOS power-down protection sub-circuit charge-discharge end and the power supply end anode of the switching power supply control circuit, and the resistor R2Is connected with the gate of the MOS switch 2 via a capacitor C2And the negative electrode of the power supply end of the switching power supply control circuit, the drain electrode of the MOS switch 1 and the drain electrode of the MOS switch 2 are connected.
The beneficial effects of the further scheme are as follows: compared with the right 3, the further scheme simplifies the circuit, and the functions of the driver 2 and the delay device can be realized by only adopting 2 components. In particular, the resistance R2The driver 2 is equivalent to a MOS switch (namely the MOS switch 2) in the driving MOS power-down protection sub-circuit to normally work. And a resistance R2Capacitor C2The combination of the MOS power-down protection sub-circuit is equivalent to a time delay device, the charging and discharging speed of the MOS power-down protection sub-circuit is limited, and the power supply time of the switch power supply control circuit is prolonged.
Further, the chargeable energy accumulator adopts a capacitor C1The MOS switch 2 adopts a MOS field effect transistor Q2The current limiter adopts a resistor R3
The capacitor C1Comprises an anode and a cathode, the anode and the resistor R2One end of the diode D1Is connected with the cathode of the MOS field effect transistor Q2Is connected to the source of (a); the MOS field effect transistor Q2Between the source and the drain of the transistor via a resistor R3Connection of said MOS FET Q2The drain electrode of the switching power supply control circuit is also connected with the negative electrode of the power supply end of the switching power supply control circuit and is connected with a field effect tube Q1Is connected to the drain of (1).
The beneficial effects of the further scheme are as follows: compared with the right 4, the further scheme simplifies the circuit, and the functions of the rechargeable energy storage, the MOS switch 2 and the current limiter can be realized by only adopting 3 components. In particular, the capacitance C1Is equivalent toIn rechargeable energy storage, MOS field effect transistor Q2Corresponding to MOS switch 2, resistor R3Corresponding to a flow restrictor. C1Storing energy when the input power supply works normally, discharging after the input power supply is powered off and power-down, and supplying power for the control circuit; q2When the input power supply works normally, at C1In the charging process, R is matched3Limitation C1Charging current is C after the input power supply is powered off or power down1The discharge current provides a low resistance path; resistance R3Main limit C1The charging current.
Further, the MOS field effect transistor 1 and the MOS field effect transistor 2 adopt metal oxide semiconductor field effect transistors;
the capacitor C1A super capacitor is used.
The beneficial effects of the further scheme are as follows: c1By using the super capacitor, a large amount of energy can be stored, and long-time discharge is ensured.
Further, a resistance R1、R2、R3Is a variable resistor.
The beneficial effects of the further scheme are as follows: the power-down delay protection circuit can be adjusted to the optimal working state by adjusting through the variable resistor.
Further, a capacitor C1Satisfies the following conditions
Figure BDA0001778634750000061
In the formula of UinFor the amplitude of the input power, R3Is a resistance R3The resistance value of (c).
The beneficial effects of the further scheme are as follows: through a resistance R3Can be applied to the capacitor C1The charging and discharging current of (2) is limited.
In the invention, the technical schemes can be combined with each other to realize more preferable combination schemes. Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, wherein like reference numerals are used to designate like parts throughout.
Fig. 1 is a schematic connection diagram of a power-down delay protection circuit in embodiment 1 of the present invention;
fig. 2 is a schematic diagram of a MOS switch sub-circuit connection according to embodiment 2 of the present invention;
fig. 3 is a schematic diagram of a connection of a delay protection sub-circuit according to embodiment 2 of the present invention;
fig. 4 is a schematic diagram of a MOS power-down protection sub-circuit connection according to embodiment 2 of the present invention;
fig. 5 is a schematic connection diagram of a power-down delay protection circuit in embodiment 3 of the present invention.
Detailed Description
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate preferred embodiments of the invention and together with the description, serve to explain the principles of the invention and not to limit the scope of the invention.
Example 1
As shown in fig. 1, a power-down delay protection circuit for a switching power supply is disclosed in an embodiment of the present invention. The power-down delay protection circuit comprises an MOS switch sub-circuit, a delay protection sub-circuit and an MOS power-down protection sub-circuit. The input end of the MOS switch sub-circuit is connected with the output end of the input power supply, one path of the output end of the MOS switch sub-circuit is directly connected with the positive electrode of the power supply end of the switch power supply control circuit, and the other path of the output end of the MOS switch sub-circuit is connected with the negative electrode of the power supply end of the switch power supply control circuit through the delay protection sub-circuit and the MOS power-down protection sub-circuit.
When the input power supply is normally powered, the MOS switch sub-circuit is switched on, the time delay protection sub-circuit normally works, one path of an electric signal output by the input power supply is used for charging a rechargeable energy storage device in the MOS power-down protection sub-circuit, and the other path of the electric signal is used for supplying power to the switch power supply control circuit.
When the input power supply is abnormally powered off or power-off, the MOS switch sub-circuit is disconnected, the time delay protection sub-circuit works, and the MOS power-off protection sub-circuit discharges.
Compared with the prior art, the MOS power-down protection sub-circuit in the power-down delay protection circuit does not comprise a diode and is replaced by a metal oxide semiconductor field effect transistor, so that the problem of insufficient effective time of capacitor discharge caused by the adoption of the diode in the prior art is solved; meanwhile, the MOS switch sub-circuit has a controllable on-off function, so that the problem that after the input power supply is powered off in the prior art, the power supply object cannot be controlled because the capacitor supplies power to other equipment connected with the input power supply is solved. Namely, the input power supply singly supplies power to the switch power supply control circuit through the power-down delay protection circuit provided by the embodiment.
Example 2
The improvement is carried out on the basis of the embodiment 1, and the MOS switch sub-circuit comprises a one-way conductor, a driver 1 and a MOS switch 1. The anode of the unidirectional conducting device is connected with the output end of the input power supply and is connected with the grid of the MOS switch 1 through the driver 1, one path of the cathode of the unidirectional conducting device is directly connected with the anode of the power supply end of the switch power supply control circuit, and the other path of the cathode of the unidirectional conducting device is connected with the cathode of the power supply end of the switch power supply control circuit through the time delay protection sub-circuit and the MOS power-down protection sub-circuit. The source electrode of the MOS switch 1 is grounded or connected with a negative power supply, and the drain electrode of the MOS switch is connected with the input reference ground end of the time delay protection sub-circuit.
Specifically, the unidirectional conductor is used for conducting the electric signal output by the input power supply in a unidirectional way. And the driver 1 is used for driving the MOS switch to normally work and limiting the current passing through the grid. The driver 1 may also adopt a power supply, a driving chip and a resistor (power supply + driving chip + resistor) in addition to the form of the power supply and the resistor (power supply + resistor) adopted in this embodiment, and the commonly used driving chip includes the IXDN609SI, which can be understood by those skilled in the art and will not be described again. Field effect transistor Q1And the switch delay protection circuit is used for switching on and off the delay protection circuit according to whether the input voltage is normally supplied.
Preferably, the delay protection sub-circuit comprises a delay device, the driver 2. The delay device and the driver 2 may be connected in series or in another connection.
Specifically, the delay device is used for carrying out delay power supply on the switch power supply control circuit when the input power supply is powered off, and is short-circuited or electrified as low resistance when the input power supply works normally; the delay device can adopt a commonly used RC delay circuit at present, and can also adopt other delay devices, and the skilled person can understand. And the driver is used for driving the MOS power-down protection sub-circuit to charge and discharge. The driver 2 may also adopt a form of power supply + driver chip + resistor, in addition to the form of power supply + resistor adopted in the present embodiment.
Preferably, the MOS power-down protection sub-circuit comprises a rechargeable energy storage, a MOS switch 2 and a current limiter. The grid of the MOS switch 2 is connected with the output end of the driver 2, the source electrode and the drain electrode are connected through a current limiter, the source electrode is connected with the cathode of the unidirectional conductor through a rechargeable energy storage device and is connected with the power supply end of the switch power supply control circuit, and the drain electrode is grounded or connected with a negative power supply. One end of the current limiter is connected with the chargeable energy accumulator and the source electrode of the MOS switch 2, and the other end is connected with the negative electrode of the power supply end of the switch power supply control circuit and the drain electrode of the MOS switch 2.
The rechargeable energy storage is used for storing electric energy when an input power supply normally works and continuously supplying power to the switch power supply control circuit for a period of time when the input power supply is powered off; the MOS switch 2 is used for controlling the charging and discharging of the rechargeable energy storage; and the current limiter is used for limiting the magnitude of the current flowing through the rechargeable energy storage. Besides the current limiting resistor of the present embodiment, other current limiting circuits for limiting current may be used as well, and those skilled in the art will understand that.
When the input power supply is normally powered, the MOS switch sub-circuit is switched on, the delay protection sub-circuit works, the MOS power-down protection sub-circuit is charged, one path of an electric signal output by the input power supply is used for charging a rechargeable energy storage device in the MOS power-down protection sub-circuit, and the other path of the electric signal is used for supplying power to the switch power supply control circuit.
When the input power supply is powered off, the MOS switch sub-circuit is switched off, the delay protection sub-circuit works, and the MOS power-off protection sub-circuit discharges electricity to prolong the power supply time of the switch power supply control circuit.
Compared with the prior art, the MOS switch is adopted to replace a diode, and the problem that the effective discharge time of a capacitor is insufficient due to large voltage drop of the diode is solved. Meanwhile, the MOS switch has a controllable on-off function, and after the input power supply is powered off, the rechargeable energy storage cannot supply power to other equipment connected with the input power supply, so that the power supply object is controllable.
Example 3
Based on the two embodiments, the power-down delay protection circuit for the switching power supply can adopt a circuit form as shown in fig. 5.
Preferably, the one-way conductor adopts a diode D1The driver adopts a resistor R1The MOS switch adopts a field effect transistor Q1. The manufacturing cost and the later replacement cost of the three are obviously lower, and the circuit is easier to build. Diode D1Is connected with the positive pole of the input power supply and passes through a resistor R1And field effect transistor Q1Of the gate electrode, D1The cathode of the switch power supply control circuit is connected with the anode of the power supply end of the switch power supply control circuit and is connected with the cathode of the power supply end of the switch power supply control circuit through the delay protection sub-circuit and the MOS power-down protection sub-circuit. Field effect transistor Q1The source of the delay protection sub-circuit is connected with the negative electrode of the input power supply, or can be directly grounded, and the drain of the delay protection sub-circuit is connected with the input reference ground end of the delay protection sub-circuit.
Wherein, the diode D1And the power supply is used for realizing the unidirectional conduction of the electric signal output by the input power supply. Resistance R1For driving field effect transistors Q1And limiting the current through the gate. Field effect transistor Q1And is used for controlling the working state of the delay protection sub-circuit according to whether the input voltage is normally supplied, which will be described in detail later.
Preferably, the delay protection sub-circuit comprises a resistor R2Capacitor C2. Wherein, the resistance R2As a driver, driving the field effect transistor Q2And (4) working normally. Resistance R2Electricity, electricityContainer C2Jointly form an RC delay sub-circuit, and a resistor R is adopted2Meanwhile, the circuit is used as a driver and an RC delay circuit, so that the number of circuit components is reduced, circuit maintenance in the later period is simpler, the overall cost is lower, and the maintenance and replacement cost is also low. The time delay protection sub-circuit is used for ensuring the field effect transistor Q2The gate voltage of the gate electrode slowly rises to a linear region and a saturation region, so that the gate electrode is turned on or turned off in a reverse direction.
Preferably, the MOS power-down protection sub-circuit comprises a resistor R3Capacitor C1MOS field effect transistor Q2. Wherein, the resistance R3As current-limiting resistor, capacitor C1As a rechargeable energy storage, a MOS field effect transistor Q2As a MOS switch.
In particular, the capacitance C1Comprises an anode and a cathode, wherein one path of the anode is connected with the resistor R2Is connected with the other end of the diode D1, and the cathode is connected with a MOS field effect transistor Q2Is connected to the source of (a). MOS field effect transistor Q2Source electrode of (1) through resistor R3Connected with the drain electrode thereof; MOS field effect transistor Q2The drain electrode of the switching power supply control circuit is also connected with the negative power supply end of the switching power supply control circuit and is connected with a field effect tube Q1Is connected to the drain of (1).
Preferably, the field effect transistor is a metal oxide semiconductor field effect transistor. The switch has the advantages of small on-resistance, stable temperature coefficient, low leakage current, short switching time and the like.
Preferably, the resistance R1、R2、R3Is a variable resistor. The power-down delay protection circuit can be adjusted to the optimal working state by adjusting through the variable resistor.
In practice, at the input power UinAfter the normal operation is started, the metal oxide semiconductor field effect transistor Q1The voltage of the grid electrode to the source electrode is the input power voltage UinMetal oxide semiconductor field effect transistor Q1Fully on, input power UinThrough diode D1Supplying power to the control circuit of the switching power supply and passing through a resistor R2Is electricityContainer C2And (6) charging. When the capacitance C2Of, i.e. metal oxide semiconductor field effect transistors Q2When the voltage of the grid electrode to the source electrode is less than the grid electrode starting voltage, the power supply U is inputinTo pass through a resistor R3Is a capacitor C1Charging, resistance R3Limiting the charging current not exceeding U at mostin/R3. When the capacitance C2Voltage, i.e. MOSFETs Q2The gate-to-source voltage is equal to the input supply voltage UinTime, metal oxide semiconductor field effect transistor Q2Fully conducting, capacitor C1After charging, the capacitor C1Voltage equal to input power voltage Uin
At the input power UinMOSFET Q in case of operating failure, i.e. power failure of input power supply1Has a gate to source voltage of 0, and a metal oxide semiconductor field effect transistor Q1Turn off to avoid the capacitor C1For inputting power UinOther connected electric equipment supplies power. Due to the capacitance C1The voltage at both ends still exists, so that the metal oxide semiconductor field effect transistor Q2Continuously maintain the on state, the capacitor C1By means of a metal oxide semiconductor field effect transistor Q2The power supply is supplied to the switch power supply control circuit, and the on-resistance of the metal oxide semiconductor field effect transistor is very small, so the generated voltage drop is far smaller than that of a diode, and the capacitance C is prolonged1The effective discharge time of (a). In the capacitor C1Discharging voltage to MOSFET Q2When the grid is on, the metal oxide semiconductor field effect transistor Q2Off, capacitance C1And finishing the discharging.
Compared with the embodiments 1 and 2, the circuit provided by the embodiment has the advantages of similar functions, simpler structure, fewer components, lower manufacturing cost and lower later maintenance cost.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.

Claims (5)

1. A power-down delay protection circuit for a switching power supply is characterized by comprising an MOS (metal oxide semiconductor) switching sub-circuit, a delay protection sub-circuit and an MOS power-down protection sub-circuit; the input end of the MOS switch sub-circuit is connected with the output end of an input power supply, one path of the output end of the MOS switch sub-circuit is connected with the positive electrode of the power supply end of the switch power supply control circuit, and the other path of the output end of the MOS switch sub-circuit is connected with the negative electrode of the power supply end of the switch power supply control circuit through the delay protection sub-circuit and the MOS power-down protection sub-circuit; the charging and discharging end of the MOS power-down protection sub-circuit is connected with the output end of the MOS switch sub-circuit;
when the input power supply normally supplies power, the MOS switch sub-circuit is conducted, the delay protection sub-circuit works, and the MOS power-down protection sub-circuit is charged;
when the input power supply is powered off, the MOS switch sub-circuit is switched off, the delay protection sub-circuit works, and the MOS power-off protection sub-circuit discharges;
the MOS switch sub-circuit comprises a one-way conductor, a driver 1 and an MOS switch 1;
the anode of the unidirectional breakover device is connected with the output end of the input power supply and is connected with the grid of the MOS switch 1 through the driver 1, one path of the cathode of the unidirectional breakover device is directly connected with the positive pole of the power supply end of the switch power supply control circuit, and the other path of the cathode of the unidirectional breakover device is connected with the negative pole of the power supply end of the switch power supply control circuit through the time delay protection sub-circuit and the MOS power-down protection sub-circuit; the source electrode of the MOS switch 1 is grounded or connected with a negative power supply, and the drain electrode of the MOS switch is connected with the input reference ground end of the delay protection sub-circuit; the driver 1 is used for driving the MOS switch 1 to work and limiting the current passing through the grid;
the delay protection sub-circuit comprises a delay device and a driver 2; the delay device is connected with the driver 2 in series;
the delay device is used for limiting the charging and discharging speed of the MOS power-down protection circuit and prolonging the power supply time of the input power supply;
the driver 2 is used for driving the MOS power-down protection sub-circuit to charge and discharge;
the MOS power-down protection sub-circuit comprises a rechargeable energy storage, an MOS switch 2 and a current limiter;
the grid electrode of the MOS switch 2 is connected with the output end of the driver 2, the source electrode and the drain electrode of the MOS switch are connected through the current limiter, the source electrode of the MOS switch is connected with the cathode of the unidirectional conductor and the anode of the power supply end of the switch power supply control circuit through the rechargeable energy storage device, and the drain electrode of the MOS switch is connected with the cathode of the power supply end of the switch power supply control circuit;
the chargeable energy accumulator adopts a capacitor C1The MOS switch 2 adopts a MOS field effect transistor Q2The current limiter adopts a resistor R3
The time delay device adopts a capacitor C2The driver 2 adopts a resistor R2
The resistor R2One end of the resistor R is connected with the cathode of the one-way conductor, and is connected with the charging and discharging end of the MOS power-down protection sub-circuit and the anode of the power supply end of the switching power supply control circuit, and the resistor R2Is connected with the gate of the MOS switch 2 via a capacitor C2The power supply end cathode of the switching power supply control circuit, the drain electrode of the MOS switch 1 and the drain electrode of the MOS switch 2 are connected;
the capacitor C1Comprises a positive electrode, a negative electrode, a resistor R2One end of the one-way conductor is connected with the cathode of the one-way conductor, and the cathode is connected with the MOS field effect transistor Q2Is connected to the source of (a); the MOS field effect transistor Q2Between the source and the drain of the transistor via a resistor R3Connection of said MOS FET Q2The drain electrode of the switching power supply control circuit is also connected with the negative electrode of the power supply end of the switching power supply control circuit.
2. The power-down delay protection circuit for the switching power supply as claimed in claim 1, wherein the one-way conductor adopts a diode D1The driver 1 adopts a resistor R1And an input power supply, the MOS switch 1 adopts a field effect transistor Q1
Said D1Is connected with the positive pole of the input power supply and passes through a resistor R1And field effect transistor Q1Of the gate electrode, D1The cathode of the switch power supply control circuit is connected with the anode of the power supply end of the switch power supply control circuit and is connected with the cathode of the power supply end of the switch power supply control circuit through the delay protection sub-circuit and the MOS power-down protection sub-circuit; the field effect transistor Q1The source of the delay protection sub-circuit is connected with the negative electrode of the input power supply, and the drain of the delay protection sub-circuit is connected with the input reference ground end of the delay protection sub-circuit.
3. The power-down delay protection circuit for the switching power supply according to claim 2, wherein the MOS field effect transistor 1 and the MOS field effect transistor 2 are metal oxide semiconductor field effect transistors;
the capacitor C1A super capacitor is used.
4. Power-down delay protection circuit for switching power supply according to claim 2 or 3, wherein the resistor R1、R2、R3Is a variable resistor.
5. The power-down delay protection circuit for switching power supply according to claim 3, wherein the capacitor C1Satisfies the following conditions
Figure FDA0002450835110000031
In the formula of UinFor the amplitude of the input power, R3Is a resistance R3The resistance value of (c).
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