CN108962878A - Electronic package and manufacturing method thereof - Google Patents
Electronic package and manufacturing method thereof Download PDFInfo
- Publication number
- CN108962878A CN108962878A CN201710377667.7A CN201710377667A CN108962878A CN 108962878 A CN108962878 A CN 108962878A CN 201710377667 A CN201710377667 A CN 201710377667A CN 108962878 A CN108962878 A CN 108962878A
- Authority
- CN
- China
- Prior art keywords
- encapsulated layer
- packing piece
- electronic
- layer
- piece according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title abstract description 9
- 238000012856 packing Methods 0.000 claims description 40
- 239000011469 building brick Substances 0.000 claims description 37
- 238000002360 preparation method Methods 0.000 claims description 21
- 238000010276 construction Methods 0.000 claims description 20
- 239000004020 conductor Substances 0.000 claims description 18
- 230000000694 effects Effects 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims 1
- 239000007787 solid Substances 0.000 claims 1
- 230000008054 signal transmission Effects 0.000 abstract description 2
- 238000004806 packaging method and process Methods 0.000 abstract 3
- 239000010410 layer Substances 0.000 description 92
- 239000004065 semiconductor Substances 0.000 description 12
- 238000000034 method Methods 0.000 description 8
- 239000002184 metal Substances 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 7
- 239000000758 substrate Substances 0.000 description 7
- 239000004642 Polyimide Substances 0.000 description 6
- 238000005538 encapsulation Methods 0.000 description 6
- 238000005516 engineering process Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 229920001721 polyimide Polymers 0.000 description 6
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 5
- 230000008859 change Effects 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- XLTRGZZLGXNXGD-UHFFFAOYSA-N benzene;1h-pyrazole Chemical compound C=1C=NNC=1.C1=CC=CC=C1 XLTRGZZLGXNXGD-UHFFFAOYSA-N 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000000084 colloidal system Substances 0.000 description 2
- 238000004891 communication Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000005253 cladding Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 239000012792 core layer Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920002577 polybenzoxazole Polymers 0.000 description 1
- 238000012797 qualification Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
An electronic package and a manufacturing method thereof are provided, wherein a first packaging layer is formed on a bearing member with a circuit, an electronic component and an antenna structure are arranged on the first packaging layer, and the antenna structure and the circuit of the bearing member are isolated by the first packaging layer, so that when the antenna structure receives or emits electromagnetic waves, the interference of the antenna structure with the signal transmission of the circuit of the bearing member can be reduced.
Description
Technical field
The present invention is about a kind of electronic packing piece, especially with regard to a kind of electronic packing piece and its system with antenna structure
Method.
Background technique
With flourishing for portable electronic product in recent years, the exploitation of all kinds of Related products is also directed to high density, height
Performance and light, thin, short, small trend, for this purpose, industry develops the various multi-functional encapsulation aspect of integration, to meet
Electronic product is light and short with highdensity requirement.For example, wireless communication technique is widely used to miscellaneous disappear at present
Expense property electronic product, such as mobile phone (cell phone), plate, to receive or send various less radio-frequency (Radio by antenna
Frequency, abbreviation RF) signal.
Fig. 1 is the schematic cross-sectional view for noting the semiconductor package part 1 of tool antenna structure.The preparation method of the semiconductor package part 1
In semiconductor component 13 is arranged by multiple conductive bumps 130 on the route 100 of a package substrate 10, and in the package substrate
It is formed with an antenna stack 14 on 10, then the semiconductor subassembly 13 and antenna stack 14 are coated with packing colloid 15, by the antenna stack
14 give off electromagnetic wave.
However, noting in semiconductor package part 1, since the antenna stack 14 is formed on the surface of the package substrate 10, make
The transmitting of the antenna stack 14 can internal wiring 100 ' and the semiconductor group to the package substrate 10 with the characteristic for receiving electromagnetic wave
Part 13 causes the problem of electromagnetic interference (Electromagnetic Interference, abbreviation EMI).
Therefore, how to overcome the problems, such as it is above-mentioned note technology, have become in fact at present want solve project.
Summary of the invention
In view of the above-mentioned missing for noting technology, the present invention provides a kind of electronic packing piece and its preparation method, can be reduced the antenna
The signal of the route of the constructive interference load-bearing part transmits.
Electronic packing piece of the invention a, comprising: load-bearing part with route；First encapsulated layer is formed in the carrying
On part；Electronic building brick is set on first encapsulated layer；And antenna structure, it is set on first encapsulated layer.
The present invention also provides a kind of preparation methods of electronic packing piece, comprising: forms the first encapsulated layer in holding with route
In holder；And a setting at least electronic building brick and antenna structure are on first encapsulated layer.
In electronic packing piece above-mentioned and its preparation method, it is formed in first encapsulated layer and is electrically connected the electronic building brick and is somebody's turn to do
The electric conductor of route.
In electronic packing piece above-mentioned and its preparation method, which is plane formula or three-dimensional.
In electronic packing piece above-mentioned and its preparation method, further include to be formed the second encapsulated layer on first encapsulated layer with cladding
The electronic building brick, and second encapsulated layer have opposite first surface and second surface, make second encapsulated layer with its first
Surface is bound on first encapsulated layer.For example, the antenna structure includes antenna stack and the first active layer, which is bound to
The first surface or second surface, and first active layer is bound to the first surface.Further, which also includes
In conjunction with the second active layer of the load-bearing part.
In addition, in electronic packing piece above-mentioned and its preparation method, further include to be formed shielding construction on first encapsulated layer with
Cover the electronic building brick.Further, which is electrically connected the antenna structure.
From the foregoing, it will be observed that in electronic packing piece and its preparation method of the invention, mainly by the first encapsulation of formation on the load-bearing part
Layer is to be isolated the route of the antenna structure Yu the load-bearing part, therefore compared to the technology that notes, the present invention can be reduced the antenna structure in
It receives or interferes the signal of the route to transmit when emitting electromagnetic wave.
In addition, the electronic building brick and the antenna structure is isolated using the shielding construction in electronic packing piece of the invention, with
Avoid generation of the antenna structure to the EMI problem of the electronic building brick.
Detailed description of the invention
Fig. 1 is the diagrammatic cross-section for noting the semiconductor package part of tool antenna structure；
Fig. 2A to Fig. 2 D is the diagrammatic cross-section of the preparation method of electronic packing piece of the invention；
Fig. 2 C ' is the section signal of another embodiment of corresponding diagram 2C；
Fig. 2 D ' is the section signal of another embodiment of corresponding diagram 2D；And
The diagrammatic cross-section for other different embodiments that Fig. 3 A and Fig. 3 B are corresponding diagram 2D.
Primary clustering symbol description
1 semiconductor package part
10 package substrates
100,100 ' routes
13 semiconductor subassemblies
130,230 conductive bumps
14 antenna stacks
15 packing colloids
2,2 ', 2 ", 3,3 ' electronic packing pieces
20 load-bearing parts
The first side 20a
20b second side
200,200 ' routes
201 dielectric materials
21 first encapsulated layers
22 electric conductors
The surface 22a
23 electronic building bricks
24,24 ', 34,34 ' antenna structures
240,340 antenna stacks
241,241 ', 341,341 ' first active layers
25 second encapsulated layers
25a first surface
25b second surface
26 shielding constructions
260 support portions
261 shielding portions
342 second active layers
The interval d, t.
Specific embodiment
Illustrate embodiments of the present invention by particular specific embodiment below, people skilled in the art can be by this theory
The bright revealed content of book is understood other advantages and efficacy of the present invention easily.
It should be clear that this specification structure depicted in this specification institute accompanying drawings, ratio, size etc., only to cooperate specification to be taken off
The content shown is not intended to limit the invention enforceable qualifications for the understanding and reading of people skilled in the art,
Therefore not having technical essential meaning, the modification of any structure, the change of proportionate relationship or the adjustment of size are not influencing this hair
Under bright the effect of can be generated and the purpose that can reach, it should all still fall in disclosed technology contents and obtain and can cover
In range.Meanwhile cited such as "upper", " first ", " second " and " one " term in this specification, it is also only convenient for narration
Be illustrated, rather than to limit the scope of the invention, relativeness is altered or modified, and is changing technology without essence
It inside holds, when being also considered as the enforceable scope of the present invention.
Fig. 2A to Fig. 2 D is the diagrammatic cross-section of the preparation method of electronic packing piece of the invention.
As shown in Figure 2 A, a load-bearing part 20 with opposite the first side 20a and second side 20b is provided.
In this present embodiment, which is, for example, the package substrate with core layer and line construction
(substrate) or the line construction of seedless central layer (coreless), in forming multiple routes 200 on dielectric material 201,
200 ', it is such as fanned out to (fan out) type and reroutes road floor (redistribution layer, abbreviation RDL).For example, the route
200,200 ' be the metal material such as copper, and the dielectric material 201 is prepreg (prepreg, abbreviation PP), polyimides
(polyimide, abbreviation PI), benzocyclobutene (Benezocy-clobutene, abbreviation BCB) gather to diazole benzene
(Polybenzoxazole, abbreviation PBO) or glass (glass fiber).
It should be appreciated that ground, which also can be other load bearing units for carrying such as chip electronic building brick, example
Such as lead frame (leadframe) or the semiconductor plate such as silicon intermediate plate (silicon interposer).
As shown in Figure 2 B, one first encapsulated layer 21 is formed on the first side 20a of the load-bearing part 20, and in first encapsulation
Multiple electric conductors 22 for being electrically connected the route 200 are formed in layer 21.
In this present embodiment, which forms through molding processing procedure or pressing thin film manufacture process, and formed this
The material of one encapsulated layer 21 is, for example, prepreg (PP), polyimides (PI), benzocyclobutene (BCB), gathers to diazole benzene
(PBO), dry film (dry film), epoxy resin (epoxy) or package material (molding compound), but be not limited to above-mentioned.
In addition, the electric conductor 22 is, for example, column, threadiness or bulk, such as metal column (such as copper post), bonding wire section, soldered ball
(solder ball) or other patterns.
Also, the production method of the electric conductor 22 is various.For example, being initially formed the electric conductor 22 on the route 200, re-form
First encapsulated layer 21, to coat the electric conductor 22, makes the part table of the electric conductor 22 on the first side 20a of the load-bearing part 20
Face 22a exposes to first encapsulated layer 21.Alternatively, it is initially formed first encapsulated layer 21 on the first side 20a of the load-bearing part 20,
Perforation is formed in first encapsulated layer 21, forms the electric conductor 22 later in the perforation, and the part of the electric conductor 22
Surface 22a exposes outside first encapsulated layer 21.
As shown in Figure 2 C, it connects and sets an at least electronic building brick 23 on first encapsulated layer 21, and form an antenna structure 24
In on first encapsulated layer 21, wherein the electronic building brick 23 is separated with 24 phase of antenna structure.
In this present embodiment, which is driving component, passive component or the two combination etc., wherein the master
Dynamic component is, for example, semiconductor chip, and the passive component is, for example, resistance, capacitor and inductance.For example, the electronic building brick 23 is
Semiconductor chip, by multiple exposed tables for being set to the electric conductor 22 with rewinding method such as the conductive bump 230 of soldering tin material
On the 22a of face and it is electrically connected the electric conductor 22；Alternatively, the electronic building brick 23 can be electric in a manner of routing by multiple bonding wires (figure omits)
Property connects the electric conductor 22；Also or, the electronic building brick 23 can directly contact the electric conductor 22.However, the related electronic building brick 23
Be electrically connected the electric conductor 22 mode be not limited to it is above-mentioned.
In addition, the antenna structure 24 includes an antenna stack 240 and one first active layer 241 for mutual communication connection, and should
First active layer 241 extends from the antenna stack 240.Specifically, as shown in Figure 2 C, which is plane formula, make this
One active layer 241 is bound to first encapsulated layer 21 with the antenna stack 240, can be by sputter (sputtering), vapor deposition
(vaporing), it is electroplated, change is plated or the modes such as pad pasting (foiling) are formed.Alternatively, as shown in Fig. 2 C ', the antenna structure 24 '
Be it is three-dimensional, make first active layer 241 ' be erected on first encapsulated layer 21 and by the antenna stack 240 be set up in this first
21 top of encapsulated layer, can form by the mode that sheet metal is converted into metal frame.
Also, further, electronic packing piece 2 ' as shown in Figure 2 D can form one second encapsulated layer 25 in first encapsulation
To coat the electronic building brick 23, conductive bump 230 and the antenna structure 24 on layer 21, and second encapsulated layer 25 is with opposite
First surface 25a and second surface 25b, makes second encapsulated layer 25 be bound to first encapsulated layer 21 with its first surface 25a,
And first active layer 241 and the antenna stack 240 be located at the same side (i.e. the side of first surface 25a) and do not expose outside this second
The second surface 25b of encapsulated layer 25.
Specifically, which forms through molding processing procedure or pressing thin film manufacture process, and forms second encapsulation
The material of layer 25 is prepreg, polyimides, benzocyclobutene, gathers to diazole benzene, dry film, epoxy resin or package material etc., but
It is not limited to above-mentioned, therefore the material of first and second encapsulated layer 21,25 can be identical on demand or not identical.It should be appreciated that ground, also
Primer (not shown) can be formed between first encapsulated layer 21 and the electronic building brick 23, to coat those conductive bumps 230, then
Second encapsulated layer 25 is set to coat the primer.
In addition, also shielding (shielding) structure 26, and the shielding construction 26 can be formed in 23 surrounding of electronic building brick
Be electrically connected the antenna structure 24, wherein the shielding construction 26 include at least one around the electronic building brick 23 and be erected on this
On one encapsulated layer 21 and it is electrically connected the support portion 260 of first active layer 241 and is correspondingly arranged at 23 top of electronic building brick
Shielding portion 261, and the shielding portion 261 exposes outside the second surface 25b of second encapsulated layer 25.
Specifically, the shielding construction 26 of such as metal frame construction first can be set up in this by the production method of the shielding construction 26
On first encapsulated layer 21, as shown in Fig. 2 D ', second encapsulated layer 25 is re-formed, wherein the support portion 260 is metal column or gold
Belong to wall, and the shielding portion 261 is sheet metal.Alternatively, be initially formed second encapsulated layer 25, then with laser formed perforation (via) in
On second encapsulated layer 25, the support portion 260 can be formed in the perforation by modes such as sputter, vapor deposition, plating, change platings later
In, and the shielding portion 261 is formed in the second of second encapsulated layer 25 by modes such as sputter, vapor deposition, plating, change plating or pad pastings
On the 25b of surface, to complete the production of the shielding construction 26, wherein the support portion 260 is conductive through holes pattern, and the shielding portion
261 be metal layer pattern.Production in relation to the shielding construction 26 is not limited to above-mentioned.
In another embodiment, the electronic packing piece 2 " as shown in Fig. 2 D ' can omit the production of second encapsulated layer 25,
And only make the shielding construction 26.
In other embodiments, the electronic packing piece 3,3 ' as shown in Fig. 3 A and Fig. 3 B, which can be outer
It is exposed to the second surface 25b of second encapsulated layer 25.Specifically, as shown in Figure 3A, the antenna stack 340 of the antenna structure 34 is day
Line ontology is formed in the second surface that second encapsulated layer 25 is exposed on the second surface 25b of second encapsulated layer 25
25b, and first active layer 341 be used as signal wire, be located at second encapsulated layer 25 first surface 25a on (or this first
On encapsulated layer 21) and be electrically connected the support portion 260 and electronic building brick 23 of the shielding construction 26, make the antenna stack 340 and this
One active layer 341 is opposite to be stacked and in having an interval t between the two, with enable first active layer 341 and the antenna stack 340 by
Signal is transmitted by electromagnetic coupling mode, thus the shape of antenna stack and arrangement design have because taking up space without other components it is higher
Freedom degree.
Alternatively, as shown in Figure 3B, which further includes second active layer 342 as signal wire, formed
In on the first side 20a of the load-bearing part 20 and being electrically connected the route 200, and first active layer 341 ' is used as patchcord, uses
To turn to pass the signal of second active layer 342 to the antenna stack 340, not in contact with and be not electrically connected the shielding construction 26, and
There is another interval d between second active layer 342 and first active layer 341 ', to enable second active layer 342 and be somebody's turn to do
First active layer 341 ' transmits signal by electromagnetic coupling mode.
Preparation method of the invention is by forming the first encapsulated layer 21 on the first side 20a of the load-bearing part 20 this day knot is isolated
The route 200,200 ' of structure 24,24 ', 34,34 ' and the load-bearing part 20, therefore compared to the technology that notes, the present invention can be reduced the antenna
Layer 240,340 interferes the signal transmission of the route 200,200 ' of the load-bearing part 20 when receiving or emitting electromagnetic wave.
In addition, electronic packing piece 2 ', 2 ", 3,3 ' of the invention using the shielding construction 26 be isolated the electronic building brick 23 with
The antenna structure 24,34,34 ', to avoid the cross-talk (cross of 240,340 pairs of electronic building bricks 23 of antenna stack
Talking), the noise interference EMI such as (noise interfering) and radiation interference (radiation interference) are asked
The generation of topic.
The present invention also provides a kind of electronic packing pieces 2,2 ', 2 ", 3,3 ' comprising: holding with route 200,200 '
Holder 20, the first encapsulated layer 21 being formed on the load-bearing part 20, at least one electronic building brick on first encapsulated layer 21
23 and one it is formed in antenna structure 24,24 ', 34,34 ' on first encapsulated layer 21.
In an embodiment, it is formed with multiple electric conductors 22 in first encapsulated layer 21, is electrically connected the electronic building brick
23 with the route 200.
In an embodiment, which is plane formula；Alternatively, the antenna structure 24 ' is three-dimensional.
In an embodiment, the electronic packing piece 2 ', 3,3 ' further include one second encapsulated layer 25, is formed in first encapsulation
To coat the electronic building brick 23 on layer 21, and second encapsulated layer 25 has opposite first surface 25a and second surface 25b,
It is bound to second encapsulated layer 25 on first encapsulated layer 21 with its first surface 25a.For example, the antenna structure 24,24 ',
34,34 ' include 240,340 and one first active layer 241 of an antenna stack, 241 ', 341,341 ', the antenna stack 240,340 formed
In first surface 25a or second surface 25b, and first active layer 241,341,341 ' combines first surface 25a.Or
Person, the second active layer 342 which also combines the load-bearing part 20 comprising one.
In an embodiment, which further includes a shielding construction 26, is formed in first envelope
It fills on layer 21 to cover the electronic building brick 23.Further, which is electrically connected the antenna structure 24,34.
In conclusion electronic packing piece and its preparation method of the invention, by encapsulated layer is formed on the load bearing member, then at the envelope
Antenna structure is formed on dress layer, the route of the antenna structure Yu the load-bearing part is isolated, therefore can be reduced the antenna structure in reception
Or the signal of the route is interfered to transmit when transmitting electromagnetic wave.
In addition, the electronic building brick and the antenna structure is isolated using shielding construction is formed outside electronic building brick, to prevent this
Electromagnetic interference of the antenna structure to the electronic building brick.
Above-described embodiment is only to be illustrated the principle of the present invention and its effect, and is not intended to limit the present invention.Appoint
What those skilled in the art without departing from the spirit and scope of the present invention, modifies to above-described embodiment, and
The content of foregoing embodiments can be combined with each other application again.Therefore the scope of the present invention, should be such as claims institute
Column.
Claims (16)
1. a kind of electronic packing piece, it is characterized in that, which includes:
One load-bearing part with route；
First encapsulated layer is formed on the load-bearing part；
Electronic building brick is set on first encapsulated layer；And
Antenna structure is set on first encapsulated layer.
2. electronic packing piece according to claim 1, it is characterized in that, it is formed in first encapsulated layer and is electrically connected the electricity
The electric conductor of sub-component and the route.
3. electronic packing piece according to claim 1, it is characterized in that, which is plane formula or three-dimensional.
4. electronic packing piece according to claim 1, it is characterized in that, which further includes having opposite first
Second encapsulated layer on surface and second surface is formed on first encapsulated layer to coat the electronic building brick, wherein this second
Encapsulated layer is bound on first encapsulated layer with its first surface.
5. electronic packing piece according to claim 4, it is characterized in that, which includes antenna stack and the first effect
Layer, which is bound to the first surface or second surface, and first active layer is bound to the first surface.
6. electronic packing piece according to claim 5, it is characterized in that, which also includes to be bound to the load-bearing part
Second active layer.
7. electronic packing piece according to claim 1, it is characterized in that, which further includes being formed in first envelope
The shielding construction of the electronic building brick is covered on dress layer.
8. electronic packing piece according to claim 7, it is characterized in that, which is electrically connected the antenna structure.
9. a kind of preparation method of electronic packing piece, it is characterized in that, which includes:
The first encapsulated layer is formed on a load-bearing part with route；And
An at least electronic building brick and antenna structure are set on first encapsulated layer.
10. the preparation method of electronic packing piece according to claim 9, it is characterized in that, electrical property is formed in first encapsulated layer
Connect the electric conductor of the electronic building brick Yu the route.
11. the preparation method of electronic packing piece according to claim 9, it is characterized in that, which is plane formula or solid
Formula.
12. the preparation method of electronic packing piece according to claim 9, it is characterized in that, which further includes being formed to have relatively
First surface and second surface the second encapsulated layer on first encapsulated layer to coat the electronic building brick, wherein this second
Encapsulated layer is bound on first encapsulated layer with its first surface.
13. the preparation method of electronic packing piece according to claim 12, it is characterized in that, which includes antenna stack and the
One active layer, which is bound to the first surface or second surface, and first active layer is bound to the first surface.
14. the preparation method of electronic packing piece according to claim 13, it is characterized in that, which also includes to be bound to this
Second active layer of load-bearing part.
15. the preparation method of electronic packing piece according to claim 9, it is characterized in that, which further includes forming shielding construction
In on first encapsulated layer to cover the electronic building brick.
16. the preparation method of electronic packing piece according to claim 15, it is characterized in that, which is electrically connected the antenna
Structure.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW106116438A TWI659518B (en) | 2017-05-18 | 2017-05-18 | Electronic package and method for fabricating the same |
| TW106116438 | 2017-05-18 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108962878A true CN108962878A (en) | 2018-12-07 |
| CN108962878B CN108962878B (en) | 2019-12-27 |
Family
ID=64494360
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710377667.7A Active CN108962878B (en) | 2017-05-18 | 2017-05-25 | Electronic package and manufacturing method thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN108962878B (en) |
| TW (1) | TWI659518B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11508678B2 (en) | 2019-08-01 | 2022-11-22 | Mediatek Inc. | Semiconductor package structure including antenna |
| US11587881B2 (en) | 2020-03-09 | 2023-02-21 | Advanced Semiconductor Engineering, Inc. | Substrate structure including embedded semiconductor device |
| US11335646B2 (en) * | 2020-03-10 | 2022-05-17 | Advanced Semiconductor Engineering, Inc. | Substrate structure including embedded semiconductor device and method of manufacturing the same |
| TWI762197B (en) * | 2021-02-18 | 2022-04-21 | 矽品精密工業股份有限公司 | Electronic package and manufacturing method thereof |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102299142A (en) * | 2010-06-23 | 2011-12-28 | 环旭电子股份有限公司 | Packaging structure with antenna and manufacturing method thereof |
| CN103258817A (en) * | 2012-09-20 | 2013-08-21 | 日月光半导体制造股份有限公司 | Semiconductor packaging structure and manufacturing method thereof |
| CN103311213A (en) * | 2012-05-04 | 2013-09-18 | 日月光半导体制造股份有限公司 | Semiconductor packaging member integrating shielding film and antenna |
| TW201541704A (en) * | 2014-04-30 | 2015-11-01 | Auden Techno Corp | Chip-type antenna device and chip structure |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003086728A (en) * | 2001-07-05 | 2003-03-20 | Matsushita Electric Ind Co Ltd | Method of manufacturing high-frequency circuit and device using the same |
-
2017
- 2017-05-18 TW TW106116438A patent/TWI659518B/en active
- 2017-05-25 CN CN201710377667.7A patent/CN108962878B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102299142A (en) * | 2010-06-23 | 2011-12-28 | 环旭电子股份有限公司 | Packaging structure with antenna and manufacturing method thereof |
| CN103311213A (en) * | 2012-05-04 | 2013-09-18 | 日月光半导体制造股份有限公司 | Semiconductor packaging member integrating shielding film and antenna |
| CN103258817A (en) * | 2012-09-20 | 2013-08-21 | 日月光半导体制造股份有限公司 | Semiconductor packaging structure and manufacturing method thereof |
| TW201541704A (en) * | 2014-04-30 | 2015-11-01 | Auden Techno Corp | Chip-type antenna device and chip structure |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201901915A (en) | 2019-01-01 |
| CN108962878B (en) | 2019-12-27 |
| TWI659518B (en) | 2019-05-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108807297B (en) | Electronic package and manufacturing method thereof | |
| US9013892B2 (en) | Chip stacking structure | |
| US9326377B2 (en) | Printed wiring board | |
| JP6097837B2 (en) | System in package with RF die embedded in coreless substrate | |
| CN108962878A (en) | Electronic package and manufacturing method thereof | |
| TWI745238B (en) | Electronic package | |
| CN106711118B (en) | Electronic package and manufacturing method thereof | |
| CN110391213A (en) | Electronic device and electronic packing piece | |
| US11271313B2 (en) | Electronic package and method for manufacturing the same | |
| CN109755202A (en) | Electronic packing piece and its preparation method | |
| US11114393B2 (en) | Electronic package and method for fabricating the same | |
| CN113555348A (en) | Semiconductor device with a plurality of semiconductor chips | |
| CN108074826A (en) | Electronic package and manufacturing method thereof | |
| CN111446535B (en) | Electronic package and manufacturing method thereof | |
| CN108807331A (en) | Electronic package and manufacturing method thereof | |
| TWI778608B (en) | Electronic package and antenna structure thereof | |
| CN108695299A (en) | Electronic package, bearing structure thereof and manufacturing method thereof | |
| CN102768996A (en) | Semiconductor packaging structure and manufacture method thereof | |
| CN107622981B (en) | Electronic package and manufacturing method thereof | |
| CN105655303A (en) | Interposer substrate and manufacture method thereof | |
| TWI818779B (en) | Electronic package and manufacturing method thereof | |
| CN102769005A (en) | Semiconductor packaging structure and manufacture method thereof | |
| TWI842142B (en) | Electronic device | |
| TWI815314B (en) | Electronic package and manufacturing method thereof | |
| TW202418539A (en) | Electronic package and manufacturing method thereof |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |