CN108962861B - 一种基板、基板的制备方法及基板的加电方法 - Google Patents
一种基板、基板的制备方法及基板的加电方法 Download PDFInfo
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- CN108962861B CN108962861B CN201810857819.8A CN201810857819A CN108962861B CN 108962861 B CN108962861 B CN 108962861B CN 201810857819 A CN201810857819 A CN 201810857819A CN 108962861 B CN108962861 B CN 108962861B
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- 239000000758 substrate Substances 0.000 title claims abstract description 81
- 238000000034 method Methods 0.000 title claims abstract description 13
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 238000004519 manufacturing process Methods 0.000 claims abstract description 7
- 238000003825 pressing Methods 0.000 claims abstract 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 24
- 235000012239 silicon dioxide Nutrition 0.000 claims description 12
- 239000000377 silicon dioxide Substances 0.000 claims description 12
- 238000000926 separation method Methods 0.000 claims description 11
- 239000000523 sample Substances 0.000 claims description 9
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 5
- 238000004544 sputter deposition Methods 0.000 claims description 3
- 238000003466 welding Methods 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims 1
- 230000009286 beneficial effect Effects 0.000 abstract description 3
- 238000013461 design Methods 0.000 abstract description 3
- 230000007306 turnover Effects 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000012360 testing method Methods 0.000 abstract description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Micromachines (AREA)
Abstract
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Claims (7)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201810857819.8A CN108962861B (zh) | 2018-07-31 | 2018-07-31 | 一种基板、基板的制备方法及基板的加电方法 |
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CN201810857819.8A CN108962861B (zh) | 2018-07-31 | 2018-07-31 | 一种基板、基板的制备方法及基板的加电方法 |
Publications (2)
Publication Number | Publication Date |
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CN108962861A CN108962861A (zh) | 2018-12-07 |
CN108962861B true CN108962861B (zh) | 2020-05-01 |
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Family Applications (1)
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CN201810857819.8A Active CN108962861B (zh) | 2018-07-31 | 2018-07-31 | 一种基板、基板的制备方法及基板的加电方法 |
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CN (1) | CN108962861B (zh) |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4792726B2 (ja) * | 2003-10-30 | 2011-10-12 | 日亜化学工業株式会社 | 半導体素子用支持体の製造方法 |
CN103197227A (zh) * | 2013-03-25 | 2013-07-10 | 西安华芯半导体有限公司 | 一种用于设计分析目的的晶圆测试方法 |
US20170263546A1 (en) * | 2014-03-07 | 2017-09-14 | Bridge Semiconductor Corporation | Wiring board with electrical isolator and base board incorporated therein and semiconductor assembly and manufacturing method thereof |
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2018
- 2018-07-31 CN CN201810857819.8A patent/CN108962861B/zh active Active
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Effective date of registration: 20200403 Address after: 243000 Anhui city of Ma'anshan province high tech Zone at 1669 North Road Huo sparkle Building No. 2 Applicant after: Yirui Optoelectronic Technology (Anhui) Co.,Ltd. Applicant after: SUZHOU YIRUI OPTOELECTRONICS TECHNOLOGY Co.,Ltd. Address before: 215123 13 301A, North Korea's Nancheng West District, 99 Suzhou Industrial Park, Suzhou, Jiangsu. Applicant before: SUZHOU YIRUI OPTOELECTRONICS TECHNOLOGY Co.,Ltd. |
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Effective date of registration: 20240426 Address after: 518000 a1706, Shenzhen national engineering laboratory building, No. 20, Gaoxin South seventh Road, high tech Zone community, Yuehai street, Nanshan District, Shenzhen, Guangdong Patentee after: Shenzhen Yingu Jianke Network Co.,Ltd. Country or region after: China Patentee after: Shenzhen Iridium Semiconductor Technology Co.,Ltd. Address before: 243000 2, 1669 north section of Huo Li Shan Road, Ma'anshan high tech Zone, Anhui Patentee before: Yirui Optoelectronic Technology (Anhui) Co.,Ltd. Country or region before: China Patentee before: SUZHOU YIRUI OPTOELECTRONICS TECHNOLOGY Co.,Ltd. |
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