CN108933078B - Forming method and structure of doped region and IGBT device - Google Patents
Forming method and structure of doped region and IGBT device Download PDFInfo
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
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- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
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Abstract
The invention provides a forming method and a structure of a doped region and an IGBT device, comprising the following steps: forming a plurality of injection regions on a semiconductor substrate; and then, ions in a plurality of the injection regions are diffused through a drive-in trap process so as to form the injection regions, and the injection regions are overlapped with one another to form doped regions. Because the doped region is formed by a plurality of implanted regions through ion diffusion, the formed doped region has lower doping concentration under the strip shape without changing the area of the doped region. Therefore, the doped region is formed in the transition region of the IGBT device, the resistance value of the ballast resistor in the transition region can be effectively improved, and the suppression strength of the convergence effect of hole carriers can be increased in the transition region under the condition that the area of the transition region is not increased.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a forming method and a structure of a doped region and an IGBT device.
Background
An Insulated Gate Bipolar Transistor (IGBT) is a novel high-power device, integrates the grid voltage control characteristic of an MOSFET (metal oxide semiconductor field effect Transistor) and the low on-resistance characteristic of a Bipolar Transistor, improves the condition that the voltage resistance and the on-resistance of the device are mutually limited, and has the advantages of high voltage, high current, high frequency, high power integration density, large input resistance, small on-resistance, low switching loss and the like. The method has wide application space in various fields such as variable frequency household appliances, industrial control, electric and hybrid electric vehicles, new energy, smart power grids and the like.
In an IGBT device, a termination region (terminating) is usually disposed at a periphery of an active region of the IGBT device to protect the active region and prevent the IGBT device from breaking down. That is, when the IGBT device is turned on in the forward direction, the collector injects a large amount of hole carriers into the drift region to form conductance modulation; when the IGBT device is turned off, a large number of hole carriers in the terminal area need to be converged after passing through a field limiting ring in the terminal area and flow out of edge cells in the active area. At this time, if the hole currents gathered together are large enough, the latch-up effect of the edge cells is easily triggered, and the device is failed. Particularly, as the voltage level of the IGBT device is higher and higher, the area of the termination region is correspondingly larger and larger, so that the formed hole current is larger, and the failure rate of the edge cell is greatly improved.
Therefore, it is important how to suppress the hole carrier concentration effect to avoid edge cell failure.
Disclosure of Invention
The invention aims to provide a forming method and a structure of a doped region and an IGBT device, so as to realize that the doped region with the same area is formed with reduced doping concentration, further effectively improve the resistance value of a ballast resistor in the transition region on the basis of not increasing the area of the transition region, and strengthen the suppression strength of the convergence effect of hole carriers.
To solve the above technical problem, the present invention provides a method for forming a doped region, comprising:
providing a semiconductor substrate;
forming a patterned mask layer on the semiconductor substrate, wherein the patterned mask layer is provided with a plurality of openings exposing the semiconductor substrate;
performing an ion implantation process by taking the patterned mask layer as a mask to form a plurality of implantation regions in the semiconductor substrate; and
and performing a drive-in process to diffuse ions in the implanted regions, so that adjacent implanted regions are overlapped with each other to form a doped region.
Optionally, the semiconductor substrate is of a first conductivity type, and the doped region is of a second conductivity type opposite to the first conductivity type.
Optionally, a plurality of the openings are arranged at equal intervals.
Based on the method for forming the doped region, the invention also provides a doped region structure, wherein the doped region comprises a plurality of mutually overlapped injection regions formed in a semiconductor substrate.
Optionally, the semiconductor substrate is of a first conductivity type, and the doped region is of a second conductivity type opposite to the first conductivity type.
Still another object of the present invention is to provide a method for forming an IGBT device, including:
providing a semiconductor substrate, wherein an active region, a transition region and a terminal region are defined on the semiconductor substrate, and the transition region is positioned between the active region and the terminal region;
forming a patterned mask layer on the semiconductor substrate, wherein the patterned mask layer is provided with a plurality of first openings exposing the semiconductor substrate in the transition region and a plurality of second openings exposing the semiconductor substrate in the terminal region;
performing an ion implantation process by taking the patterned mask layer as a mask, forming a plurality of first implantation regions in the semiconductor substrate of the transition region, and forming a plurality of second implantation regions in the semiconductor substrate of the terminal region; and
and performing a drive-in process, enabling adjacent first injection regions in the transition region to be mutually overlapped to form a doped region, and enabling a second injection region in the terminal region to be diffused to a preset depth to form a field limiting ring.
Optionally, the doping concentration of the doped region is less than the doping concentration of the field limiting ring.
Optionally, the semiconductor substrate is of a first conductivity type, and the doped region and the field limiting ring are both of a second conductivity type opposite to the first conductivity type.
Optionally, a plurality of the first openings are arranged at equal intervals.
Optionally, after forming the doped region and the field limiting ring, the method further includes:
and forming a deep trench isolation structure in the doped region, wherein the depth of the deep trench isolation structure is less than that of the doped region.
Optionally, the forming method of the IGBT device further includes:
forming a groove in the semiconductor substrate of the active region;
and forming a gate in the groove.
Optionally, the forming method of the IGBT device further includes: and forming a grid electrode on the semiconductor substrate of the active region.
Optionally, after the forming the gate, the method further includes:
sequentially forming an insulating layer and an emitter electrode on the semiconductor substrate;
and forming a collector on the surface of the semiconductor substrate, which is far away from the emitter electrode.
In addition, the invention also provides an IGBT device structure formed by the IGBT device forming method, which comprises the following steps: a semiconductor substrate; and an active region, a terminal region and a transition region, wherein the active region, the terminal region and the transition region are formed on the semiconductor substrate, the transition region is provided with a doped region formed in the semiconductor substrate, the doped region is formed by diffusing and overlapping a plurality of synchronously formed ion implantation regions which are arranged at intervals through a drive-in-trap process, and the terminal region comprises a plurality of field limiting rings formed in the semiconductor substrate.
Optionally, the doping concentration of the doped region is less than the doping concentration of the field limiting ring.
Optionally, the semiconductor substrate is of a first conductivity type, and the doped region and the field limiting ring are both of a second conductivity type opposite to the first conductivity type.
Optionally, the transition region further includes a deep trench isolation structure formed in the doped region, and a depth of the deep trench isolation structure is smaller than a depth of the doped region.
Optionally, the IGBT device further includes a trench gate formed in the semiconductor substrate of the active region.
Optionally, the IGBT device further includes: and the planar gate is formed on the semiconductor substrate of the active region.
Optionally, the IGBT device further includes: the semiconductor substrate comprises an insulating layer and an emitter electrode, wherein the insulating layer and the emitter electrode are sequentially formed on the semiconductor substrate; and a collector electrode formed on a surface of the semiconductor substrate facing away from the emitter electrode.
In the method for forming the doped region, a plurality of injection regions are formed firstly, then the ions in the injection regions are diffused and overlapped with each other to form the doped region after the drive-in process, and the formed doped region has lower doping concentration under the same area. Therefore, when the IGBT device is applied to the transition region of the IGBT device, namely on the basis of not increasing the area of the transition region, the resistance value of the ballast resistor in the transition region is effectively improved, and the suppression strength of the convergence effect of hole carriers can be greatly enhanced. In addition, in the method for forming the doped region, the doped regions with different doping concentrations can be formed by adjusting the size, the interval or the arrangement density of the implanted region, and based on the process characteristics, the ion implantation process for forming the doped regions and the ion implantation processes of other processes can be simultaneously executed, so that the ion implantation processes of other processes cannot be influenced, the processes can be effectively simplified, and the cost is saved.
Drawings
Fig. 1 is a schematic flow chart illustrating a method for forming a doped region according to a first embodiment of the invention;
FIGS. 2 a-2 d are schematic structural diagrams illustrating a method for forming a doped region in a manufacturing process according to a first embodiment of the present invention;
fig. 3 is a schematic structural diagram of a transition region of an IGBT device according to a second embodiment of the present invention;
fig. 4 is a schematic flow chart of a method for forming an IGBT device according to a third embodiment of the present invention;
fig. 5a to 5h are schematic structural diagrams of a method for forming an IGBT device in a third embodiment of the present invention in a manufacturing process;
fig. 6 is a schematic structural diagram of an IGBT device according to a fourth embodiment of the present invention.
Detailed Description
As described in the background art, in the turn-off process of the IGBT device, a large number of holes converge together after passing through the termination region, and further affect the edge cells in the active region. In order to solve this technical problem, a transition region (interface) may be disposed between the active region and the termination region, and the transition region has a resistor structure, i.e., a ballast resistor (ballast resistance), so that the convergence effect of hole carriers may be suppressed through the transition region, and the probability of latch-up of edge cells in the active region may be reduced.
As the voltage level of the IGBT device is higher and higher, the hole current is larger, and the transition region is further optimized. Of course, the resistance of the ballast resistor can be increased by increasing the size of the transition region to suppress the hole carrier convergence effect, but this approach inevitably results in a large increase in the area of the transition region, thereby increasing the cost.
To this end, the present invention provides a method for forming a doped region that may be formed in a transition region of an IGBT device to constitute the ballast resistor. The forming method of the doped region comprises the following steps:
providing a semiconductor substrate;
forming a patterned mask layer on the semiconductor substrate, wherein the patterned mask layer is provided with a plurality of openings exposing the semiconductor substrate;
performing an ion implantation process by taking the patterned mask layer as a mask to form a plurality of implantation regions in the semiconductor substrate; and
and performing a drive-in process to diffuse the implanted ions and make the adjacent implanted regions overlap with each other to form a doped region.
In the method for forming the doped region, a plurality of injection regions are formed through an ion injection process, and the injection regions are mutually overlapped to form the doped region after a drive-in process, so that the doping concentration in the doped region can be effectively reduced on the basis of not changing the area of the doped region. When the doped region is formed in the transition region of the IGBT device, the doped region can form the ballast resistor, so that the resistance value of the ballast resistor is increased on the basis of not changing the area of the transition region, and the suppression strength of the convergence effect of hole carriers is increased. In addition, in the forming method provided by the invention, the doping concentration of the formed doping area can be controlled by adjusting the number, density or size of the injection area, and the process condition of the ion injection process does not need to be adjusted. Therefore, the ion implantation process of the doped region can be simultaneously carried out with the ion implantation processes of other processes, so that the process is simpler and the cost can be effectively saved.
The structure and forming method of the IGBT device and its transition region proposed by the present invention are further described in detail below with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
< example one >
Fig. 1 is a schematic flow chart of a method for forming a doped region according to a first embodiment of the present invention, and fig. 2a to 2d are schematic structural diagrams of the method for forming a doped region according to the first embodiment of the present invention during a manufacturing process. The method for forming the doped region in the embodiment will be described in detail below with reference to fig. 1 and fig. 2a to 2 d.
First, step S11 is executed, specifically referring to fig. 2a, to provide a semiconductor substrate 100. The semiconductor substrate 100 may be a semiconductor substrate after ion doping, and in this embodiment, the semiconductor substrate 100 is a semiconductor substrate of a first conductivity type, for example, an N-type semiconductor substrate.
Next, step S12 is executed, and referring to fig. 2b specifically, a patterned mask layer 110 is formed on the semiconductor substrate 100, where the patterned mask layer 110 has a plurality of openings 111 exposing the semiconductor substrate 100. Specifically, the openings 111 are arranged at equal intervals, so that after the subsequent implantation region is diffused, a doped region with more uniform ion concentration can be formed.
Next, step S13 is executed, and referring to fig. 2c in particular, an ion implantation process is executed with the patterned mask layer 110 as a mask to form a plurality of implantation regions 120 in the semiconductor substrate 100. That is, through the openings of the mask layer 110, a plurality of implantation regions 120 may be formed in corresponding locations of the semiconductor substrate 100. In this embodiment, the openings are arranged at equal intervals, so that the implantation regions 120 are also arranged at equal intervals.
Next, step S14 is executed, and referring to fig. 2d in particular, a drive-in process is executed to diffuse the implanted ions and make the adjacent implanted regions 120 overlap each other to form a doped region 121. It can be seen that the doped region is formed after ion diffusion of the plurality of implanted regions, so under the same process conditions of the ion implantation process (e.g., ion implantation dose, etc.), the doped region formed in this embodiment has a lower doping concentration, and therefore, when the doped region is applied to the transition region of the IGBT device, a ballast resistor with a larger resistance value can be formed. In addition, when the implantation regions are arranged at equal intervals, the ion distribution in the doped region formed after the drive-in process is more uniform. Further, in the present embodiment, the doped region 121 has a conductivity type opposite to that of the semiconductor substrate 100, that is, the doped region 121 has a second conductivity type, for example, a P-type.
Of course, in order to satisfy different IGBT devices, the doping concentration of the formed doped region can be adjusted by adjusting the number, pitch, or size of the openings 111 in the mask layer 110, and further, the resistance value can be adjusted. For example, when the doping concentration of the doped region needs to be further reduced, the size of the formed implantation region 120 can be reduced by reducing the size of the opening 111 in the mask layer 110, and then the adjacent implantation regions 120 are overlapped with each other by the drive-in process to form the doped region, thereby achieving the purpose of forming the doped region with a lower doping concentration in the same area. Therefore, in the forming method of the doped region provided by the invention, the doping concentration in the doped region can be effectively controlled under the condition that the process condition of the ion implantation process is not changed; alternatively, doped regions with the same doping concentration may still be formed under different ion implantation process conditions. Furthermore, the ion implantation process of the doped region and the ion implantation process of other processes can be simultaneously carried out, so that the process is simpler, and the cost is effectively saved.
< example two >
Based on the above-mentioned method for forming the doped region, the present invention further provides a doped region formed by the above-mentioned method for forming the doped region, that is, the doped region is formed by a plurality of mutually overlapped implantation regions, so that the formed doped region has a lower doping concentration.
Fig. 3 is a schematic structural diagram of a doped region in a second embodiment of the present invention, as shown in fig. 3, in the present embodiment, a doped region 121 is formed in a semiconductor substrate 100, and the doped region 121 includes a plurality of mutually overlapped implantation regions. As described above, since the doped region 121 is formed by overlapping a plurality of implanted regions after ion diffusion, the doped region 121 in the present embodiment has a lower doping concentration when forming the doped regions 121 having the same area. When the structure of the doped region is formed in the transition of the IGBT device, the resistance value of the ballast resistor in the transition region is effectively increased. Further, the semiconductor substrate 100 may be a first conductive type, and the doped region 121 may be a second conductive type opposite to the first conductive type.
< example three >
It is another object of the present invention to provide a method for forming an IGBT device to form an IGBT device with a transition region. As described above, the method for forming the doped region provided by the present invention can be applied to the transition region of the IGBT device, so as to effectively improve the suppression strength of the hole carrier convergence effect without changing the area of the transition region. Meanwhile, in the forming method of the IGBT device, the ion implantation process for forming the doped region and the ion implantation process of other processes are carried out simultaneously, so that the process is effectively simplified, and the cost is saved. That is, in the method for forming the IGBT device according to the present invention, a plurality of implantation regions are formed in the transition region while an ion implantation process for forming a field limiting ring in the termination region is performed, so that after a well-push process, a doped region with a low doping concentration may be formed in the transition region while a field limiting ring is formed in the termination region.
Fig. 4 is a schematic flow chart of a method for forming an IGBT device according to a third embodiment of the present invention, and fig. 5a to 5d are schematic structural diagrams of the method for forming an IGBT device according to the third embodiment of the present invention in a manufacturing process thereof. The method for forming the IGBT device in this embodiment will be described in detail below with reference to fig. 4 and fig. 5a to 5 d.
First, step S21 is executed, and referring to fig. 5a in particular, a semiconductor substrate 200 is provided, wherein an active region 200A, a transition region 200B and a termination region 200C are defined on the semiconductor substrate 200, and the transition region 200B is located between the active region 200A and the termination region 200C. Specifically, in this embodiment, the semiconductor substrate 200 is a doped semiconductor substrate, which may be a first conductive type semiconductor substrate, for example, an N-type semiconductor substrate.
Next, step S22 is executed, specifically referring to fig. 5B, a patterned mask layer 210 is formed on the semiconductor substrate 200, where the patterned mask layer 210 has a plurality of first openings 210B exposing the semiconductor substrate of the transition region 200B and a plurality of second openings 210C exposing the semiconductor substrate of the termination region 200C. Preferably, a plurality of the first openings 211B are arranged at equal intervals.
Next, step S23 is executed, specifically referring to fig. 5C, an ion implantation process is executed by using the patterned mask layer 210 as a mask, a plurality of first implantation regions 220B are formed in the semiconductor substrate of the transition region 200B, and a plurality of second implantation regions 220C are formed in the semiconductor substrate of the termination region 200C. In this case, the process conditions of the ion implantation process may be the process conditions of the ion implantation process when the field limiting ring is formed in the termination region 200C.
Next, step S24 is executed, specifically referring to fig. 5d, a drive-in process is executed, wherein adjacent first implantation regions 220B in the transition region 200B overlap each other to form a doped region 221B, and a second implantation region 220C in the termination region 200C is diffused to a predetermined depth to form a field limiting ring 221C. Therefore, when the doped region 221B and the field limiting ring 221C are formed at the same time, the ion implantation condition of the field limiting ring 221C is not changed, and the influence on the field limiting ring 221C is avoided. Moreover, although the ion implantation process is performed simultaneously when the doped region 221B is formed and the field limiting ring 221C is formed, the doping concentration of the formed doped region 221B is much lower than that of the formed field limiting ring 221C, so that the resistance of the doped region 221B can be effectively increased without affecting the field limiting ring 221C.
As described in the first embodiment, when the doping concentration of the doping region 221B in the transition region 200B needs to be adjusted, the number, the spacing and the size of the first openings 210B in the mask layer 210 can be adjusted, so that the formation of the doping regions with different doping concentrations under the same process condition of the ion implantation process can be realized to form the ballast resistors with different resistance values. That is, by setting the parameters of the first opening 210B, the resistance of the ballast resistor can be adjusted without changing the process conditions of the ion implantation process, so as to meet the requirements of different IGBT devices.
In a preferred embodiment, the method further includes performing step S25, specifically referring to fig. 5e, to form a deep trench isolation structure 270 in the doped region 221B. The depth of the doped region 221B needs to be greater than the depth of the deep trench isolation structure 270, so as to avoid completely blocking the circulation of the hole current. It can be seen that, by forming the deep trench isolation structure 270 in the doped region 221B, the depth of the doped region needs to be enhanced, which is difficult to implement and complicated in process, but it is obvious that the resistance of the ballast resistor can be further increased by adding the deep trench isolation structure 270.
Next, step S26 is executed, specifically referring to fig. 5f, to form a gate 230 in the active region 200A. Specifically, the gate 230 includes a gate oxide layer and a gate electrode. It should be noted that the forming sequence of the gate 230 and the doped region 221B can be adjusted according to the actual process, and in this embodiment, the doped region 221B is preferentially formed as an example.
The gate 230 may be a trench gate, so as to form a trench IGBT device; alternatively, the gate 230 may be a planar gate, thereby forming a planar IGBT device. Specifically, the method for forming the trench gate includes: first, a trench is formed in the semiconductor substrate of the active region 200A; then, forming a gate oxide layer on the side wall and the bottom of the groove; and then, forming a gate electrode on the gate oxide layer. The forming method of the planar grid electrode comprises the following steps: firstly, forming a gate oxide layer on the semiconductor substrate of the active region 200A; and then, forming a gate electrode on the gate oxide layer.
Next, step S27 is executed, and referring to fig. 5g in particular, an insulating layer 240 and an emitter electrode 250 are sequentially formed on the semiconductor substrate 200. In this embodiment, the insulating layer 240 on the active region 200A may be used to isolate the gate 230 from the emitter electrode 250; the insulating layer 240 on the transition region 200B and the terminal region 200C is further provided with a plurality of through holes, the through holes respectively expose a part of the doped region 221B in the transition region 200B and expose the field limiting ring 221C in the terminal region 200C, so that the emitter electrode 250 on the transition region 200B can be connected with the doped region 221B through the through holes, and the emitter electrode 250 on the terminal region 200C can be connected with the field limiting ring 221C through the through holes.
Next, step S28 is executed, specifically referring to fig. 5h, a collector electrode 260 is formed on the surface of the semiconductor substrate 200 facing away from the emitter electrode 250. That is, when the emitter electrode 250 is formed on the upper surface of the semiconductor substrate 200, the collector electrode 260 is formed on the lower surface of the semiconductor substrate.
< example four >
According to the forming method of the IGBT device, the invention also provides the IGBT device which comprises a transition region with a doping region and a terminal region with a field limiting ring, wherein the doping region is formed by diffusing and overlapping a plurality of synchronously formed ion injection regions which are arranged at intervals through a drive-in-trap process. Specifically, the doping concentration of the doped region is less than that of the field limiting ring.
Fig. 6 is a schematic structural diagram of an IGBT device according to a fourth embodiment of the present invention, and as shown in fig. 6, the IGBT device includes: a semiconductor substrate 200; and an active region 200A, a termination region 200C and a transition region 200B formed between the active region 200A and the termination region 200C on the semiconductor substrate 200, wherein the transition region 200B has a doped region 221B formed in the semiconductor substrate 200, the doped region 221B includes a plurality of implant regions overlapping each other, the termination region 200C includes a plurality of field limiting rings 221C formed in the semiconductor substrate 200, and the doped concentration of the doped region 221B is less than that of the field limiting rings 221C. Further, the semiconductor substrate 200 may be a first conductive type, and the doped region 221B and the field limiting ring 221C may be a second conductive type, wherein the second conductive type is opposite to the first conductive type.
In this embodiment, the doped region 221B has a lower doping concentration, so that a ballast resistor with a larger resistance value can be formed, and further, the accumulation effect of hole carriers can be effectively suppressed. Of course, in other embodiments, the transition region 200B may further include a deep trench isolation structure, the deep trench isolation structure is formed in the doped region 221B, and the depth of the deep trench isolation structure is smaller than the depth of the doped region 221B, so as to further increase the resistance value of the ballast resistor in the transition.
With continued reference to fig. 6, in the present embodiment, the IGBT device further includes a trench gate 230 in the semiconductor substrate 200 forming an active region 200A, thereby forming a trench type IGBT device. Of course, in other embodiments, the gate in the active region 200A may also be a planar gate formed on a semiconductor substrate, thereby forming a planar IGBT device. Further, an insulating layer 240 and an emitter electrode 250 are sequentially formed on the semiconductor substrate 200, the insulating layer 240 on the active region 200A may be used to isolate the gate 230 from the emitter electrode 240, a plurality of through holes are respectively formed in the insulating layer 240 on the transition region 200B and the terminal region 200C, and the emitter electrode 250 may be connected to the doped region 221B and the field limiting ring 221C through the through holes. Further, the IGBT device further includes a collector electrode 260, and the collector electrode 260 is located on the other surface of the semiconductor substrate 200 opposite to the emitter electrode 250.
In summary, in the method for forming a doped region provided by the present invention, a plurality of implanted regions are formed first, and then the plurality of implanted regions are subjected to a drive-in process, so that ions in the plurality of implanted regions are diffused and overlapped with each other to form the doped region, and thus the doped region has a lower doping concentration when the doped regions having the same area are formed. Therefore, when the doped region is applied to the transition region of the IGBT device, the doped region with lower doping concentration can be formed in the transition region on the basis of not changing the area of the transition region, and the resistance value of the ballast resistor in the transition region is effectively improved. Therefore, on one hand, the area of the transition region is prevented from being greatly increased, and on the other hand, the suppression strength of the aggregation effect of hole carriers is greatly enhanced. In addition, in the method for forming the doped region, the doped regions with different doping concentrations can be formed by adjusting the size, the interval or the arrangement density of the implanted region, and based on the process characteristics, the ion implantation process for forming the doped regions and the ion implantation processes of other processes can be simultaneously executed, so that the ion implantation processes of other processes cannot be influenced, the processes can be effectively simplified, and the cost is saved.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (13)
1. A method for forming an IGBT device is characterized by comprising the following steps:
providing a semiconductor substrate, wherein the semiconductor substrate is of a first conductivity type, an active region, a transition region and a terminal region are defined on the semiconductor substrate, and the transition region is positioned between the active region and the terminal region;
forming a patterned mask layer on the semiconductor substrate, wherein the patterned mask layer is provided with a plurality of first openings exposing the semiconductor substrate in the transition region and a plurality of second openings exposing the semiconductor substrate in the terminal region;
performing an ion implantation process by taking the patterned mask layer as a mask, forming a plurality of first implantation regions in the semiconductor substrate of the transition region, and forming a plurality of second implantation regions in the semiconductor substrate of the terminal region; and
and performing a drive-in process, enabling adjacent first injection regions in the transition region to be mutually overlapped to form a doped region, and enabling a second injection region in the terminal region to be diffused to a preset depth to form a field limiting ring, wherein the doped region and the field limiting ring are both of a second conductivity type opposite to the first conductivity type.
2. The method of forming an IGBT device according to claim 1, wherein a doping concentration of the doped region is less than a doping concentration of the field limiting ring.
3. The method for forming an IGBT device according to claim 1, wherein a plurality of the first openings are arranged at equal intervals.
4. The method of forming an IGBT device according to claim 1, further comprising, after forming the doped region and the field limiting ring:
and forming a deep trench isolation structure in the doped region, wherein the depth of the deep trench isolation structure is less than that of the doped region.
5. The method of forming an IGBT device according to claim 1, further comprising:
forming a groove in the semiconductor substrate of the active region;
and forming a gate in the groove.
6. The method of forming an IGBT device according to claim 1, further comprising:
and forming a grid electrode on the semiconductor substrate of the active region.
7. The method for forming the IGBT device according to claim 5 or 6, wherein after the gate is formed, the method further comprises:
sequentially forming an insulating layer and an emitter electrode on the semiconductor substrate;
and forming a collector on the surface of the semiconductor substrate, which is far away from the emitter electrode.
8. An IGBT device structure, comprising: a semiconductor substrate; the semiconductor substrate is provided with an active region, a terminal region and a transition region, wherein the active region, the terminal region and the transition region are formed on the semiconductor substrate, the transition region is provided with a doped region formed in the semiconductor substrate, the doped region is formed by diffusing and overlapping a plurality of synchronously formed ion injection regions which are arranged at intervals through a drive-in trap process, and the terminal region comprises a plurality of field limiting rings formed in the semiconductor substrate; the semiconductor substrate is of a first conductivity type, and the doped region and the field limiting ring are both of a second conductivity type opposite to the first conductivity type.
9. The IGBT device structure of claim 8, wherein a doping concentration of the doped region is less than a doping concentration of the field limiting ring.
10. The IGBT device structure of claim 8, wherein the transition region further comprises a deep trench isolation structure formed in the doped region, the deep trench isolation structure having a depth less than the depth of the doped region.
11. The IGBT device structure of claim 8, wherein the IGBT device further comprises a trench gate formed in the semiconductor substrate of the active region.
12. The IGBT device structure of claim 8, wherein the IGBT device further comprises: and the planar gate is formed on the semiconductor substrate of the active region.
13. The IGBT device structure of claim 11 or 12, wherein the IGBT device further comprises: the semiconductor substrate comprises an insulating layer and an emitter electrode, wherein the insulating layer and the emitter electrode are sequentially formed on the semiconductor substrate; and a collector electrode formed on a surface of the semiconductor substrate facing away from the emitter electrode.
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| JP2002118115A (en) * | 2000-10-12 | 2002-04-19 | Fuji Electric Co Ltd | Semiconductor device and its manufacturing method |
| CN102446968A (en) * | 2010-10-13 | 2012-05-09 | 上海华虹Nec电子有限公司 | LDMOS (Laterally Diffused Metal Oxide Semiconductor) device structure and manufacturing method |
| CN104347397A (en) * | 2013-07-23 | 2015-02-11 | 无锡华润上华半导体有限公司 | Manufacture method of injection enhanced type insulated gate bipolar transistor |
| CN106653836A (en) * | 2016-12-01 | 2017-05-10 | 无锡新洁能股份有限公司 | Insulated gate bipolar transistor device with low conduction voltage drop, and manufacturing method for insulated gate bipolar transistor device |
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| JP2002118115A (en) * | 2000-10-12 | 2002-04-19 | Fuji Electric Co Ltd | Semiconductor device and its manufacturing method |
| CN102446968A (en) * | 2010-10-13 | 2012-05-09 | 上海华虹Nec电子有限公司 | LDMOS (Laterally Diffused Metal Oxide Semiconductor) device structure and manufacturing method |
| CN104347397A (en) * | 2013-07-23 | 2015-02-11 | 无锡华润上华半导体有限公司 | Manufacture method of injection enhanced type insulated gate bipolar transistor |
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