CN108923760A - A kind of Central Symmetric Doherty power amplifier and its design method - Google Patents
A kind of Central Symmetric Doherty power amplifier and its design method Download PDFInfo
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- CN108923760A CN108923760A CN201810672047.0A CN201810672047A CN108923760A CN 108923760 A CN108923760 A CN 108923760A CN 201810672047 A CN201810672047 A CN 201810672047A CN 108923760 A CN108923760 A CN 108923760A
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- 238000003199 nucleic acid amplification method Methods 0.000 description 2
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
- H03F1/083—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements in transistor amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/42—Modifications of amplifiers to extend the bandwidth
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
- Microwave Amplifiers (AREA)
Abstract
The invention discloses a kind of Central Symmetric Doherty power amplifier and its design methods.The load mudulation effect of the load modulation network of Doherty power amplifier is that Doherty power amplifier realizes efficient key point under rollback situation.A kind of Central Symmetric Doherty power amplifier of the present invention, including power splitter, carrier power amplifying circuit, peak power amplifying circuit and load modulation network.Peak power amplifying circuit includes peak value input matching network, peak power amplifier, peak value output fundamental wave matching network and phase compensation line.Load modulation network includes the first impedance transformation line and the second impedance transformation line.The electrical length of phase compensation line, the first impedance transformation line and the second impedance transformation line is λ/4, and characteristic impedance value is 35.3 Ω.The invention enables the reductions of the impedance transformation ratio of impedance transformation line, have widened the target bandwidth of Doherty power amplifier.
Description
Technical field
The invention belongs to power amplifier techniques fields, and in particular to a kind of Central Symmetric Doherty power amplifier
And its design method.
Background technique
Doherty power amplifier can realize high efficiency output because its structure is simple under higher-wattage rollback,
Dominant form as current wireless communication system intermediate power amplifier.One typical two-way Doherty power amplifier packet
Include Carrier Power Amplifier and peak power amplifier, Carrier Power Amplifier, peak power amplifier input terminal by function point
Signal is divided into two and inputs respectively by device, and signal is combined by a load modulation network and is exported by output end, is believed according to input
Number size dynamic modulation Carrier Power Amplifier, peak power amplifier payload impedance, to make Doherty power
Amplifier still has very high efficiency in the case where output power significantly retracts.
Bandwidth restriction effect of traditional Doherty power amplifier due to its load modulation network, narrower bandwidth, in future
In broadband or multiband field of wireless communications using still limited, how realizing can work normally under wider bandwidth
Doherty power amplifier is the main trend studied at present., need to develop Wideband Doherty power amplifier with
Meet the demand of current growing wireless communication transmissions data volume.The bandwidth for how improving Doherty naturally becomes
One of art circle and the research hotspot of industry.
The load mudulation effect of the load modulation network of Doherty power amplifier is that Doherty power amplifier is being returned
Efficient key point is realized in the case of moving back, and quarter-wave impedance transformation line is the key that load modulation network group
At part, phase-shift phase is closely related with working frequency, and working frequency is remoter from centre frequency, and phase-shift phase is bigger, corresponding to adjust
Impedance processed can also deviate optimal impedance, so that load mudulation effect weakens, it is low so as to cause amplifier performance.
Summary of the invention
The purpose of the present invention is to provide a kind of Central Symmetric Doherty power amplifier design methods.
A kind of Central Symmetric Doherty power amplifier of the present invention, including power splitter, carrier power amplifying circuit, peak
It is worth power amplification circuit and load modulation network.The carrier power amplifying circuit includes carrier wave input matching network, carrier wave
Power amplifier and carrier wave export fundamental wave matching network.First output of the input termination power splitter of carrier wave input matching network
End, output end carry the input terminal of Power Amplifier.The output end of Carrier Power Amplifier carries wave output fundamental wave pair net
The input terminal of network.
The peak power amplifying circuit includes peak value input matching network, peak power amplifier, peak value output base
Wave matching network and phase compensation line.The electrical length of the phase compensation line is λ/4, and characteristic impedance value is 35.3 Ω.The phase
One termination of position compensating line connects the first output end of power splitter, the input terminal of another termination peak value input matching network.Peak value is defeated
Enter the input terminal of the output termination peak power amplifier of matching network.The output termination peak value of peak power amplifier exports base
The input terminal of wave matching network.The load termination peak work of peak value output fundamental wave matching network puts the first terminals of compensating line.
The load modulation network includes the first impedance transformation line and the second impedance transformation line.The first impedance transformation
The electrical length of line and the second impedance transformation line is λ/4, and characteristic impedance value is 35.3 Ω.One termination of the first impedance transformation line
Carrier wave exports the load end of fundamental wave matching network, and the load end of another termination peak value output fundamental wave matching network and the second impedance become
One end of thread-changing.
Further, power splitter use etc. divides Wilkinson power divider.
Further, the Carrier Power Amplifier and peak power amplifier are all made of transistor.
Further, a kind of Central Symmetric Doherty power amplifier of the present invention further includes output resistance.The output
Termination that end of the second impedance transformation line far from the first impedance transformation line for resistance, other end ground connection.
Further, the output impedance of the carrier wave output fundamental wave matching network is modulated to 25 Ω.
Further, the output impedance of the peak value output fundamental wave matching network is modulated to 50 Ω.
The design method of the Central Symmetric Doherty power amplifier is specific as follows：
Step 1：The input voltage for adjusting Carrier Power Amplifier grid makes Carrier Power Amplifier work in AB class work
Operation mode.And carrier wave input matching network and carrier wave output fundamental wave matching network are designed, so that carrier wave exports fundamental wave matching network
Output impedance be matched to 25 Ω.
Step 2：The input voltage for adjusting peak power amplifier grid makes peak power amplifier operation work in C class
Mode.And peak value input matching network and peak value output fundamental wave matching network are designed, so that peak power amplifier in
Impedance value is matched to 25 Ω, and the output impedance of peak value output fundamental wave matching network is matched to 50 Ω.
Step 3：First output end of power splitter is connected with the input terminal of carrier wave input matching network obtained by step 1.
Power splitter second output terminal is connected with one end of phase compensation line.By peak value obtained by the other end of phase compensation line and step 2
The input terminal of input matching network is connected.By one end of the load end of carrier wave output fundamental wave matching network and the first impedance transformation line
It is connected.
Step 4: the other end of the first impedance transformation line and the load end of peak value output fundamental wave matching network are connected to form
Combining.
Step 5: one end of the second impedance transformation line to be connected to the load end of peak value output fundamental wave matching network.
The invention has the advantages that：
The present invention exports the impedance matching value and peak power amplifier of fundamental wave matching network load end by changing carrier wave
The impedance matching value of input terminal.And by carrier wave export fundamental wave matching network load end after, combining end before impedance transformation line impedance
Value is changed to 35.3 Europe, so that the impedance transformation ratio of impedance transformation line reduces, the target bandwidth of Doherty power amplifier is opened up
It is wide.
The phase compensation line 3- that characteristic impedance value is 35.3 Ω is added in the front end of peak power amplifying circuit in the present invention
4, enable the output impedance of peak value output fundamental wave matching network in peak power amplifying circuit to be modulated to 25 Ω.To balance
The phase of Carrier Power Amplifier and peak power amplifier meets setting for Doherty power amplifier whole matching scheme
Meter demand.
Detailed description of the invention
Fig. 1 is the working principle of the invention figure；
Fig. 2 is the present invention and existing Doherty power amplifier efficiency curve simulation comparison figure in back-off 6dB.
Specific embodiment
Below in conjunction with attached drawing, the invention will be further described.
As shown in Figure 1, a kind of Central Symmetric Doherty power amplifier, including power splitter 1, carrier power amplification electricity
Road 2, peak power amplifying circuit 3, load modulation network 4 and output resistance 5.Use of power splitter 1 etc. divides Wilkinson power divider.
Power splitter 1 is used to after input signal is carried out equal part exported respectively to carrier power amplifying circuit 2 and peak power amplifying circuit
3。
Carrier power amplifying circuit 2 includes that carrier wave input matching network 2-1, Carrier Power Amplifier 2-2 and carrier wave export
Fundamental wave matching network 2-3.First output end of the input termination power splitter 1 of carrier wave input matching network 2-1, output end carry wave
The input terminal (grid) of power amplifier 2-2.The source electrode of Carrier Power Amplifier 2-2 is grounded, and it is defeated that output end (drain electrode) carries wave
The input terminal of fundamental wave matching network 2-3 out.The output impedance of carrier wave output fundamental wave matching network 2-3 is modulated to 25 Ω.
Peak power amplifying circuit 3 includes peak value input matching network 3-1, peak power amplifier 3-2, peak value output base
Wave matching network 3-3 and phase compensation line 3-4.The electrical length of phase compensation line 3-4 is λ/4, and characteristic impedance value is 35.3 Ω.Phase
A termination of position compensating line 3-4 connects the first output end of power splitter 1, the input terminal of another termination peak value input matching network 3-1.
The input terminal (grid) of the output termination peak power amplifier 3-2 of peak value input matching network 3-1.Peak power amplifier 3-
2 source electrode ground connection, output end (drain electrode) connect the input terminal of peak value output fundamental wave matching network 3-3.Peak value exports fundamental wave pair net
The load termination peak work of network 3-3 puts the first terminals of compensating line 3-4.Peak value exports the output resistance of fundamental wave matching network 3-3
It is anti-to be modulated to 50 Ω.
Load modulation network 4 includes the first impedance transformation line 4-1 and the second impedance transformation line 4-2.First impedance transformation line
The electrical length of 4-1 and the second impedance transformation line 4-2 are λ/4, and characteristic impedance value is 35.3 Ω.First impedance transformation line 4-1
One end carry wave output fundamental wave matching network 2-3 load end, it is another termination peak value output fundamental wave matching network 3-3 load
End and one end of the second impedance transformation line 4-2.One end of another termination output resistance 5 of second impedance transformation line 4-2.Output electricity
The other end ground connection of resistance 5.
The main reason for the first impedance transformation line 4-1 is limitation bandwidth in Doherty power amplifier load modulation network,
The relative bandwidth of first impedance transformation line 4-1Expression formula is as follows：
Wherein, ΓmFor the reflection coefficient of fundamental wave matching network.ZinIt is the output resistance of carrier wave output fundamental wave matching network 2-3
It is anti-, ZoutIt is output impedance of the carrier wave output fundamental wave matching network 2-3 after the first impedance transformation line 4-1.
From the above equation, we can see that working as ZinWith ZoutRatio it is smaller, the relative bandwidth of the first impedance transformation line 4-1 is bigger.Therefore it drops
Low ZinWith ZoutBetween impedance transformation ratio be theoretically able to ascend Doherty power amplifier bandwidth performance.Traditional Doherty
Power amplifier works under low-power input state, and peak power amplifier 3-2 does not work.
The characteristic impedance value of the first impedance transformation line 4-1 is 35.3 Europe in the present invention, and carrier wave is exported fundamental wave pair net
The output impedance of network 2-3 is modulated to 25 Ω.Doherty power amplifier works in low-power input state, and peak power is put
The state of open circuit is presented in big circuit 3.The output impedance of carrier power amplifying circuit 2 is 50 Ω, is by characteristic impedance value
After the first impedance transformation line 4-1 after 35.3 Ω, impedance value is transformed to 25 Ω, impedance transformation ratio 2.And in the prior art,
100 Ω impedance values are transformed to 25 Ω impedance values, impedance transformation ratio 4 by impedance transformation line.As it can be seen that the present invention is in low input power
Under impedance transformation ratio be significantly lower than existing Doherty power amplifier.Lower impedance transformation ratio can bring bigger band
Width, therefore the present invention has bigger bandwidth.
Since Doherty power amplifier structure limits, peak value output fundamental wave matching network can not be designed and carrier wave function
The output matching network put is consistent.Phase between Carrier Power Amplifier and peak power amplifier is caused to mismatch.The present invention
The phase compensation line 3-4 that characteristic impedance value is 35.3 Ω is added in the front end of peak power amplifying circuit 3, so that peak power
The output impedance of peak value output fundamental wave matching network 3-3 can be modulated to 25 Ω in amplifying circuit 3.It is put to balance carrier power
The phase of big device and peak power amplifier, meets the design requirement of Doherty power amplifier whole matching scheme.
As shown in Fig. 2, broken line formed by connection side's point is rollback efficiency broken line of the present invention under 6dB back-off；Even
Connecing broken line formed by triangulation point is rollback efficiency broken line of the existing Doherty power amplifier under 6dB back-off.It can see
The present invention can reach 40% or more rollback efficiency, and existing Doherty power in the range of 3.0Ghz~3.9Ghz out
Amplifier can only reach 40% or more rollback efficiency in the range of 3.2Ghz~3.7Ghz.As it can be seen that bandwidth of the invention
Significantly greater than existing Doherty power amplifier, and in efficiency of the present invention in bandwidth obviously higher than existing Doherty function
Rate amplifier.
The design method of the Central Symmetric Doherty power amplifier is specific as follows：
Step 1：The input voltage for adjusting Carrier Power Amplifier grid makes Carrier Power Amplifier work in AB class work
Operation mode.And carrier wave input matching network 2-1 and carrier wave output fundamental wave matching network 2-3 is designed, so that carrier wave exports fundamental wave
The output impedance of distribution network 2-3 is matched to 25 Ω.
Step 2：The input voltage for adjusting peak power amplifier grid makes peak power amplifier operation work in C class
Mode.And peak value input matching network 3-1 and peak value output fundamental wave matching network 3-3 is designed, so that peak power amplifier 3-2
The impedance value of input terminal is matched to 25 Ω, and the output impedance of peak value output fundamental wave matching network 3-3 is matched to 50 Ω.
Step 3：By the input terminal phase of the first output end of power splitter and carrier wave input matching network 2-1 obtained by step 1
Even.Power splitter second output terminal is connected with one end of phase compensation line 3-4.By the other end and step of phase compensation line 3-4
The input terminal of two gained peak value input matching network 3-1 is connected.By the load end and first of carrier wave output fundamental wave matching network 2-3
One end of impedance transformation line 4-1 is connected.
Step 4: by the load end phase of the other end of the first impedance transformation line 4-1 and peak value output fundamental wave matching network 3-3
Even form combining.
Step 5: one end of the second impedance transformation line 4-2 to be connected to the load of peak value output fundamental wave matching network 3-3
End.And one end of output resistance is connected with the other end of the second impedance transformation line 4-2.
Claims (7)
1. a kind of Central Symmetric Doherty power amplifier, including power splitter, carrier power amplifying circuit, peak power are put
Big circuit and load modulation network；It is characterized in that：The carrier power amplifying circuit includes carrier wave input matching network, carries
Power Amplifier and carrier wave export fundamental wave matching network；First output of the input termination power splitter of carrier wave input matching network
End, output end carry the input terminal of Power Amplifier；The output end of Carrier Power Amplifier carries wave output fundamental wave pair net
The input terminal of network；
The peak power amplifying circuit includes peak value input matching network, peak power amplifier, peak value output fundamental wave
Distribution network and phase compensation line；The electrical length of the phase compensation line is λ/4, and characteristic impedance value is 35.3 Ω；The phase is mended
The termination for repaying line connects the first output end of power splitter, the input terminal of another termination peak value input matching network；Peak value input
The input terminal of the output termination peak power amplifier of distribution network；The output termination peak value of peak power amplifier exports fundamental wave
The input terminal of distribution network；The load termination peak work of peak value output fundamental wave matching network puts the first terminals of compensating line；
The load modulation network includes the first impedance transformation line and the second impedance transformation line；The first impedance transformation line and
The electrical length of second impedance transformation line is λ/4, and characteristic impedance value is 35.3 Ω；Carry wave in one end of first impedance transformation line
Export the load end of fundamental wave matching network, the load end and the second impedance transformation line of another termination peak value output fundamental wave matching network
One end.
2. a kind of Central Symmetric Doherty power amplifier according to claim 1, it is characterised in that：The function
Device use etc. is divided to divide Wilkinson power divider.
3. a kind of Central Symmetric Doherty power amplifier according to claim 1, it is characterised in that：The carrier wave
Power amplifier and peak power amplifier are all made of transistor.
4. a kind of Central Symmetric Doherty power amplifier according to claim 1, it is characterised in that：It further include defeated
Resistance out；Termination that end of the second impedance transformation line far from the first impedance transformation line for the output resistance, other end ground connection.
5. a kind of Central Symmetric Doherty power amplifier according to claim 1, it is characterised in that：The carrier wave
The output impedance of output fundamental wave matching network is modulated to 25 Ω.
6. a kind of Central Symmetric Doherty power amplifier according to claim 1, it is characterised in that：The peak value
The output impedance of output fundamental wave matching network is modulated to 50 Ω.
7. a kind of design method of Central Symmetric Doherty power amplifier as described in claim 1, it is characterised in that：
Step 1：The input voltage for adjusting Carrier Power Amplifier grid makes Carrier Power Amplifier work in AB class operating mode；And
It designs carrier wave input matching network and carrier wave exports fundamental wave matching network, so that the output impedance of carrier wave output fundamental wave matching network
It is matched to 25 Ω；
Step 2：The input voltage for adjusting peak power amplifier grid, makes peak power amplifier operation in C class Working mould
Formula；And peak value input matching network and peak value output fundamental wave matching network are designed, so that the resistance of peak power amplifier in
Anti- value is matched to 25 Ω, and the output impedance of peak value output fundamental wave matching network is matched to 50 Ω；
Step 3：First output end of power splitter is connected with the input terminal of carrier wave input matching network obtained by step 1；By function
Device second output terminal is divided to be connected with one end of phase compensation line；Peak value obtained by the other end of phase compensation line and step 2 is inputted
The input terminal of matching network is connected；By the load end and one end phase of the first impedance transformation line of carrier wave output fundamental wave matching network
Even；
Step 4: the load end of the other end of the first impedance transformation line and peak value output fundamental wave matching network is connected to form conjunction
Road；
Step 5: one end of the second impedance transformation line to be connected to the load end of peak value output fundamental wave matching network.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110504926A (en) * | 2019-08-28 | 2019-11-26 | 重庆大学 | A kind of mostly band Doherty power amplifier |
| CN111585517A (en) * | 2020-04-16 | 2020-08-25 | 江苏大学 | Broadband dual-band 3-path Doherty power amplifier adopting combined output network |
| CN112134534A (en) * | 2020-09-18 | 2020-12-25 | 东南大学 | Mode-switchable Doherty power amplifier based on double-compensation reactance and adjustable drain voltage technology |
| CN113708731A (en) * | 2021-08-25 | 2021-11-26 | 优镓科技(北京)有限公司 | Linearity enhanced Doherty power amplifier based on phase mismatch |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110504926A (en) * | 2019-08-28 | 2019-11-26 | 重庆大学 | A kind of mostly band Doherty power amplifier |
| CN110504926B (en) * | 2019-08-28 | 2023-03-28 | 重庆大学 | Multi-band Doherty power amplifier |
| CN111585517A (en) * | 2020-04-16 | 2020-08-25 | 江苏大学 | Broadband dual-band 3-path Doherty power amplifier adopting combined output network |
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| CN112134534A (en) * | 2020-09-18 | 2020-12-25 | 东南大学 | Mode-switchable Doherty power amplifier based on double-compensation reactance and adjustable drain voltage technology |
| CN113708731A (en) * | 2021-08-25 | 2021-11-26 | 优镓科技(北京)有限公司 | Linearity enhanced Doherty power amplifier based on phase mismatch |
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Application publication date: 20181130 |