CN106411267A - Novel broadband three-path Doherty power amplifier and implementation method thereof - Google Patents
Novel broadband three-path Doherty power amplifier and implementation method thereof Download PDFInfo
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- H—ELECTRICITY
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
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Abstract
The invention provides a novel broadband three-path Doherty power amplifier and an implementation method thereof. A three-path halving power divider is used for halving input power and separately outputting the halved input power to a carrier power amplifier circuit, a first peak power amplifier circuit and a second peak power amplifier circuit, and an output end of the carrier power amplifier circuit is connected with a 86.6 Ohm quarter-wave impedance transformer T1, and is connected with the output ends of the first peak power amplifier circuit and the second peak power amplifier circuit to combine to output the power to a load. Compared with the prior art, the load modulation network of the traditional Doherty power amplifier is improved, the impedance transformation ratio of the load modulation network is reduced, the size of the Doherty power amplifier is reduced, and meanwhile a compensation line of a peak branch is added in a peak output matching circuit, thereby reducing the quality factors of the entire peak output matching circuit, and greatly broadening the working bandwidth of the three-path Doherty power amplifier.
Description
Technical Field
The invention relates to the technical field of radio frequency communication, in particular to a novel broadband three-way Doherty power amplifier and an implementation method thereof.
Background
In the last half century, the radio frequency microwave technology has been developed rapidly and widely applied to the wireless communication fields of WLAN, mobile phone, electronic countermeasure, satellite communication, etc. The radio frequency power amplifier unit is a core component in a wireless communication system, and in order to realize long-distance signal transmission and ensure reliable signal reception, a power amplifier is required to be used for amplifying signals in a receiving and transmitting component of the wireless communication system. It can be said that the performance of the power amplifier will directly affect the operation of the whole system, and is a core component of the radio frequency front end in the wireless transceiving system.
With the rapid development of wireless communication technology, radio frequency microwave technology is more and more important in people's daily life. In order to transmit as large an amount of data as possible within a limited spectrum bandwidth, a very complex modulation scheme is usually adopted by a communication provider, which results in a large peak-to-average ratio (PAPR) of a signal, and a conventional power amplifier such as class a and class AB is used to amplify a non-constant-envelope signal with low efficiency, especially at high power back-off. A radio frequency power amplifier with high efficiency and high linearity is one of the research hotspots in the academic and industrial fields. The Doherty power amplifier is a mainstream form of a power amplifier used in wireless communication nowadays due to its ability to efficiently amplify a modulated signal and its low cost. A typical two-path Doherty power amplifier comprises a main power amplifier and an auxiliary power amplifier, wherein the input end of the main power amplifier and the auxiliary power amplifier is divided into two parts by a power divider and respectively input the two parts, the output end of the main power amplifier and the auxiliary power amplifier combines and outputs signals through a load modulation network, and the effective load impedance of the main power amplifier and the auxiliary power amplifier is dynamically modulated according to the size of the input signals, so that the Doherty power amplifier still has high efficiency under the condition of large-amplitude back-off of the output power.
However, with the rapid development of communication technology, the modulation mode is more complicated, and the range of the power back-off of the conventional two-way Doherty power amplifier by 6dB cannot meet the requirements of the current wireless communication system, so that the three-way Doherty power amplifier is generated. The three-way Doherty technology can improve the efficiency of a power amplifier under the condition of higher power back-off and enlarge the range of high-efficiency power back-off.
However, the three-way Doherty power amplifier in the prior art also has the common fault of the traditional Doherty power amplifier, namely the problem of narrow bandwidth. In the prior art, the load modulation network of the three-way Doherty power amplifier still adopts a common 50-ohm quarter-wavelength impedance converter in the prior art, which causes the impedance conversion to be large, and therefore, the bandwidth is greatly limited. Meanwhile, the size of the prior art Doherty power amplifier is large, and the application range of the Doherty power amplifier is limited to a certain extent.
In the face of the increasing shortage of spectrum resources, a wireless broadband communication system capable of simultaneously covering a plurality of working frequency bands and being compatible with a plurality of protocol systems has become the development focus of wireless technology. Therefore, it is urgently needed to develop a new wideband Doherty power amplifier to meet the requirement of high transmission rate of the current and future wireless communication systems. The broadband Doherty power amplifier also becomes a hotspot of research in academia and industry for all reason.
Therefore, it is necessary to provide a solution to the above-mentioned drawbacks in the prior art.
Disclosure of Invention
In view of this, the present invention provides a novel wideband three-way Doherty power amplifier and a method for implementing the same, in which a load modulation network of a conventional three-way Doherty power amplifier is improved, so as to reduce an impedance transformation ratio of the load modulation network, and meanwhile, a compensation line of a peak branch is added to a peak output matching circuit, so as to reduce a quality factor of the overall peak output matching circuit, and greatly widen a working bandwidth of the three-way Doherty power amplifier.
In order to overcome the defects of the prior art, the invention adopts the following technical scheme:
a novel broadband three-way Doherty power amplifier comprises a three-way equal-division power divider, a carrier power amplifying circuit, a first peak power amplifying circuit, a second peak power amplifying circuit and a novel load modulation network, wherein the three-way equal-division power divider is used for dividing input power into three parts and then respectively outputting the three parts to the carrier power amplifying circuit, the first peak power amplifying circuit and the second peak power amplifying circuit, and output powers of the carrier power amplifying circuit, the first peak power amplifying circuit and the second peak power amplifying circuit are output to a load after passing through the novel load modulation network;
the impedance of the load is 50 ohms; the novel load modulation network adopts an impedance transformer T1 with a quarter wavelength of 86.6 ohms; the output end of the carrier power amplifying circuit is connected with one end of the impedance converter T1, the other end of the impedance converter T1 is connected with the output ends of the first peak power amplifying circuit and the second peak power amplifying circuit and is connected with one end of the load together, and the other end of the load is grounded;
the carrier power amplifying circuit comprises a carrier input matching circuit, a carrier power amplifier and a carrier output matching circuit which are sequentially connected in series, and the carrier output matching circuit is debugged to enable the load impedance of the carrier power amplifying circuit to be 150 ohms at low input power and 50 ohms at high input power; the first peak power amplifying circuit comprises a first peak input matching circuit, a first peak power amplifier and a first peak output matching circuit which are sequentially connected in series, the first peak output matching circuit is debugged to enable the load impedance of the first peak power amplifying circuit to be 150 ohms when the input power is high, and meanwhile, a first compensation line C1 is integrally arranged in the first peak output matching circuit to enable the load impedance of the first peak power amplifying circuit to be infinite when the input power is low; the second peak power amplifying circuit comprises a second peak input matching circuit, a second peak power amplifier and a second peak output matching circuit which are sequentially connected in series, the second peak output matching circuit is debugged to enable the load impedance of the second peak power amplifying circuit to be 150 ohms when the second peak power amplifying circuit is at high input power, and meanwhile, a second compensation line C2 is integrally arranged in the second peak output matching circuit to enable the load impedance of the second peak power amplifying circuit to be infinite when the second peak power amplifying circuit is at low input power.
Preferably, the first compensation line C1 is 150 ohms.
Preferably, the second compensation line C2 is 150 ohms.
Preferably, the front end of the first peak input matching circuit is further provided with a 50 ohm quarter wave phase delay line.
Preferably, the front end of the second peak input matching circuit is further provided with a 50 ohm quarter wave phase delay line.
Preferably, the carrier power amplifier is a class AB power amplifier, and the first peak power amplifier and the second peak power amplifier are class C power amplifiers.
Preferably, the carrier power amplifier, the first peak power amplifier and the second peak power amplifier are all implemented by transistors.
In order to overcome the defects of the prior art, the invention also discloses a method for realizing the novel broadband three-way Doherty power amplifier, which is realized by the following steps:
debugging a standard AB type power amplifier as a carrier power amplifier, and debugging a carrier output matching circuit to ensure that the load impedance of the carrier power amplifying circuit is 150 ohms at low input power and 50 ohms at high input power;
debugging a standard C-type power amplifier as a first peak power amplifier, and debugging a first peak output matching circuit to enable the load impedance of the first peak power amplifier circuit to be 150 ohms when the input power is high;
debugging a standard C-type power amplifier as a second peak power amplifier, and debugging a second peak output matching circuit to enable the load impedance of the second peak power amplifier circuit to be 150 ohms when the input power is high;
a first compensation line C1 is arranged in the first peak value output matching circuit, and the first peak value output matching circuit and the first compensation line C1 are integrally debugged, so that the load impedance of the first peak value power amplification circuit at the time of low input power is infinite; a second compensation line C2 is arranged in the second peak value output matching circuit, and the second peak value output matching circuit and the second compensation line C2 are integrally debugged, so that the load impedance of the second peak value power amplifying circuit at low input power is infinite;
debugging a novel load modulation network employing an 86.6 ohm quarter wavelength impedance transformer T1;
the debugged carrier power amplifying circuit, the first peak power amplifying circuit, the second peak power amplifying circuit and the novel load modulation network are combined by adopting a three-way equal power divider to form a novel broadband three-way Doherty power amplifier, wherein the output end of the carrier power amplifying circuit is connected with one end of an impedance converter T1, the other end of the impedance converter T1 is connected with the output ends of the first peak power amplifying circuit and the second peak power amplifying circuit and is connected with one end of the load together, and the other end of the load is grounded.
Preferably, the first compensation line C1 and the second compensation line C2 are 150 ohms.
Preferably, a 50 ohm quarter wave phase delay line is provided at the front end of each of the first and second peak input matching circuits.
Compared with the prior art, the load modulation network of the traditional three-way Doherty power amplifier is improved, the impedance transformation ratio of the load modulation network of the traditional three-way Doherty power amplifier is 9:1(150 ohm to 16.67 ohm), the impedance transformation ratio of the novel load modulation network is 3:1(150 ohm to 50 ohm), the impedance transformation ratio of the load modulation network is reduced, meanwhile, a quarter-wavelength transmission line is not required to be connected in series at the output end of the combination way, and therefore the Doherty power amplifier increases the Doherty working bandwidth and reduces the layout area of the whole Doherty. Meanwhile, the compensation line of the traditional three-way Doherty power amplifier auxiliary branch is defined by a single central frequency point, and the quality factor of the output matching circuit is increased, so that the overall bandwidth of the three-way Doherty power amplifier is restrained.
Drawings
Fig. 1 is a schematic structural diagram of a novel broadband three-way Doherty power amplifier in the invention.
FIG. 2 is a graph showing a characteristic impedance of ZTThe impedance transformation characteristic of the quarter-wavelength transmission line.
Fig. 3 is a schematic diagram of the operation of the novel broadband three-way Doherty power amplifier of the invention.
Fig. 4a shows the relationship between the real and imaginary parts of the load impedance at the saturation point (high power) of the main amplifier simulated under the conventional three-way Doherty scheme and the novel wideband three-way Doherty scheme of the present invention as a function of frequency.
Fig. 4b shows the relationship between the real and imaginary parts of the load impedance at the back-off point (low power) of the main amplifier simulated under the conventional three-way Doherty scheme and the novel wideband three-way Doherty scheme of the present invention as a function of the frequency.
Detailed Description
The following are specific embodiments of the present invention and are further described with reference to the drawings, but the present invention is not limited to these embodiments.
The applicant carries out intensive research on the structure of the three-way Doherty power amplifier in the prior art aiming at the defects in the prior art, and finds that the impedance transformation ratio of a quarter-wavelength impedance transformer in a load modulation network of the three-way Doherty power amplifier in the prior art is large, so that the impedance transformation ratio of the load modulation network of the traditional three-way Doherty power amplifier is 9:1 (150-16.67 ohms), thereby inhibiting the working bandwidth of the three-way Doherty, meanwhile, the load modulation network in the prior art is generally formed by a plurality of impedance transformers, the size of the Doherty power amplifier is increased, and a compensation line of an auxiliary branch of the traditional three-way Doherty power amplifier is defined by a single central frequency point, so that the quality factor of an output matching circuit is increased, and the overall bandwidth of the three-way Doherty is inhibited.
The applicant finds, through theoretical analysis, that the approximate expression of the operating bandwidth of the quarter-wave line is:
wherein Δ f/f0Representing the relative bandwidth of the quarter-wave impedance transformation line;mis the maximum acceptable reflection coefficient; z0And ZLRepresenting the impedance values of the two ports; in order to increase Δ f/f0By decreasing Z0And ZLThe ratio of (a) to (b).
Referring to FIG. 2, a characteristic impedance of Z is shownTThe impedance transformation characteristic of the quarter-wavelength transmission line. The characteristic impedance obtained from FIG. 2 is ZTQuarter wave transmission ofThe input impedance of the line is
The impedance transformation ratio is defined as the ratio of the impedances of the input and output ports of the quarter-wave transmission line, i.e. the impedance transformation ratio
From the expression of the operating bandwidth of the quarter-wave transmission line, when Z is0And ZLThe closer the impedance value of (a), i.e., the smaller the impedance transformation ratio of the quarter-wavelength transmission line, the wider the operating bandwidth thereof. Therefore, to increase Δ f/f0By decreasing Z0And ZLI.e. the impedance transformation ratio k of the quarter-wave transmission line is reduced.
In order to overcome the defects of the prior art, the present application adopts a novel load modulation network, and as shown in fig. 1, the present invention provides a novel broadband three-way Doherty power amplifier, which comprises a three-way equipartition power divider, a carrier power amplification circuit, a first peak power amplification circuit, a second peak power amplification circuit and a novel load modulation network, wherein the three-way equipartition power divider is used for equipartiting the input power and respectively outputting the power to the carrier power amplification circuit, the first peak power amplification circuit and the second peak power amplification circuit, the output end of the carrier power amplification circuit is connected with a 86.6 ohm quarter-wavelength impedance converter T1 and is connected with the output ends of the first peak power amplification circuit and the second peak power amplification circuit for combining to output the power to a load;
the carrier power amplifying circuit comprises a carrier input matching circuit, a carrier power amplifier and a carrier output matching circuit which are sequentially connected in series, and the carrier output matching circuit is debugged to enable the load impedance of the carrier power amplifying circuit to be 150 ohms at low input power and 50 ohms at high input power; the first peak power amplifying circuit comprises a first peak input matching circuit, a first peak power amplifier and a first peak output matching circuit which are sequentially connected in series, the first peak output matching circuit is debugged to enable the load impedance of the first peak power amplifying circuit to be 150 ohms when the input power is high, and meanwhile, a first compensation line C1 is integrally arranged in the first peak output matching circuit to enable the load impedance of the first peak power amplifying circuit to be infinite when the input power is low; the second peak power amplifying circuit comprises a second peak input matching circuit, a second peak power amplifier and a second peak output matching circuit which are sequentially connected in series, the second peak output matching circuit is debugged to enable the load impedance of the second peak power amplifying circuit to be 150 ohms when the input power is high, and meanwhile, a second compensation line C2 is integrally arranged in the second peak output matching circuit to enable the load impedance of the second peak power amplifying circuit to be infinite when the input power is low. The novel load modulation network consists of a section of 86.6 ohm quarter wave impedance converter TI; the carrier amplifying circuit is connected with the first peak power amplifying circuit and the second peak power amplifying circuit through an 86.6 ohm impedance transformer TI and outputs power to a load in a combined way.
By adopting the technical scheme, the novel load modulation network is only composed of a section of 86.6 ohm quarter-wavelength impedance converter TI, so that the impedance transformation ratio of the load modulation network is reduced, and the size of the Doherty power amplifier is greatly reduced; meanwhile, a compensation line at the output end of the peak power amplifier is added into the peak output matching circuit, so that the technical defect that the compensation line of the traditional three-way Doherty power amplifier auxiliary branch is defined by a single central frequency point is overcome, the quality factor of the peak output matching circuit is greatly reduced, and the working bandwidth of the three-way Doerty is greatly widened.
In a preferred embodiment, the first compensation line C1 and the second compensation line C2 are both 150 ohms, and the compensation lines are added to make the load impedance of the first peak output matching circuit and the second peak power amplifying circuit infinite at low input power, and the 150 ohm compensation lines are used to further improve the performance at high input power since high input power is matched to 150 ohms.
The design principle of the above-described technical solution is further detailed below. Referring to fig. 3, there is shown a schematic diagram of the operation of the novel wideband three-way Doherty power amplifier of the present invention. Load ZLThe voltage on can be expressed as:
VL＝ZL(IC'+IP)
IP＝IP1+IP2
the output impedance of the two branches of the main branch and the auxiliary branch (the two auxiliary branches are classified into one branch) can be respectively expressed as:
the voltage-current relationship at two ends of the quarter-wavelength impedance transformation line at the output end of the carrier power amplifier is as follows:
VP·IC'＝VC·IC
wherein,
VP＝VP1＝VP2
then the process of the first step is carried out,
in addition, the quarter-wave impedance transformation line principle can be used to obtain:
according to VC＝IC·ZCThere is, in some cases,
wherein ZT＝86.6Ω，ZL＝50Ω。
When the input power is low, only the carrier power amplifier is turned on, all input signals are amplified by the carrier power amplifier, and the two paths of peak power amplifiers are completely turned off (I)P1＝IP20), the output impedance at low power of the carrier and peak power amplifiers can be expressed as:
ZP1,Low＝ZP2,Low＝∞
the impedance of the combining point in the low power state is 50 ohms.
When the input power reaches the maximum, the main and auxiliary power amplifiers are simultaneously saturated, the output power of the integral Doherty power amplifier is maximum, the output ends of the two paths of peak power amplifiers are matched to 150 ohms, namely Z is enabledP1,High＝ZP2,HighWhen the output end of the main power amplifier is matched to 50 ohms in a saturation state, the quarter-wavelength conversion line is converted from a 86.6 ohm quarter-wavelength impedance conversion line to 150 ohms, and the three 150 ohms are connected in parallel to obtain a combination point impedance of 50 ohms, namely, the combination point impedance is 50 ohms in low-power and high-power states. And because the load impedance of the output end of the Doherty integral combiner is 50 ohms, a quarter-wavelength transmission line does not need to be connected in series with the output end of the combiner, so that the Doherty working bandwidth is increased, and the layout area of the integral Doherty is reduced.
In a preferred embodiment, the front end of the first peak input matching circuit is further provided with a 50 ohm quarter wave phase delay line.
In a preferred embodiment, the front end of the second peak input matching circuit is further provided with a 50 ohm quarter wave phase delay line.
In a preferred embodiment, the carrier power amplifier is a class AB power amplifier, and the first peak power amplifier and the second peak power amplifier are class C power amplifiers.
In a preferred embodiment, the carrier power amplifier, the first peak power amplifier and the second peak power amplifier are implemented by transistors.
In order to overcome the defects of the prior art, the invention also provides a method for realizing the novel broadband three-way Doherty power amplifier, which is realized by the following steps:
the method comprises the following steps: debugging a standard AB type power amplifier as a carrier power amplifier, and debugging a carrier output matching circuit to ensure that the load impedance of the carrier power amplifying circuit is 150 ohms at low input power and 50 ohms at high input power;
step two: debugging a standard C-type power amplifier as a first peak power amplifier, and debugging a first peak output matching circuit to enable the load impedance of the first peak power amplifier circuit to be 150 ohms when the input power is high;
step three: debugging a standard C-type power amplifier as a second peak power amplifier, and debugging a second peak output matching circuit to enable the load impedance of the second peak power amplifier circuit to be 150 ohms when the input power is high;
step four: a first compensation line C1 is arranged in the first peak value output matching circuit, and the first peak value output matching circuit and the first compensation line C1 are integrally debugged, so that the load impedance of the first peak value power amplification circuit at the time of low input power is infinite; a second compensation line C2 is arranged in the second peak value output matching circuit, and the second peak value output matching circuit and the second compensation line C2 are integrally debugged, so that the load impedance of the second peak value power amplifying circuit at low input power is infinite; in the prior art, after an output matching circuit is designed, the compensation line is designed on the basis of not changing the matching circuit; the design method of the compensation line in the prior art leads to the fact that the compensation line is defined by a single central frequency point, and the quality factor of an output matching circuit is increased by adding the compensation line, so that the overall bandwidth of three paths of Doherty is suppressed. The output matching circuit and the compensation line are integrally set and debugged, and the compensation line is added into the peak output matching circuit to be used as the peak output matching circuit, so that the Q value of the peak output matching circuit is reduced, and the working bandwidth of the three-way Doherty power amplifier is greatly widened;
step five: debugging a novel load modulation network employing an 86.6 ohm quarter wavelength impedance transformer T1;
step six: the debugged carrier power amplifying circuit, the first peak power amplifying circuit, the second peak power amplifying circuit and the novel load modulation network are combined by adopting a three-way equal power divider to form a novel broadband three-way Doherty power amplifier, wherein the output end of the carrier power amplifying circuit is connected with one end of an impedance converter T1, the other end of the impedance converter T1 is connected with the output ends of the first peak power amplifying circuit and the second peak power amplifying circuit and is connected with one end of the load together, and the other end of the load is grounded.
Referring to fig. 4a and 4b, the relationship between the change of the real and imaginary parts of the load impedance at the saturation point (high power) and the back-off point (low power) of the main amplifier simulated under the conventional three-way Doherty scheme and the novel broadband three-way Doherty scheme of the invention with the frequency is shown, and it can be known from the diagrams of fig. 4a and 4b that the working bandwidth of the three-way Doherty power amplifier is greatly widened in the present invention.
The above description of the embodiments is only intended to facilitate the understanding of the method of the invention and its core idea. It should be noted that, for those skilled in the art, it is possible to make various improvements and modifications to the present invention without departing from the principle of the present invention, and those improvements and modifications also fall within the scope of the claims of the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A novel broadband three-way Doherty power amplifier is characterized by comprising a three-way equal power divider, a carrier power amplifying circuit, a first peak power amplifying circuit, a second peak power amplifying circuit and a novel load modulation network, wherein the three-way equal power divider is used for dividing input power into three parts and then respectively outputting the three parts to the carrier power amplifying circuit, the first peak power amplifying circuit and the second peak power amplifying circuit, and the output powers of the carrier power amplifying circuit, the first peak power amplifying circuit and the second peak power amplifying circuit are output to a load after passing through the novel load modulation network;
the impedance of the load is 50 ohms; the novel load modulation network adopts an impedance transformer T1 with a quarter wavelength of 86.6 ohms; the output end of the carrier power amplifying circuit is connected with one end of the impedance converter T1, the other end of the impedance converter T1 is connected with the output ends of the first peak power amplifying circuit and the second peak power amplifying circuit and is connected with one end of the load together, and the other end of the load is grounded;
the carrier power amplifying circuit comprises a carrier input matching circuit, a carrier power amplifier and a carrier output matching circuit which are sequentially connected in series, and the carrier output matching circuit is debugged to enable the load impedance of the carrier power amplifying circuit to be 150 ohms at low input power and 50 ohms at high input power; the first peak power amplifying circuit comprises a first peak input matching circuit, a first peak power amplifier and a first peak output matching circuit which are sequentially connected in series, the first peak output matching circuit is debugged to enable the load impedance of the first peak power amplifying circuit to be 150 ohms when the input power is high, and meanwhile, a first compensation line C1 is integrally arranged in the first peak output matching circuit to enable the load impedance of the first peak power amplifying circuit to be infinite when the input power is low; the second peak power amplifying circuit comprises a second peak input matching circuit, a second peak power amplifier and a second peak output matching circuit which are sequentially connected in series, the second peak output matching circuit is debugged to enable the load impedance of the second peak power amplifying circuit to be 150 ohms when the second peak power amplifying circuit is at high input power, and meanwhile, a second compensation line C2 is integrally arranged in the second peak output matching circuit to enable the load impedance of the second peak power amplifying circuit to be infinite when the second peak power amplifying circuit is at low input power.
2. The novel wideband three-way Doherty power amplifier according to claim 1, characterized in that said first compensation line C1 is 150 ohms.
3. The novel wideband three-way Doherty power amplifier according to claim 1, characterized in that said second compensation line C2 is 150 ohms.
4. The novel wideband three-way Doherty power amplifier of claim 1 wherein the front end of the first peak input matching circuit is further provided with a 50 ohm quarter wave phase delay line.
5. The novel wideband three-way Doherty power amplifier of claim 1 wherein the front end of the second peak input matching circuit is further provided with a 50 ohm quarter wave phase delay line.
6. The novel wideband three-way Doherty power amplifier of claim 1 wherein the carrier power amplifier is a class AB power amplifier and the first peaking power amplifier and the second peaking power amplifier are class C power amplifiers.
7. The novel wideband three-way Doherty power amplifier of claim 6, wherein the carrier power amplifier, the first peaking power amplifier and the second peaking power amplifier are all implemented with transistors.
8. A novel implementation method of a broadband three-way Doherty power amplifier is characterized by comprising the following steps:
debugging a standard AB type power amplifier as a carrier power amplifier, and debugging a carrier output matching circuit to ensure that the load impedance of the carrier power amplifying circuit is 150 ohms at low input power and 50 ohms at high input power;
debugging a standard C-type power amplifier as a first peak power amplifier, and debugging a first peak output matching circuit to enable the load impedance of the first peak power amplifier circuit to be 150 ohms when the input power is high;
debugging a standard C-type power amplifier as a second peak power amplifier, and debugging a second peak output matching circuit to enable the load impedance of the second peak power amplifier circuit to be 150 ohms when the input power is high;
a first compensation line C1 is arranged in the first peak value output matching circuit, and the first peak value output matching circuit and the first compensation line C1 are integrally debugged, so that the load impedance of the first peak value power amplification circuit at the time of low input power is infinite; a second compensation line C2 is arranged in the second peak value output matching circuit, and the second peak value output matching circuit and the second compensation line C2 are integrally debugged, so that the load impedance of the second peak value power amplifying circuit at low input power is infinite;
debugging a novel load modulation network employing an 86.6 ohm quarter wavelength impedance transformer T1;
the debugged carrier power amplifying circuit, the first peak power amplifying circuit, the second peak power amplifying circuit and the novel load modulation network are combined by adopting a three-way equal power divider to form a novel broadband three-way Doherty power amplifier, wherein the output end of the carrier power amplifying circuit is connected with one end of an impedance converter T1, the other end of the impedance converter T1 is connected with the output ends of the first peak power amplifying circuit and the second peak power amplifying circuit and is connected with one end of the load together, and the other end of the load is grounded.
9. The method of claim 8, wherein said first compensation line C1 and said second compensation line C2 are 150 ohms.
10. The method of claim 8, wherein a 50 ohm quarter wave phase delay line is provided at the front end of each of the first and second peaking input matching circuits.
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| CN111740703B (en) * | 2020-05-25 | 2024-04-05 | 杭州电子科技大学 | pseudo-Doherty self-input-control load modulation balance type power amplifier and implementation method thereof |
| CN112543002A (en) * | 2020-12-23 | 2021-03-23 | 杭州电子科技大学 | Broadband differential Doherty power amplifier and design method and application thereof |
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Application publication date: 20170215 Assignee: Simone Technology (Shanghai) Co., Ltd Assignor: HANGZHOU DIANZI University Contract record no.: X2020330000033 Denomination of invention: Broadband three-path Doherty power amplifier and implementation method thereof Granted publication date: 20190312 License type: Common License Record date: 20200511 |