CN108873527A - Array substrate, liquid crystal display panel, device and the method for preparing array substrate - Google Patents

Array substrate, liquid crystal display panel, device and the method for preparing array substrate Download PDF

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Publication number
CN108873527A
CN108873527A CN201810829381.2A CN201810829381A CN108873527A CN 108873527 A CN108873527 A CN 108873527A CN 201810829381 A CN201810829381 A CN 201810829381A CN 108873527 A CN108873527 A CN 108873527A
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Prior art keywords
layer
signal wire
polysilicon
array
array substrate
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CN201810829381.2A
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Chinese (zh)
Inventor
游利军
程才权
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Oppo Chongqing Intelligent Technology Co Ltd
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Oppo Chongqing Intelligent Technology Co Ltd
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Priority to CN201810829381.2A priority Critical patent/CN108873527A/en
Publication of CN108873527A publication Critical patent/CN108873527A/en
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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • G02F1/13629Multilayer wirings

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

This application discloses a kind of array substrates comprising array glass;Multiple signal wires are arranged at intervals on array glass;Basal layer is set to array glass equipped with signal wire side, and coats signal wire, and the position setting through slot that basal layer is opposite with signal wire;Polysilicon is formed in basal layer far from array glass side, and the first protrusion is formed on polysilicon, and the first protrusion is filled in through slot, so that polysilicon is connect with signal wire.Signal wire is formed in the bottom above, signal wire not with the neighbouring setting of scan line, and then without preparing inorganic insulation layer between signal wire and scan line, so that liquid crystal display panel is made thinner.The application also provides a kind of liquid crystal display panel including the above array substrate, the liquid crystal display device including the liquid crystal display panel and a kind of method for preparing array substrate.

Description

Array substrate, liquid crystal display panel, device and the method for preparing array substrate
Technical field
This application involves structure-design technique fields, more particularly to a kind of array substrate, liquid crystal display panel, liquid crystal Showing device and the method for preparing array substrate.
Background technique
Liquid crystal display panel, the array substrate of liquid crystal display panel are provided in the liquid crystal display devices such as mobile phone, IPad In include array glass, polysilicon, scan line, signal wire, inorganic insulation layer and organic planarization layer etc., there are many number of plies, cause The thickness of liquid crystal display panel is larger.
Summary of the invention
For the biggish technical problem of the LCD display plate thickness such as mobile phone, the application provides array substrate, liquid crystal display Panel, liquid crystal display device and the method for preparing array substrate.
The application use a technical solution be:A kind of array substrate is provided comprising:
Array glass;
Multiple signal wires are arranged at intervals on the array glass;
Basal layer is set to the array glass equipped with the signal wire side, and coats the signal wire setting, and institute State the basal layer position setting through slot opposite with the signal wire;
Polysilicon is formed in the basal layer far from array glass side, and it is convex that first is formed on the polysilicon Portion out, first protrusion is filled in the through slot, so that the polysilicon is connect with the signal wire.
The application also provides a kind of liquid crystal display panel comprising color membrane substrates, and opposite with the color membrane substrates set The array substrate as described above set.
The application also provides a kind of liquid crystal display device, including backlight and liquid crystal display panel as described above.
The application also provides a kind of method for preparing array substrate comprising:
An array glass is provided;
Spaced signal wire is formed on the array glass;
The signal wire side is equipped in the array glass and forms basal layer, and the basal layer is made to coat the signal Line, wherein the position formation through slot that the basal layer is opposite with the signal wire;
Polysilicon is formed far from array glass side in the basal layer, so that it is convex to form first on the polysilicon Portion out, first protrusion is filled in the through slot, so that the polysilicon is connect with the signal wire.
Multiple signal wires are arranged at intervals on array glass by the array substrate in the application, so that gate insulating layer coats Signal wire setting, polysilicon are arranged in gate insulating layer far from array glass side, and partially pass through gate insulating layer to reality Now it is connect with signal wire.Using this spline structure, signal wire is formed in the bottom, compared in the technical solution before improvement by signal The setting of line neighbor scanning line, while needing between signal and scan line that inorganic insulation layer is arranged and insulating.And in the application, Signal wire not with the neighbouring setting of scan line, and then without preparing inorganic insulation layer between signal wire and scan line, so that liquid LCD panel is made thinner.
Detailed description of the invention
In order to more clearly explain the technical solutions in the embodiments of the present application, make required in being described below to embodiment Attached drawing is briefly described, it should be apparent that, the drawings in the following description are only some examples of the present application, for For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other Attached drawing.
Fig. 1 is the structural schematic diagram in one embodiment of the application liquid crystal display device;
Fig. 2 is the structural schematic diagram in one embodiment of the application liquid crystal display panel;
Fig. 3 is the structural schematic diagram of array substrate in one embodiment of the application;
Fig. 4 is array substrate decomposed structural schematic diagram as shown in Figure 3;
Fig. 5 is the structural schematic diagram of array substrate before the application improves;
Fig. 6 is the method flow schematic diagram that array substrate is prepared in one embodiment of the application;
Fig. 7 is the method flow schematic diagram that array substrate is prepared in another embodiment of the application.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete Site preparation description.
Referenced herein " embodiment " is it is meant that a particular feature, structure, or characteristic described can wrap in conjunction with the embodiments It is contained at least one embodiment of the application.Each position in the description occur the phrase might not each mean it is identical Embodiment, nor the independent or alternative embodiment with other embodiments mutual exclusion.Those skilled in the art explicitly and Implicitly understand, embodiment described herein can be combined with other embodiments.
It is the structural schematic diagram in 300 1 embodiment of the application liquid crystal display device referring to Fig. 1 to Fig. 3, Fig. 1, Fig. 2 is this Apply for that the structural schematic diagram in 200 1 embodiment of liquid crystal display panel, Fig. 3 are array substrate 100 in one embodiment of the application Structural schematic diagram.This application provides a kind of array substrate 100, liquid crystal display panel 200, liquid crystal display panel 200 includes coloured silk Ilm substrate 210 and the array substrate 100 being oppositely arranged with color membrane substrates 210.Also providing a kind of includes backlight and the liquid crystal The liquid crystal display device 300 of display panel 200.The liquid crystal display device 300 can be any one of multiple electronic equipments, Multiple electronic equipments include but is not limited to cellular phone, smart phone, other wireless telecom equipments, personal digital assistant, audio Player, other media players, music recorder, video recorder, camera, other medium recorders, radio, medical treatment are set Standby, calculator, programmable remote control, pager, netbook computer, personal digital assistant (PDA), portable media player (PMP), Motion Picture Experts Group (MPEG-1 or MPEG-2) audio layer 3 (MP3) player, portable medical device and number Cameras and combinations thereof etc. include the equipment of display screen.The liquid crystal display panel 200 includes the battle array that following embodiment is illustrated Column substrate 100.
Battle array in order to preferably embody the inventive point of this case, and the technical effect that can be generated, before first introducing lower improve The structure of column substrate 100a.
Referring to Fig. 5, for the structural schematic diagram of array substrate 100a before improving, specifically, the array substrate 100a before improving Including be cascading array glass 10a, light shield layer 20a, basal layer 30a, polysilicon 40a, gate insulating layer 50a, sweep Retouch line 60a, the first inorganic insulation layer 70a, signal wire 80a, organic planarization layer 90a, common-battery body 110a, the second inorganic insulation layer 120a and pixel electrode 130a.
Specifically, needing to be arranged one layer of light shield layer 20a in order to avoid polysilicon 40a leakage current occurs in the case where illumination Blocked the backlight from array glass 10a far from the side polysilicon 40a.Light shield layer 20a is located at array glass 10a close to more The side crystal silicon 40a, and the orthographic projection in light shield layer 20a towards the direction polysilicon 40a covers polysilicon 40a, to guarantee light shield layer 20a Shaded effect.Specifically, the area of light shield layer 20a is less than the area of array glass 10a, therefore basal layer 30a is formed in battle array The column side glass 10a simultaneously coats light shield layer 20a setting, and the area of light shield layer 20a is more than or equal to the area of polysilicon 40a, with reality Existing all standing.
Polysilicon 40a is formed on basal layer 30a, is oppositely arranged with light shield layer 20a.Gate insulating layer 50a is formed in base On bottom 30a, and coat the polysilicon 40a being formed on basal layer 30a.Gate insulating layer 50a is far from the side array glass 10a Form scan line 60a.First inorganic insulation layer 70a is formed in gate insulating layer 50a far from the side array glass 10a, and coats Scan line 60a on gate insulating layer 50a is set.A plurality of signal wire 80a is formed in the first inorganic insulation layer 70a far from array The side glass 10a, and a part of every signal line 80a sequentially pass through the first inorganic insulation layer 70a and gate insulating layer 50a with Polysilicon 40a connection.Using this structure, signal wire 80a and the neighbouring setting of scan line 60a must be provided with therebetween first Inorganic insulation layer 70a is spaced apart, and avoids short circuit.
Organic planarization layer 90a is formed in the first inorganic insulation layer 70a far from the array side glass 10a and coats signal wire 80a is located at part of the first inorganic insulation layer 70a far from the side array glass 10a, to form flat surface.So as to organic Flatness layer 90a sequentially forms common-battery body 110a, the second inorganic insulation layer 120a and pixel electrode far from the side array glass 10a 130a.Specifically, organic planarization layer 90a forms common-battery body area 92a and non-common-battery body area 94a far from the array side glass 10a, In non-common-battery body area 94a be without distribution common-battery body 110a region.Pixel electrode 130a is formed towards the side array glass 10a Second protrusion 132a, the second protrusion 132a sequentially passes through being located at for the second inorganic insulation layer 120a and organic planarization layer 90a Position where non-common-battery body area 94a, finally connect with signal wire 80a.The second of common-battery body 110a and pixel electrode 130a is convex The interval portion 132a is arranged out, is separated by the second inorganic insulation layer 120a therebetween.
Using this structure, one layer of organic planarization layer 90a be only set between signal wire 80a and common-battery body 110a, the two it Between apart from very little.Simultaneously because signal wire 80a and common-battery body 110a are metal material, when work or the case where static electrification It is easy to therebetween down generate biggish coupling phenomenon, to influence the electrical stability of liquid crystal display panel 200, influences to show Show effect.
Improved structure, which can improve, in the application is easy to produce coupling influence between signal wire 80a and common-battery body 110a The problem of 200 display effect of liquid crystal display panel, while array substrate 100 being enabled to be made thinner.It is done below in conjunction with attached drawing Explanation in detail.
Referring also to Fig. 3 and Fig. 4, Fig. 3 are the structural schematic diagrams of array substrate 100 in one embodiment of the application, Fig. 4 be as 100 decomposed structural schematic diagram of array substrate shown in Fig. 3.Specifically, the improved array substrate 100 of the application include according to It is the secondary array glass 10 being stacked, signal wire 80, basal layer 30, polysilicon 40, gate insulating layer 50, scan line 60, organic Flatness layer 90, common-battery body 110, inorganic insulation layer 120 and pixel electrode 130.The improved knot of array substrate 100 in the application The array substrate 100a main distinction before structure is relatively improved is, signal wire 80 is accomplished the bottom, the i.e. direct shape of signal wire 80 It is arranged on array glass 10 far from scan line 60 and common-battery body 110, so that it is relatively improved the structure of preceding array substrate 100a, The first inorganic insulation layer 70a between signal wire 80 and scan line 60 can be omitted, so that array substrate 100 is made more It is thin.Simultaneously signal wire 80 is made on array glass 10 after so that signal wire 80 be relatively improved before structure, with common-battery body The distance between 110 increase, and then improve and be easy to produce asking for coupling influence display effect between power supply body 110 and signal wire 80 Topic.
Specifically, multiple signal wires 80 are arranged at intervals on array glass 10 in an embodiment, specifically, referring to Fig. 3, Signal wire 80 includes source electrode 82 and drain electrode 84, is provided separately between source electrode 82 and drain electrode 84 and is separated by a part of basal layer 30 It opens.Specifically, basal layer 30 is formed in array glass 10 close to 40 side of polysilicon, basal layer 30 include body part 32 and by Body part 32 protrudes out the interval body 34 to be formed towards 10 direction of array glass.Body part 32 is covered on array glass 10, and is wrapped Signal wire 80 is covered, and interval body 34 is located between the source electrode 82 of signal wire 80 and drain electrode 84 basal layer 30 and 80 phase of signal wire simultaneously Pair position through slot 36 is set, the through slot 36 for realizing polysilicon 40 and signal wire 80 connection, when work, the work of scan line 60 For the switch of polysilicon 40, polysilicon 40 is connected when scan line 60 has voltage, and 82 received signal of source electrode passes through polysilicon 40 are transferred to drain electrode 84, finally charge to pixel electrode 130.It should be understood that every scan line 60 is used as multiple polysilicons 40 Switch.In the present embodiment, light shield layer 20 and 80 same layer of signal wire are arranged, light shield layer 20 between two adjacent signal wires 80 it Between.Specifically, light shield layer 20 covers the channel of polysilicon 40 towards the orthographic projection in 40 direction of polysilicon, to be embodied as polysilicon 40 It blocks backlight and avoids the occurrence of photoelectric effect.Specifically, light shield layer 20 and the signal wire 80 of two sides are spaced setting, to keep away Exempt from two signal lines 80 and electrical connection is realized by light shield layer 20.Between light shield layer 20 and the source electrode 82 and drain electrode 84 of signal wire 80 There is the interval body 34 of basal layer 30 to separate.
In the present embodiment, light shield layer 20 and signal wire 80 use same material, are made for example, by using titanium aluminium titanium matter.This Sample enables to signal wire 80 and light shield layer 20 to be completed by same procedure, saves preparation process, time and cost.It is optional Ground, in other embodiments, signal wire 80 and light shield layer 20 can also use different materials, such as signal wire 80 to use molybdenum, shading Layer 20 uses aluminium or titanium aluminium titanium, this is not specifically limited.Optionally, in the present embodiment, the thickness of signal wire 80 and light shield layer 20 Spend identical, in other embodiments, the thickness of the two can also be variant, this is not specifically limited.
Polysilicon 40 is formed in basal layer 30 far from 10 side of array glass, and the first protrusion is formed on polysilicon 40 42, the first protrusion 42 is filled in through slot 36, so that polysilicon 40 is connect with signal wire 80.
Gate insulating layer 50 is formed on basal layer 30, and coats the polysilicon 40 being formed on basal layer 30.Grid is exhausted Edge layer 50 forms scan line 60 far from 10 side of array glass.Using this structure, by grid between scan line 60 and polysilicon 40 Pole insulating layer 50 is spaced apart, while across gate insulating layer 50, polysilicon 40 and base between scan line 60 and signal wire 80 Bottom 20, thus the application be relatively improved using the above structure before structure save one layer of inorganic insulation layer, that is, can save The first inorganic insulation layer 70a being arranged between scan line 60a and signal wire 80a before going structure to improve.Therefore can save again One of photoetching process heavy membrane process with together with, simplifies preparation process again, saves preparation time, save cost, while can make It obtains array substrate 100 and is made thinner.
Organic planarization layer 90 is formed in gate insulating layer 50 far from 10 side of array glass and coats scan line 60 and be located at grid Part of the pole insulating layer 50 far from 10 side of array glass, to form flat surface.So as in organic planarization layer 90 far from battle array 10 side of column glass sequentially forms common-battery body 110, inorganic insulation layer 120 and pixel electrode 130.Specifically, organic planarization layer 90 form common-battery body area 92 and non-common-battery body area 94 far from 10 side of array glass, wherein non-common-battery body area 94 is total without distribution The region of electric body.
Pixel electrode 130 forms the second protrusion 132 towards 10 side of array glass, and the second protrusion 132 sequentially passes through Positioned at the position in non-common-battery body area 94, gate insulating layer 50 and basal layer 30 in inorganic insulation layer 120, organic planarization layer 90 Part on signal wire 80 is finally connect with signal wire 80, and then is charged by the signal that signal wire 80 passes over, It is understood that every signal line 80 be correspondingly connected with multiple pixel electrodes 130, be only the partially schematic of liquid crystal display panel in Fig. 3 Figure, only shows a pixel electrode 130, is not limited.Between common-battery body 110 and the second protrusion 132 of pixel electrode 130 Every setting, separated by inorganic insulation layer 120 therebetween.Specifically, being located in inorganic insulation layer 120, organic planarization layer 90 non- Position, gate insulating layer 50 and the basal layer 30 in common-battery body area 94 form interconnected through-Penetration portion 122, pixel electrode 130 The second protrusion 132 wear through-Penetration portion 122 and be attached with signal wire 80.
In array substrate 100a before improvement, between signal wire 80a and common-battery body 110a only between one layer of organic planarization layer 90a It separates, is easy to produce coupling, influence the electrical stability of liquid crystal display panel 200.Using the above structure, the array base of the application Signal wire 80 is made in most beneath in plate 100, so that it is exhausted to form organic planarization layer 90, grid between signal wire 80 and common-battery body 110 Edge layer 50, polysilicon 40 and 30 4 layers of basal layer are obstructed.The coupling between signal wire 80 and common-battery body 110 is reduced, The potential stability of liquid crystal display panel 200 is improved, so that display effect is more preferable.In addition using the above structure, array substrate 100 only include one layer of inorganic insulation layer 120, the structure before being relatively improved, can save prepare light shield layer 20a and first it is inorganic absolutely The twice technique of edge layer 70a and time and material.Simultaneously because light shield layer 20 and 80 same layer of signal wire, and eliminate one layer of nothing Machine insulating layer, therefore the structure before being relatively improved enables to array substrate 100 to remove light shield layer 20a and the first inorganic insulation The thickness of layer 70a, so that array substrate 100 is made thinner.
The application also provides a kind of method for preparing array substrate, more than specific prepared array substrate 100 has The structure and function that each embodiment is introduced.Detail related with processing step is only introduced below.For the position between each component Relationship and connection relationship are set, hereafter without repeating one by one.
It is the flow diagram of this method in one embodiment of the application referring to Fig. 6, specific the method comprising the steps of 101- Step 104:
101:An array glass is provided.
Specific array glass is the bottom of array substrate, the carrier as carrying other layers and device.
102:Spaced signal wire is formed on array glass.
It, then again will by the technique of exposure development first in array glass side flood coating material in the present embodiment Should not region remove to form spaced a plurality of signal wire.
103:Signal wire side is equipped in array glass and forms basal layer, and makes basal layer cladding signal wire setting, wherein The basal layer position opposite with signal wire forms through slot.
Specifically, whole face coating or precipitating are formed after the material of basal layer, by substrate by way of exposure development Remove to form through slot in the layer position opposite with signal wire.
104:Polysilicon is formed far from array glass side in basal layer, so that the first protrusion is formed on polysilicon, the One protrusion is filled in through slot, so that polysilicon is connect with signal wire.
Whole face coating or precipitating form the material of polysilicon, the full production of filling naturally in the through slot of basal layer after formation The material of polysilicon, and then form protrusion and connect with signal wire.Then some materials are removed by way of exposure development, So that the material left is oppositely arranged with signal wire.
In another embodiment, step 102 further comprises:Spaced signal wire and shading are formed on array glass Layer, so that light shield layer is positioned at adjacent signal wire between, and the orthographic projection in light shield layer towards polysilicon direction covers polysilicon Channel.In the present embodiment, light shield layer and a plurality of signal wire are formed by same procedure, and light shield layer and signal wire are using same A kind of material is made, such as titanium aluminium titanium material.Specifically, the positional relationship of signal wire and shading, and the position with other component The embodiment for setting relationship structure as described above is consistent, this is not repeated.
Referring to Fig. 7, the flow diagram of another embodiment of method of array substrate is prepared for the application, this method includes step Rapid 201- step 208, the difference of the embodiment and a upper embodiment are also to sequentially form grid after the step of forming polysilicon Pole insulating layer, scan line, organic planarization layer, power supply body, inorganic insulation layer and pixel electrode.Wherein step 201-204 distinguishes Consistent with step 101-104 in a upper embodiment, this is without repeating.Specifically, the method for the embodiment includes:
201:An array glass is provided.
202:Spaced signal wire is formed on array glass.
203:Signal wire side is equipped in array glass and forms basal layer, and makes basal layer cladding signal wire setting, wherein The basal layer position opposite with signal wire forms through slot.
204:Polysilicon is formed far from array glass side in basal layer, so that the first protrusion is formed on polysilicon, the One protrusion is filled in through slot, so that polysilicon is connect with signal wire.
205:Gate insulating layer is formed far from array glass side in basal layer, so that gate insulating layer coats polysilicon.
Specifically, the forming step of gate insulating layer is similar with the forming method of basal layer, this is not repeated.Different places It is, the position part opposite with signal wire etches away on gate insulating layer, forms through-Penetration portion.
206:Scan line is formed far from array glass side in gate insulating layer, so that scan line is towards perpendicular to array glass The orthographic projection of side is overlapped with a part of polysilicon, and is spaced apart by gate insulating layer.
Specifically, the forming step of scan line is similar with the forming method of signal wire, this is not repeated.
207:Organic flatness layer, common-battery body and inorganic insulation are sequentially formed far from array glass side in gate insulating layer Layer, and organic planarization layer, inorganic insulation layer, gate insulating layer and basal layer are respectively formed interconnected through-Penetration portion.
Specifically, the step of sequentially forming the gate insulating layer of organic flatness layer, common-battery body and inorganic insulation layer is similar, It is whole face coating or deposited material, finally unwanted Partial exposure develops and etches removal.Wherein inorganic insulation layer with Through-Penetration portion is formed in organic planarization layer, it should be noted that form common-battery body area and non-common-battery body area in organic planarization layer, pass through Portion is worn across the non-common-battery body region.It should be understood that the through-Penetration portion formed in each layer is interconnected.
208:Pixel electrode is formed on inorganic insulation layer, so that forming second towards array glass side on pixel electrode Protrusion, the second protrusion pass through through-Penetration portion and connect with signal wire.
Specifically.The formation process of pixel electrode and the formation process of polysilicon are similar.Whole face coating or precipitating first The material of pixel electrode is formed, fills the material for completely making pixel electrode after being formed in the through-Penetration portion of above each layer naturally, into And the second protrusion is formed, so that the second protrusion is connect with signal wire.
The foregoing is merely presently filed embodiments, are not intended to limit the scope of the patents of the application, all to utilize this Equivalent structure or equivalent flow shift made by application specification and accompanying drawing content, it is relevant to be applied directly or indirectly in other Technical field similarly includes in the scope of patent protection of the application.

Claims (14)

1. a kind of array substrate, which is characterized in that including:
Array glass;
Multiple signal wires are arranged at intervals on the array glass;
Basal layer is set to the array glass equipped with the signal wire side, and coats the signal wire, and the basal layer Through slot is arranged in the position opposite with the signal wire;
Polysilicon is formed in the basal layer far from array glass side, and forms the first protrusion on the polysilicon, First protrusion is filled in the through slot, so that the polysilicon is connect with the signal wire.
2. array substrate according to claim 1, which is characterized in that further include the shading with signal wire same layer setting Layer, the orthographic projection in the light shield layer towards the polysilicon direction cover the channel of the polysilicon.
3. array substrate according to claim 2, which is characterized in that the light shield layer is same material with the signal wire Matter.
4. array substrate according to claim 3, which is characterized in that the signal wire using titanium, aluminium, metal alloy or One of titanium aluminium titanium material is made.
5. array substrate according to claim 2, which is characterized in that the signal wire is identical as the light shield layer thickness.
6. according to the described in any item array substrates of claim 3-5, which is characterized in that the cross section of the signal wire is rectangular Shape, the cross section of the polysilicon include matrix part and with the integrally formed protrusion of matrix part.
7. array substrate according to claim 1, which is characterized in that further include being formed in the basal layer far from array glass The gate insulating layer of glass side, and it is formed in scan line of the gate insulating layer far from polysilicon side, the grid is exhausted Edge layer coats the polysilicon, and the scan line is oppositely arranged with the polysilicon, and is spaced apart by the gate insulating layer.
8. array substrate according to claim 7, which is characterized in that further include the organic planarization layer being cascading, Common-battery body, inorganic insulation layer and pixel electrode, and the organic planarization layer, the inorganic insulation layer, the gate insulating layer And basal layer is respectively formed interconnected through-Penetration portion, wherein the organic planarization layer is formed in the gate insulating layer far from institute Array glass side is stated, and coats the scan line, the second protrusion is set on the pixel electrode, second protrusion is worn It crosses the through-Penetration portion to connect with the signal wire, the second protrusion of the common-battery body and the pixel electrode is by described inorganic exhausted Edge layer is spaced apart setting.
9. a kind of liquid crystal display panel, which is characterized in that including color membrane substrates, and with the color membrane substrates be oppositely arranged as The described in any item array substrates of claim 1-8.
10. a kind of liquid crystal display device, which is characterized in that including backlight and liquid crystal display panel as claimed in claim 9.
11. a kind of method for preparing array substrate, which is characterized in that including:
An array glass is provided;
Spaced signal wire is formed on the array glass;
The signal wire side is equipped in the array glass and forms basal layer, and the basal layer is made to coat the signal wire, Wherein the basal layer position opposite with the signal wire forms through slot;
Polysilicon is formed far from array glass side in the basal layer, so that forming the first protrusion on the polysilicon Portion, first protrusion is filled in the through slot, so that the polysilicon is connect with the signal wire.
12. the method for preparation array substrate according to claim 11, which is characterized in that further include:
It is described to include the step of forming spaced signal wire on the array glass:
Form spaced signal wire and light shield layer on the array glass so that light shield layer be located at adjacent signal wire it Between, and the orthographic projection in the light shield layer towards the polysilicon direction covers the channel of the polysilicon.
13. the method for preparation array substrate according to claim 11, which is characterized in that further include:
Gate insulating layer is formed far from array glass side in basal layer, so that gate insulating layer coats the polysilicon;
Scan line is formed far from array glass side in the gate insulating layer, so that the scan line is towards perpendicular to described The orthographic projection of array glass side is overlapped with a part of the polysilicon, and is spaced apart by the gate insulating layer.
14. the method for preparation array substrate according to claim 13, which is characterized in that further include:
Organic flatness layer, common-battery body and inorganic insulation layer, and institute are sequentially formed far from array substrate side in gate insulating layer It states organic planarization layer, the inorganic insulation layer, the gate insulating layer and basal layer and is respectively formed interconnected through-Penetration portion;
Pixel electrode is formed on the inorganic insulation layer, so that forming second towards array glass side on pixel electrode Protrusion, second protrusion pass through the through-Penetration portion and connect with the signal wire.
CN201810829381.2A 2018-07-25 2018-07-25 Array substrate, liquid crystal display panel, device and the method for preparing array substrate Pending CN108873527A (en)

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