CN108847654B - A kind of shutdown of PFM synchronous boost DC-DC converter and protection circuit - Google Patents
A kind of shutdown of PFM synchronous boost DC-DC converter and protection circuit Download PDFInfo
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- CN108847654B CN108847654B CN201810671229.6A CN201810671229A CN108847654B CN 108847654 B CN108847654 B CN 108847654B CN 201810671229 A CN201810671229 A CN 201810671229A CN 108847654 B CN108847654 B CN 108847654B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/10—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers
- H02H7/12—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers
- H02H7/1213—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for converters; for rectifiers for static converters or rectifiers for DC-DC converters
Abstract
A kind of shutdown of PFM synchronous boost DC-DC converter and protection circuit; setting enables true breaking circuit and short-circuit protection circuit; including maximum potential selection circuit, PMOS tube MP substrate electric potential selection circuit and starting and short-circuit protection circuit; PMOS tube MP substrate electric potential selection circuit is according to the logical signal V_control of input; high current potential is connected with PMOS tube MP substrate in selection power adaptor side LX and output VOUT; it realizes in enabled shutdown or output short-circuit, inputs between VBAT and output VOUT and really disconnect.When the output VOUT short circuit grounding of starting and short-circuit protection circuit or when starting state is less than input VBAT; its grid for exporting control PMOS tube MP, makes the electric current setting value of PMOS tube MP, the fixed short circuit current when exporting VOUT short circuit; it realizes short-circuit protection, avoids damage synchronous rectification PMOS tube MP.
Description
Technical field
The present invention relates to power adapter, the shutdown of especially a kind of PFM synchronous boost DC-DC converter and protection electricity
Road.
Background technique
PFM synchronous boost formula DC-DC converter is since with high efficiency, transient response is good, peripheral circuit is simple, to periphery
The advantages that circuit interference is small is used widely in handheld device and portable product, but synchronous boost DC-DC converter
The characteristics of due to system loop and integrated synchronous rectification PMOS tube body parasitism forward diode, make its in enabled shutdown input with
There is also accesses between output, export current potential and follow input current potential, cannot achieve the function of enabled really shutdown output, so that whole
There is also losses in enabled shutdown for a system.In addition output short-circuit to ground when, input ground between path resistance it is low, shape
At high current and synchronous rectification PMOS tube easy to damage.It is achieved that really enabled turn off output function, effectively extend battery work
Make the time, and realize short-circuit protection function in output short-circuit, improves application reliability, be conventional synchronization boost DC-DC needs
It solves the problems, such as.
Traditional PFM synchronous boost DC-DC converter is as shown in Figure 1, include peripheral components inductance L, input capacitance CIN, defeated
Capacitor CO, feedback resistance RFB1, RFB2 and load resistance R outLOAD, chip interior includes reference voltage VR, Vb generation circuit, makes
It can control circuit EN, oscillator OSC, error comparator EA, control logic circuit PFM, synchronous drive circuit Driver, current limliting electricity
Road Ilimit, power NMOS tube MN, synchronous rectification PMOS tube MP and sampling resistor RS;The positive input terminal of current-limiting circuit Ilimit connects
It connects the source electrode of power NMOS tube MN and is grounded by sampling resistor RS, the negative input end of current-limiting circuit Ilimit connects reference voltage
The drain electrode of the drain electrode connection synchronous rectification PMOS tube MP of Vb, NMOS tube MN and the energy end of convert LX of inductance L, the input of inductance L
End connection PFM synchronous boost DC-DC converter input VBAT simultaneously be grounded by input capacitance CIN, the grid of NMOS tube MN with
The output of the grid connection synchronous drive circuit Driver of synchronous rectification PMOS tube MP, the source electrode conduct of synchronous rectification PMOS tube MP
The output VOUT connection VDD of PFM synchronous boost DC-DC converter.
The working principle of Fig. 1: the output VOUT of PFM synchronous boost DC-DC converter is divided through feedback resistance RFB1, RFB2
The reverse input end that sampled voltage FB is connected to error comparator EA, the non-inverting input terminal linker of error comparator EA are obtained afterwards
The output of quasi- voltage VR, error amplifier EA and the output of oscillator OSC and the output of current-limiting circuit Ilimit connect simultaneously
To logic control circuit PFM, the output frequency of control logic circuit PFM is adjusted, the duty ratio of frequency shift pulse, logic are passed through
The output of control circuit PFM controls leading for power switch tube MN and synchronous rectifier MP by synchronous drive circuit Driver respectively
Clearance is disconnected, to change duty ratio, so that the output VOUT of PFM synchronous boost DC-DC converter be made to reach pressure stabilizing.
When enabled EN is connected to external cut-off signals, the shutdown chip interior modules work of EN circuit output is enabled, simultaneously
Shutdown switch NMOS tube MN and synchronous rectification PMOS tube MP, but by parasitic diode positive between power tube PMOS MP drain-source
The influence of Dio, energy end of convert LX connect this parasitic diode Dio and output VOUT between there are access, inductance L DC characteristics
Equivalent low-resistance can not turn off so there are through paths between input VBAT and output VOUT, so that output VOUT voltage can be with
With the input VBAT voltage parasitic diode Dio forward conduction voltage drop value that subtracts one, if there are also loads to exist at this time, will continue to disappear
Consume the more multi input VBAT energy content of battery.In addition if output short-circuit, due to the access between above-mentioned input VBAT and output VOUT
In the presence of, and this via resistance is low, Short-Circuit High Current flows through positive parasitic diode Dio between synchronous rectification PMOS tube MP drain-source
When, it will cause synchronous rectification PMOS tube MP permanent damage.
Summary of the invention
To solve the problems, such as that enabled true shutdown and short-circuit protection, the present invention of tradition PFM synchronous boost DC-DC converter provide
A kind of enabled true shutdown of PFM synchronous boost DC-DC converter and short-circuit protection circuit, can be realized it is enabled really turn off it is defeated
The function and short-circuit protection enter, exported, battery consumption and short-circuit protection when reducing enabled shutdown, improves application reliability energy.
In order to achieve the above object, the technical solution adopted by the present invention is that: a kind of pass of PFM synchronous boost DC-DC converter
Disconnected and protection circuit, PFM synchronous boost DC-DC converter include peripheral components inductance L, input capacitance CIN, output capacitance CO,
Feedback resistance RFB1, RFB2 and load resistance RLOAD, chip interior includes reference voltage VR, Vb generation circuit, makes to can control electricity
Road EN, oscillator OSC, error comparator EA, control logic circuit PFM, synchronous drive circuit Driver, current-limiting circuit
Ilimit, power NMOS tube MN, synchronous rectification PMOS tube MP and sampling resistor RS;The positive input terminal of current-limiting circuit Ilimit connects
The source electrode of power NMOS tube MN is simultaneously grounded by sampling resistor RS, and the negative input end of current-limiting circuit Ilimit connects reference voltage
The drain electrode of the drain electrode connection synchronous rectification PMOS tube MP of Vb, NMOS tube MN and the energy end of convert LX of inductance L, the input of inductance L
End connection PFM synchronous boost DC-DC converter input VBAT simultaneously be grounded by input capacitance CIN, the grid of NMOS tube MN with
The output of the grid connection synchronous drive circuit Driver of synchronous rectification PMOS tube MP, the source electrode conduct of synchronous rectification PMOS tube MP
The output VOUT connection VDD of PFM synchronous boost DC-DC converter;The output VOUT of PFM synchronous boost DC-DC converter is through anti-
The reverse input end that sampled voltage FB is connected to error comparator EA, error comparator are obtained after feed resistance RFB1, RFB2 partial pressure
The non-inverting input terminal of EA connects reference voltage VR, the output of error comparator EA and the output and current-limiting circuit of oscillator OSC
The output of Ilimit is connected to logic control circuit PFM simultaneously, adjusts the output frequency of control logic circuit PFM, logic control
The output of circuit PFM is closed by the conducting that synchronous drive circuit Driver controls power switch tube MN and synchronous rectifier MP respectively
It is disconnected, to change duty ratio, so that the output VOUT of PFM synchronous boost DC-DC converter be made to reach pressure stabilizing;
True breaking circuit and short-circuit protection circuit are enabled it is characterized by: being arranged, including VDD maximum potential selection circuit,
Synchronous rectification PMOS tube MP substrate electric potential selection circuit and starting and short-circuit protection circuit;VDD maximum potential selection circuit compares
The input VBAT and output VOUT current potential of PFM synchronous boost DC-DC converter, an output of VDD maximum potential selection circuit
Output logic signal V_control is held, another output will input VBAT and export current potential high in VOUT as output
VDD_M, to enable control circuit EN, reference voltage VR, Vb generation circuit, oscillator OSC, current-limiting circuit Ilimit, error ratio
It powers compared with device EA, control logic circuit PFM, synchronous drive circuit Driver and starting and short-circuit protection circuit;Synchronous rectification
One input terminal of PMOS tube MP substrate electric potential selection circuit connects logical signal V_control, second input terminal connection electricity
Feel energy end of convert LX, that is, synchronous rectification PMOS tube MP drain electrode of L, third input terminal connects synchronous rectification PMOS tube MP's
Source electrode, that is, PFM synchronous boost DC-DC converter output VOUT, the output of synchronous rectification PMOS tube MP substrate electric potential selection circuit
Connect the substrate of synchronous rectification PMOS tube MP;Two input terminals of starting and short-circuit protection circuit are separately connected output VOUT and patrol
Signal V_control is collected, starting and the output of short-circuit protection circuit connect the grid of synchronous rectification PMOS tube MP;
Synchronous rectification PMOS tube substrate electric potential selection circuit is controlled according to the logical signal V_control of input, selection electricity
The current potential for feeling high in the energy end of convert LX and output VOUT of L is connected with synchronous rectification PMOS tube substrate, to avoid synchronous rectification
PMOS tube MP stationary parasitism diode Dio bring influences, and realizes input VBAT and output in enabled shutdown or output short-circuit
It is really disconnected between VOUT;Starting and short-circuit protection circuit input VOUT current potential and logical signal V_control current potential, work as output
When VOUT short circuit grounding or when starting state is less than input VBAT current potential, starting and short-circuit protection circuit work, output control
The grid of synchronous rectification PMOS tube MP processed makes the electric current setting value of synchronous rectification PMOS tube MP, constant-current charge when realizing starting;
The fixed short circuit current when exporting VOUT short circuit, effectively realization short-circuit protection, avoid damage synchronous rectification PMOS tube MP.
The VDD maximum potential selection circuit includes current source ib1, NMOS tube N1, N2 and N3, PMOS tube P1, P2, P3,
P4, P5 and P6, resistance R1, NOT gate I1, I3, I5, I7 and I9, NAND gate I2 and I4, nor gate I6 and I8;Current source ib1's is defeated
Enter end connection input VBAT and PMOS tube P1 source electrode and substrate, current source ib1 output end connection NMOS tube N1 drain electrode and
The grid of the grid and NMOS tube N3 of grid and NMOS tube N2, the source electrode and substrate of NMOS tube N1, N2 and N3 are grounded, NMOS
The grid of the grid of the drain electrode connection PMOS tube P1 of pipe N2 and drain electrode and PMOS tube P2, the source electrode and substrate interconnection of PMOS tube P2
And VOUT, the drain electrode of the drain electrode connection NMOS tube N3 of PMOS tube P2 and the input terminal of NOT gate I1 are exported by resistance R1 connection, it is non-
An input terminal of the output end connection NAND gate I2 of door I1, another input terminal of NAND gate I2 connect enabled control circuit EN
Output signal EN_control, NAND gate I2 output end connection NOT gate I3 input terminal, NOT gate I3 output logic signal V_
Control;The grid of the drain electrode connection PMOS tube P4 of PMOS tube P3 and the grid connection PMOS for connecting input VBAT, PMOS tube P3
The drain electrode of pipe P4 simultaneously connects output VOUT, the source electrode and substrate of PMOS tube P3 and the source electrode of PMOS tube P4 and substrate and PMOS tube
The substrate of P5 and the substrate of PMOS tube P6 link together, and the source electrode of PMOS tube P5 and the source electrode of P6 interconnect and export VDD_M,
The grid connection or non-of drain electrode connection the output VOUT, PMOS tube P5 of drain electrode connection the input VBAT, PMOS tube P6 of PMOS tube P5
The output end of door I6, the output end of the grid connection NOT gate I9 of PMOS tube P6, an input terminal of nor gate I6 connect NOT gate I5
Output end, another input terminal of nor gate I6 connects logical signal V_Control, and the input terminal of NOT gate I5 connects NAND gate
The input terminal connection of the output end of I4, NAND gate I4 makes to can control signal EN_control, and another of NAND gate I4 is defeated
Enter an input terminal of end connection nor gate I8 and connect logical signal V_Control, another input terminal connection of nor gate I8 is non-
The output end of door I7, the input terminal connection of NOT gate I7 make to can control signal EN_control, and the output end connection of nor gate I8 is non-
The input terminal of door I9, the grid of the output end connection PMOS tube P6 of NOT gate I9.
The synchronous rectification PMOS tube MP substrate electric potential selection circuit include NOT gate I10, I11, I13, I14, I16, I17,
I18, I19 and I20, nor gate I12 and I15, PMOS tube P7, P8 and P9;The input terminal of NOT gate I10 connects logical signal V_
The input terminal connection of control, NOT gate I11 make to can control signal EN_control, and the output end of NOT gate I10 connects nor gate
An input terminal of I12, another input terminal of the output end connection nor gate I12 of NOT gate I11 and one of nor gate I15
The input terminal of input terminal and NOT gate I20, the input terminal of the output end connection NOT gate I13 of nor gate I12, the output end of NOT gate I13
Connect the input terminal of NOT gate I14, the input of another input terminal and NOT gate I19 of the output end connection nor gate I15 of NOT gate I14
End, the input terminal of the output end connection NOT gate I16 of nor gate I15, the input terminal of the output end connection NOT gate I17 of NOT gate I16 are non-
The input terminal of the output end connection NOT gate I18 of door I17, the grid of the output end connection PMOS tube P8 of NOT gate I18, NOT gate I19's
Output end connects the grid of PMOS tube P7, the grid of the output end connection PMOS tube P9 of NOT gate I20, the drain electrode connection of PMOS tube P7
The substrate and drain electrode connection VDD_M of drain electrode connection the output VOUT, PMOS tube P9 of energy the end of convert LX, PMOS tube P8 of inductance L,
The drain electrode of the source electrode and substrate, the source electrode and substrate and PMOS tube P9 of PMOS tube P8 of PMOS tube P7 links together and connects same
The substrate of step rectification PMOS tube MP.
The starting and short-circuit protection circuit include current source ib2, NMOS tube N4, N5 and N6, PMOS tube P10, P11 and
P12, transmission gate I23, NOT gate I22, NAND gate I21;Current source ib2 input terminal connection VDD_M and PMOS tube P12 source electrode and
Substrate, the drain and gate of the output end connection NMOS tube N4 of current source ib2 and the grid and NMOS tube N6 of NMOS tube N5
Grid, the source electrode and substrate of the source electrode and substrate of NMOS tube N4, the source electrode of NMOS tube N5 and substrate and NMOS tube N6 connect
Ground, the drain and gate of the drain electrode connection PMOS tube P10 of NMOS tube N5 and the grid of PMOS tube P11, the source electrode of PMOS tube P10
Output VOUT is connected with substrate, the source electrode of PMOS tube P11 connects the drain electrode of PMOS tube P12 with substrate, and the drain electrode of PMOS tube P11 connects
Connect the drain electrode of the grid, NMOS tube N6 of PMOS tube P12 and the input terminal of transmission gate I23, two input terminals difference of NAND gate I21
It connects logical signal V_ocntrol and makes to can control signal EN_control, the I21 output end connection NOT gate I22's of NAND gate
C-end (PMOS tube grid in transmission gate circuit) of input terminal and transmission gate, the C of the output end connection transmission gate I23 of NOT gate I22
It holds (NMOS tube grid in transmission gate circuit), the grid of the output end connection synchronous rectification PMOS tube MP of transmission gate I23.
Really lead between shutdown input VBAT and output VOUT the invention has the following advantages and beneficial effects: realizing
Road, and realize output short circuit protection function, shutdown time province's battery power consumption is enabled, application reliability improves.
Detailed description of the invention
Fig. 1 is prior art PFM synchronous pressure-boosting converter;
Fig. 2 is PFM synchronous pressure-boosting converter of the present invention with true shutdown and short-circuit protection function;
Fig. 3 is synchronous rectification PMOS tube substrate electric potential selection circuit isoboles in Fig. 2;
Fig. 4 is a kind of maximum potential selection circuit in Fig. 2 (VDD Max) implementing circuit;
Fig. 5 is a kind of implementation electricity of synchronous rectification PMOS tube substrate electric potential selection circuit (Backgate Control) in Fig. 2
Road;
Fig. 6 is starting and a kind of short-circuit protection circuit (START&Short Pro) implementing circuit in Fig. 2.
Specific embodiment
As shown in Fig. 2, enabling true breaking circuit and short-circuit protection circuit 100 includes: VDD maximum potential selection circuit (VDD
Max) 101, synchronous rectification PMOS tube MP substrate electric potential selection circuit (Backgate Control) 109, starting and short-circuit protection
Circuit (START&Short Pro) 111;VDD maximum potential selection circuit (VDD Max) 101 compare input current potential VBAT with it is defeated
Current potential VOUT out selects power supply of the highest transmission output VDD_M as internal other modules in VABT current potential and VOUT current potential
Power supply, and comparison result output logic signal V_control, logical signal V_control are input to synchronous rectification PMOS tube MP
Highest in substrate electric potential selection circuit (Backgate Control) 111, control selections energy end of convert LX and output end VOUT
Current potential is connected with the substrate Bo of synchronous rectification PMOS tube MP.
Be illustrated in figure 3 synchronous rectification PMOS tube MP substrate electric potential selection circuit (Backgate Control) 109 etc.
Effect figure.The parasitic diode situation of synchronous rectification PMOS tube MP of the present invention is different from traditional scheme, when VBAT current potential is greater than VOUT
When current potential, the substrate electric potential Bo of synchronous rectification PMOS tube MP is co-energy end of convert LX current potential, parasitic diode such as Dio2 at this time, when
When VBAT current potential is less than VOUT current potential, the substrate electric potential Bo of synchronous rectification PMOS tube MP is same to export VOUT current potential, at this time parasitism two
Pole pipe such as Dio1 thus breaks synchronous whole between energy conversion LX and output VOUT in original conventional boost DC-DC scheme
Flowing PMOS tube MP stationary parasitism forward diode Dio influences, effectively realize in enabled shutdown or output short-circuit input VBAT with
It is really disconnected between output VOOUT;Starting and short-circuit protection circuit (START&Short Pro) 109 input VOUT current potential and patrol
Signal V_control is collected, when VOUT short circuit grounding or when starting state is less than VBAT current potential, starting and short-circuit protection circuit
The electric current of (START&Short Pro) output control synchronous rectification PMOS tube MP grid Pg, PMOS tube MP are setting value, when starting
Can constant-current charge, export VOUT short circuit when can fix short circuit current, effectively realization short-circuit protection, prevent synchronous rectification PMOS tube MP
Damage.Work normally the reference voltage VR generation circuit that partial circuit (identical as prior art Fig. 1) includes: chip interior
102, enable control circuit (EN) 103, oscillator (OSC) 104, error comparator (EA) 106, PFM control logic circuit 107,
Synchronous drive circuit (Driver) 108, current-limiting circuit (Ilimit) 105, power switch NMOS tube (MN) 112, synchronous rectification
PMOS tube (MP) 110 and sampling resistor (RS) 113;Peripheral components inductance (L) 114, input capacitance (CIN) 115, output capacitance
(CO) 119, feedback resistance (RFB1) 116, (RFB2) 117 and load LOAD120;It works normally principle and synchronizes liter with tradition PFM
Pressure converter, output voltage VO FB connection error after resistor network RFB1, RFB2 sampling put the anti-phase input of comparator EA
End, error comparator EA non-inverting input terminal connection reference circuit provide reference voltage VR, the output of error comparator EA with
Oscillator OSC exports while being input to PFM logic control circuit 107, the synchronous driving of the output control of PFM logic control circuit 107
Driver controls the conducting of power switch tube MN and synchronous rectifier MP, to change duty ratio, to control output voltage
VOUT。
As shown in figure 4, maximum potential selection circuit (VDD Max) 101 includes: current offset current source ib1, NMOS tube
N1, N2, N3, PMOS tube P1, P2, P3, P4, P5, P6, NOT gate I1, I3, I7, I9, I5, NAND gate I2, I4, nor gate I6;NMOS
Pipe N2, N3 and NMOS tube N1 equal proportion mirror image bias current form common gate current mirror with size PMOS tube P1, P2, this knot
Structure compares the substrate and source current potential of PMOS tube P1, P2, respectively VBAT and VOUT, comparison result and makes to can control signal EN_
Control comprehensively control exports logic V_control, compares output result: when VOUT current potential is less than VBAT current potential, output is patrolled
Collecting V_control is " 0 ", when VOUT current potential is greater than VBAT current potential, logic V_control is exported at this time and makes to can control signal
EN_control is identical, enable signal EN_control if it is " 0 ", output logic V_control be " 0 ", enable signal EN_
Control if it is " 1 ", output logic V_control be " 1 ";PMOS tube P3, P4 built-up circuit structure realize selection VBAT with
Maximum potential selects between VOUT, this structure is not controlled simply by enabled output, but load capacity is weaker, so by electric below
Maximum potential selection between VBAT and VOUT is continued to realize in road, and is exported and controlled by enabled EN_control, and there is certain band to carry
The VDD of ability, VDD=Max { VBAT, VOUT }.
As shown in figure 5, synchronous rectification PMOS tube MP substrate electric potential selection circuit (Backgate Control) 109 includes:
NOT gate I10, I11, I13, I14, I16, I17, I18, I19, I20, nor gate I12, I15, PMOS tube P7, P8, P9 input VBAT
With VOUT comparative structure output logic signal V_control and make to can control signal EN_control, when making to can control signal EN_
Control is " 0 " when, PMOS tube substrate electric potential Bo=VDD=Max { VBAT, VOUT };When enable signal EN_control is "
When 1 ", PMOS tube MP substrate electric potential Bo=Max { LX, VOUT } is realized under any working condition of PMOS tube MP substrate electric potential Bo
It is connected with maximum potential.
As shown in fig. 6, starting and short-circuit protection circuit (START&Short Pro) 111 include: current offset current source
Ib2, NMOS tube N4, N5, N6, PMOS tube P10, P11, P12, transmission gate I23, phase inverter I22, NAND gate I21 enable logic letter
When number EN_control is 1, and when VOUT current potential is less than VBAT current potential or VOUT short circuit, transmission gate is opened, current offset setting
Controllable setting PMOS tube P12 grid potential, exports the grid that Pg current potential connects synchronous rectification PMOS tube MP by transmission gate, has
The electric current of synchronous rectification PMOS tube MP, prevents the damage in short-circuit condition when effect is set in starting state and short-circuit condition.It is detached from
After short-circuit protection state or normal starting, when VOUT is greater than VBAT, transmission gate is closed in figure, the grid of synchronous rectification PMOS tube MP
No longer by this circuit control.
Claims (3)
1. shutdown and the protection circuit of a kind of PFM synchronous boost DC-DC converter, PFM synchronous boost DC-DC converter includes outer
Peripheral device inductance L, input capacitance CIN, output capacitance CO, feedback resistance RFB1, RFB2 and load resistance RLOAD, chip interior packet
Include reference voltage VR, Vb generation circuit, enabled control circuit EN, oscillator OSC, error comparator EA, control logic circuit
PFM, synchronous drive circuit Driver, current-limiting circuit Ilimit, power NMOS tube MN, synchronous rectification PMOS tube MP and sampling resistor
RS;The source electrode of the positive input terminal connection power NMOS tube MN of current-limiting circuit Ilimit is simultaneously grounded, current limliting electricity by sampling resistor RS
The negative input end of road Ilimit connects reference voltage Vb, the drain electrode of the drain electrode connection synchronous rectification PMOS tube MP of NMOS tube MN and electricity
Feel the input VBAT of the input terminal connection PFM synchronous boost DC-DC converter of energy the end of convert LX, inductance L of L and passes through input
Capacitor CIN ground connection, the grid of NMOS tube MN connect the defeated of synchronous drive circuit Driver with the grid of synchronous rectification PMOS tube MP
Out, output VOUT of the source electrode of synchronous rectification PMOS tube MP with substrate as PFM synchronous boost DC-DC converter connects VDD;
The output VOUT of PFM synchronous boost DC-DC converter obtains sampled voltage FB after feedback resistance RFB1, RFB2 partial pressure and is connected to
The non-inverting input terminal of the reverse input end of error comparator EA, error comparator EA connects reference voltage VR, error comparator EA
Output and oscillator OSC output and current-limiting circuit Ilimit output simultaneously be connected to logic control circuit PFM, adjust
The output of the output frequency of control logic circuit PFM, logic control circuit PFM is controlled respectively by synchronous drive circuit Driver
The conducting of power switch tube MN and synchronous rectifier MP turn off, to change duty ratio, so that PFM synchronous boost DC-DC be made to convert
The output VOUT of device reaches pressure stabilizing;
It is characterized by: setting enables true breaking circuit and short-circuit protection circuit, including VDD maximum potential selection circuit, synchronization
Rectify PMOS tube MP substrate electric potential selection circuit and starting and short-circuit protection circuit;It is same that VDD maximum potential selection circuit compares PFM
Walk the input VBAT and output VOUT current potential of boost DC-DC converter, the output end output of VDD maximum potential selection circuit
Logical signal V_control, another output will input VBAT and export current potential high in VOUT as output VDD_M, be
Enabled control circuit EN, reference voltage VR, Vb generation circuit, oscillator OSC, current-limiting circuit Ilimit, error comparator EA, control
Logic circuit PFM, synchronous drive circuit Driver, starting and short-circuit protection circuit power supply processed;Synchronous rectification PMOS tube MP substrate
One input terminal of current potential selection circuit connects logical signal V_control, the energy conversion of second input terminal connection inductance L
LX, that is, synchronous rectification PMOS tube MP drain electrode is held, source electrode, that is, PFM that third input terminal connects synchronous rectification PMOS tube MP is synchronous
The output of the output VOUT of boost DC-DC converter, synchronous rectification PMOS tube MP substrate electric potential selection circuit connect synchronous rectification
The substrate of PMOS tube MP;Two input terminals of starting and short-circuit protection circuit are separately connected output VOUT and logical signal V_
The grid of the output connection synchronous rectification PMOS tube MP of control, starting and short-circuit protection circuit;
Synchronous rectification PMOS tube substrate electric potential selection circuit is controlled according to the logical signal V_control of input, selects inductance L's
High current potential is connected with synchronous rectification PMOS tube substrate in energy end of convert LX and output VOUT, to avoid synchronous rectification PMOS tube
MP stationary parasitism diode Dio bring influences, and realizes in enabled shutdown or output short-circuit, input VBAT and output VOUT it
Between really disconnect;Starting and short-circuit protection circuit input VOUT current potential and logical signal V_control current potential, when output VOUT is short
When road is grounded or when starting state is less than input VBAT current potential, starting and short-circuit protection circuit work, and output control synchronizes
The grid for rectifying PMOS tube MP makes the electric current setting value of synchronous rectification PMOS tube MP, constant-current charge when realizing starting;Work as output
Fixed short circuit current when VOUT short circuit, effectively realization short-circuit protection, avoid damage synchronous rectification PMOS tube MP;
The VDD maximum potential selection circuit includes current source ib1, NMOS tube N1, N2 and N3, PMOS tube P1, P2, P3, P4, P5
And P6, resistance R1, NOT gate I1, I3, I5, I7 and I9, NAND gate I2 and I4, nor gate I6 and I8;The input terminal of current source ib1 connects
Connect input VBAT and PMOS tube P1 source electrode and substrate, current source ib1 output end connection NMOS tube N1 drain and gate with
And NMOS tube N2 grid and NMOS tube N3 grid, the source electrode and substrate of NMOS tube N1, N2 and N3 be grounded, NMOS tube N2's
The grid of the grid of drain electrode connection PMOS tube P1 and drain electrode and PMOS tube P2, the source electrode and substrate interconnection of PMOS tube P2 simultaneously pass through
Resistance R1 connection exports VOUT, the drain electrode of the drain electrode connection NMOS tube N3 of PMOS tube P2 and the input terminal of NOT gate I1, NOT gate I1's
Output end connects an input terminal of NAND gate I2, and another input terminal of NAND gate I2 connects the output of enabled control circuit EN
The input terminal of the output end connection NOT gate I3 of signal EN_control, NAND gate I2, NOT gate I3 output logic signal V_
Control;The grid of the drain electrode connection PMOS tube P4 of PMOS tube P3 and the grid connection PMOS for connecting input VBAT, PMOS tube P3
The drain electrode of pipe P4 simultaneously connects output VOUT, the source electrode and substrate of PMOS tube P3 and the source electrode of PMOS tube P4 and substrate and PMOS tube
The substrate of P5 and the substrate of PMOS tube P6 link together, and the source electrode of PMOS tube P5 and the source electrode of P6 interconnect and export VDD_M,
The grid connection or non-of drain electrode connection the output VOUT, PMOS tube P5 of drain electrode connection the input VBAT, PMOS tube P6 of PMOS tube P5
The output end of door I6, the output end of the grid connection NOT gate I9 of PMOS tube P6, an input terminal of nor gate I6 connect NOT gate I5
Output end, another input terminal of nor gate I6 connects logical signal V_Control, and the input terminal of NOT gate I5 connects NAND gate
The input terminal connection of the output end of I4, NAND gate I4 makes to can control signal EN_control, and another of NAND gate I4 is defeated
Enter an input terminal of end connection nor gate I8 and connect logical signal V_Control, another input terminal connection of nor gate I8 is non-
The output end of door I7, the input terminal connection of NOT gate I7 make to can control signal EN_control, and the output end connection of nor gate I8 is non-
The input terminal of door I9, the grid of the output end connection PMOS tube P6 of NOT gate I9.
2. shutdown and the protection circuit of PFM synchronous boost DC-DC converter according to claim 1, it is characterised in that: institute
State synchronous rectification PMOS tube MP substrate electric potential selection circuit include NOT gate I10, I11, I13, I14, I16, I17, I18, I19 and
I20, nor gate I12 and I15, PMOS tube P7, P8 and P9;The input terminal of NOT gate I10 connects logical signal V_control, NOT gate
The input terminal connection of I11 makes to can control signal EN_control, an input of the output end connection nor gate I12 of NOT gate I10
End, another input terminal of the output end connection nor gate I12 of NOT gate I11 and an input terminal and NOT gate of nor gate I15
The input terminal of I20, the input terminal of the output end connection NOT gate I13 of nor gate I12, the output end connection NOT gate I14's of NOT gate I13
Input terminal, another input terminal of the output end connection nor gate I15 of NOT gate I14 and the input terminal of NOT gate I19, nor gate I15's
Output end connects the input terminal of NOT gate I16, the input terminal of the output end connection NOT gate I17 of NOT gate I16, the output end of NOT gate I17
The input terminal of NOT gate I18, the grid of the output end connection PMOS tube P8 of NOT gate I18 are connected, the output end of NOT gate I19 connects PMOS
The energy of the grid of pipe P7, the grid of the output end connection PMOS tube P9 of NOT gate I20, the drain electrode connection inductance L of PMOS tube P7 turns
The drain electrode connection output VOUT of end LX, PMOS tube P8 are changed, the substrate of PMOS tube P9 connects VDD_M, the source of PMOS tube P7 with source electrode
The drain electrode of pole and substrate, the source electrode of PMOS tube P8 and substrate and PMOS tube P9 links together and connects synchronous rectification PMOS tube
The substrate of MP.
3. shutdown and the protection circuit of PFM synchronous boost DC-DC converter according to claim 1, it is characterised in that: institute
It states starting and short-circuit protection circuit includes current source ib2, NMOS tube N4, N5 and N6, PMOS tube P10, P11 and P12, transmission gate
I23, NOT gate I22, NAND gate I21;The source electrode and substrate of the input terminal connection VDD_Max and PMOS tube P12 of current source ib2, electricity
The drain and gate of output end connection NMOS tube N4 of stream source ib2 and the grid of the grid of NMOS tube N5 and NMOS tube N6,
The source electrode and substrate of the source electrode and substrate of NMOS tube N4, the source electrode of NMOS tube N5 and substrate and NMOS tube N6 are grounded,
NMOS tube N5 drain electrode connection PMOS tube P10 drain and gate and PMOS tube P11 grid, the source electrode of PMOS tube P10 and
Substrate connection output VOUT, the source electrode of PMOS tube P11 connect the drain electrode of PMOS tube P12, the drain electrode connection of PMOS tube P11 with substrate
The drain electrode of the grid, NMOS tube N6 of PMOS tube P12 and the input terminal of transmission gate I23, two input terminals of NAND gate I21 connect respectively
It meets logical signal V_co ntrol and makes to can control signal EN_control, the I21 output end connection NOT gate I22's of NAND gate is defeated
Enter the C of end and transmission gateˉEnd is PMOS tube grid in transmission gate circuit, the C-terminal of the output end connection transmission gate I23 of NOT gate I22
NMOS tube grid i.e. in transmission gate circuit, the grid of the output end connection synchronous rectification PMOS tube MP of transmission gate I23.
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CN110098832B (en) * | 2019-04-30 | 2020-10-09 | 中国科学院上海微系统与信息技术研究所 | DCDC conversion circuit for starting double-output at ultralow voltage and implementation method thereof |
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CN117749158B (en) * | 2024-02-19 | 2024-04-19 | 北京中天星控科技开发有限公司成都分公司 | Anti-backflow protection circuit for power failure of interface chip |
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