CN108832903A - The low noise amplifier chip and front end amplification module, RF Receiving Device - Google Patents
The low noise amplifier chip and front end amplification module, RF Receiving Device Download PDFInfo
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- CN108832903A CN108832903A CN201810589748.8A CN201810589748A CN108832903A CN 108832903 A CN108832903 A CN 108832903A CN 201810589748 A CN201810589748 A CN 201810589748A CN 108832903 A CN108832903 A CN 108832903A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/189—High frequency amplifiers, e.g. radio frequency amplifiers
- H03F3/19—High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
Abstract
The present invention relates to a kind of the low noise amplifier chip and front end amplification modules, RF Receiving Device, wherein, the low noise amplifier chip includes first port, first order amplifying circuit, intervalve matching circuit, second level amplifying circuit, voltage offset electric circuit, electric power bias circuit and second port；First port is connect with the input terminal of first order amplifying circuit；The output end of first order amplifying circuit is connect by intervalve matching circuit with the input terminal of second level amplifying circuit, and output end is connect with second port；One end of voltage offset electric circuit is connect with the ground terminal of second level amplifying circuit, and the other end is connect with the input terminal of first order amplifying circuit；One end of electric power bias circuit is connect with second port, and the other end is connect with the output end of first order amplifying circuit；First port is as signal input part；Second port is used as signal output end and power source supply end simultaneously.Above-mentioned the low noise amplifier chip only needs to design using two-port, it is not easy to by external interference.
Description
Technical field
The present invention relates to electronic circuit technology fields, amplify mould more particularly to a kind of the low noise amplifier chip and front end
Block, RF Receiving Device.
Background technique
Low-noise amplifier is a very important portion in the application such as Modern wireless communication, radar, electronic warfare system
Point, it is usually used in the front end amplification module of radio-frequency receiving system, inhibits noise jamming while amplified signal, improves the spirit of system
Sensitivity.If connecting high performance low-noise amplifier in the front end of the system of reception, in the case where amplifier gain is sufficiently large,
It can suppress the noise of late-class circuit, then the noise coefficient for entirely receiving system depends primarily on the noise of amplifier.If low
The noise coefficient of noise amplifier reduces, and the noise coefficient for receiving system can also become smaller, and signal-to-noise ratio is then improved, and sensitivity is big
It is big to improve.It can be seen that the performance of low-noise amplifier constrains the entire performance for receiving system, for entirely receiving system
The raising of technical level also plays conclusive effect.Traditional low-noise amplifier is needed using more external-connected port, from
And it is easy by external interference.
Summary of the invention
Based on this, it is necessary to need for traditional the low noise amplifier chip using more external-connected port, be easy by
The problem of to external interference, provides a kind of the low noise amplifier chip and front end amplification module, RF Receiving Device.
A kind of the low noise amplifier chip, including first port, first order amplifying circuit, intervalve matching circuit, the second level
Amplifying circuit, voltage offset electric circuit, electric power bias circuit and second port；The first port and first order amplification electricity
The input terminal on road connects；The output end of the first order amplifying circuit is amplified by the intervalve matching circuit and the second level
The input terminal of circuit connects；The output end of the second level amplifying circuit is connect with the second port；The voltage bias electricity
The one end on road is connect with the ground terminal of the second level amplifying circuit；The other end of the voltage offset electric circuit and the first order
The input terminal of amplifying circuit connects；One end of the electric power bias circuit is connect with the second port；The source bias electricity
The other end on road is connect with the output end of the first order amplifying circuit；The first port is as signal input part；Described
Two-port netwerk is used as signal output end and power source supply end simultaneously.
Above-mentioned the low noise amplifier chip shares second port by inputting a signal into end and power source supply end, and leads to
Bias voltage of the overvoltage biasing circuit by the output of second level amplifying circuit as first order amplifying circuit, passes through source bias
The power supply that circuit inputs second port realizes that first order amplifying circuit and the second level are put as the power supply of first order amplifying circuit
The power sharing of big circuit.Therefore, above-mentioned the low noise amplifier chip only needs to design using two-port, it is not easy to by
External interference, and simplify subsequent debug circuit design and test and debugging is facilitated to work.
The electric power bias circuit includes first resistor in one of the embodiments,；One end of the first resistor with
The second port connection；The other end of the first resistor is connect with the output end of the first order amplifying circuit.
The voltage offset electric circuit includes second resistance, 3rd resistor and the 4th resistance in one of the embodiments,；Institute
The ground terminal for stating second level amplifying circuit, which is connected, to be grounded after the 3rd resistor and the 4th resistance；The one of the second resistance
End is connect with the input terminal of the first order amplifying circuit；The other end of the second resistance is connected to the 3rd resistor and
The common end of four resistance.
The first order amplifying circuit cascades inductor degeneration circuit knot using common source in one of the embodiments,
Structure；The second level amplifying circuit uses common source amplification circuit structure.
The first order amplifying circuit includes the first transistor and the first inductance in one of the embodiments,；Described
Input terminal of the grid of one transistor as the first order amplifying circuit；First described in the source series of the first transistor
It is grounded after inductance；Ground terminal of the ground terminal of first inductance as the first order amplifying circuit；The first transistor
Output end of the drain electrode as the first order amplifying circuit；
The second level amplifying circuit includes second transistor；The grid of the second transistor is put as the second level
The input terminal of big circuit；Output end of the drain electrode of the second transistor as the second level amplifying circuit；Described second is brilliant
Ground terminal of the source electrode of body pipe as the second level amplifying circuit.
It in one of the embodiments, further include by-pass unit；One end of the by-pass unit and the second transistor
Source electrode connection；The other end of the by-pass unit is grounded.
The first transistor and the second transistor are the high electricity of GaAs pseudomorphic crystal shape in one of the embodiments,
Transport factor transistor.
It in one of the embodiments, further include input matching unit and output matching unit；The input matching unit
One end connect with the first port, input of the other end also with the first order amplifying circuit of the input matching unit
End connection；One end of the output matching unit is connect with the output end of the second level amplifying circuit；The output matching is single
The other end of member is connect with the second port.
A kind of front end amplification module, including input matching circuit, the low noise amplifier chip and output matching circuit；Institute
Input matching circuit is stated to connect with the first port of the low noise amplifier chip；The output matching circuit and the low noise
The second port of acoustic amplifier chip connects；The low noise amplifier chip is the low noise as described in aforementioned any embodiment
Amplifier chip.
A kind of RF Receiving Device, including rf signal reception module and front end amplification module；The rf signal reception
Module is connect with the front end amplification module；The front end amplification module is front end amplification module as in the foregoing embodiment.
Detailed description of the invention
Fig. 1 is the structural block diagram of the low noise amplifier chip in an embodiment；
Fig. 2 is the structural block diagram of the low noise amplifier chip in another embodiment；
Fig. 3 is the circuit diagram of the low noise amplifier chip in an embodiment；
Fig. 4 is the curve graph of the input matching factor S11 of the low noise amplifier chip in embodiment illustrated in fig. 3；
Fig. 5 is the curve graph of the output matching factor S22 of the low noise amplifier chip in embodiment illustrated in fig. 3；
Fig. 6 is the curve graph of the isolation S12 of the low noise amplifier chip in Fig. 3；
Fig. 7 is the curve graph of the gain S21 of the low noise amplifier chip in Fig. 3；
Fig. 8 is the Minimum noises coefficients NFmin's and actual noise coefficient nf (2) of the low noise amplifier chip in Fig. 3
Simulation result diagram；
Fig. 9 is the Simulation of stability result figure of the low noise amplifier chip in Fig. 3；
Figure 10 is the circuit block diagram of the front end amplification module in an embodiment；
Figure 11 is the circuit diagram of the front end amplification module in an embodiment.
Specific embodiment
In order to make the objectives, technical solutions, and advantages of the present invention clearer, with reference to the accompanying drawings and embodiments, right
The present invention is further elaborated.It should be appreciated that the specific embodiments described herein are merely illustrative of the present invention, and
It is not used in the restriction present invention.
Fig. 1 is the structural block diagram of the low noise amplifier chip in an embodiment, which can use
In the front end amplification module of radio-frequency receiving system, to realize the enhanced processing of the radiofrequency signal arrived to front end receiver.In this reality
It applies in example, above-mentioned the low noise amplifier chip work can also be referred to as Ku band low noise amplifier core in Ku frequency range
Piece.The frequency of Ku frequency range is protected by international relevant laws, Ku frequency range downlink from 10.7GHz to 12.75GHz, uplink from
12.75GHz arriving 18.1GHz.
Referring to Fig. 1, which includes first port P1, first order amplifying circuit 110, interstage matched electricity
Road 120, second level amplifying circuit 130, voltage offset electric circuit 140, electric power bias circuit 150 and second port P2.Wherein,
Single port P1 is connect with the input terminal of first order amplifying circuit 110.The output end of first order amplifying circuit 110 passes through interstage matched
Circuit 120 is connect with the input terminal of second level amplifying circuit 130.The ground terminal of first order amplifying circuit 110 is grounded.It puts the second level
The output end of big circuit 130 is connect with second port P2.The ground terminal and voltage offset electric circuit 140 of second level amplifying circuit 130
Connection, and be grounded by voltage offset electric circuit 140.Voltage offset electric circuit 140 also connects with the input terminal of first order amplifying circuit 110
It connects.One end of electric power bias circuit 150 and second port P2, namely connect with the output end of second level amplifying circuit 130, it is another
End is then connect with the output end of first order amplifying circuit 110.In the present embodiment, first port P1 is as signal input part, and
Two-port netwerk P2 is used as signal output end and power source supply end simultaneously.
Above-mentioned the low noise amplifier chip shares second port P2 by inputting a signal into end and power source supply end, and
Bias voltage by voltage offset electric circuit 140 by the output of second level amplifying circuit 130 as first order amplifying circuit 110,
The power supply for being inputted second port P2 by electric power bias circuit 150 is as the power supply of first order amplifying circuit 110, to realize
The power sharing of first order amplifying circuit 110 and second level amplifying circuit 130.Therefore, above-mentioned the low noise amplifier chip only needs
It to be designed using two-port (P1, P2), it is not easy to by external interference.And it, can be with after chip is using two-port design
Simplify subsequent encapsulation design and PCB application design, subsequent debugging cycle can be shortened, and simplifies subsequent debug circuit design and side
Just test and debugging works.
In one embodiment, above-mentioned the low noise amplifier chip further includes input matching unit 160 and output matching unit
170, as shown in Figure 2.Wherein, input matching unit 160 is connected to the input terminal of first port P1 and first order amplifying circuit 110
Between.Output matching unit 170 is then connected between second port P2 and the output end of second level amplifying circuit 130.Input
With unit 160 and output matching unit 170 for realizing the impedance matching output and input, to optimize entire amplifier chip
Performance.
Fig. 3 is the circuit diagram of the low noise amplifier chip in an embodiment.Referring to Fig. 3, in the present embodiment, electricity
Source biasing circuit includes first resistor R1.One end of first resistor R1 is connect with second port P2, and the other end is then put with the first order
The output end connection of big circuit.It is appreciated that can also include other electricity in electric power bias circuit in other examples
Resistance or other impedors.It is defeated after being divided the supply voltage at second port P2 by electric power bias circuit
Out to the output end of first order amplifying circuit, the power sharing of two-stage amplifying circuit is realized, it is not necessary that corresponding power supply is respectively set
Port.It is shared by internal electric source, it is possible to reduce the power supply cabling in chip, stability are preferable.
In one embodiment, voltage offset electric circuit includes second resistance R2,3rd resistor R3 and the 4th resistance R4.Wherein,
It is grounded after the ground terminal series connection 3rd resistor R3 and the 4th resistance R4 of second level amplifying circuit.One end of second resistance R2 passes through defeated
Enter match circuit to connect with the input terminal of first order amplifying circuit.In one embodiment, input matching circuit includes the second inductance
L2.Second inductance L2 is connected on the input terminal of first port P1 and first order amplifying circuit.
In one embodiment, first order amplifying circuit cascades inductor degeneration circuit structure using common source.Specifically,
Level-one amplifying circuit includes the first transistor T1 and the first inductance L1, referring to Fig. 3.The grid of the first transistor T1 is as the first order
The input terminal of amplifying circuit, output end of the drain electrode of the first transistor T1 as first order amplifying circuit, the first transistor T1's
It is grounded after the first inductance of source series L1.Ground terminal of the ground terminal of first inductance L1 as first order amplifying circuit.First electricity
L1 is felt as source negative feedback inductor.In one embodiment, the first transistor T1 is that GaAs pseudomorphic crystal shape high electron mobility is brilliant
Body pipe (GaAs PHEMT).
In one embodiment, intervalve matching circuit includes third inductance L3.Third inductance L3 is connected to the first transistor T1
Drain electrode, and connect with the input terminal of second level amplifying circuit.
Second level amplifying circuit is common source amplification circuit structure comprising second transistor T2.The grid of second transistor T2
Input terminal of the pole as second level amplifying circuit.Ground terminal of the source electrode of second transistor T2 as second level amplifying circuit,
That is it is grounded after its 3rd resistor R3 and the 4th resistance R4 that connects.The drain electrode of second transistor T2 is as the defeated of second level amplifying circuit
Outlet.It in one embodiment, further include by-pass unit.By-pass unit includes first capacitor C1.One end of first capacitor C1 connects
In the source electrode of second transistor T2, other end ground connection.First capacitor C1 is as shunt capacitance.Wherein, second transistor T2 is same
Using GaAs pseudomorphic crystal shape high electron mobility transistor (GaAs PHEMT).The first transistor T1 and second in the present embodiment
Transistor T2 can be prepared using 0.25 micron of GaAs technique.
In one embodiment, output matching circuit includes the 4th inductance L4 and the second capacitor C2.Wherein, the 4th inductance L4
One end is connect with the drain electrode of second transistor T2, and the other end of the 4th inductance L4 is then connect with second port P2.4th inductance L4
It also connects and is grounded after the second capacitor C2 in the one end being connect with second port P2.
In one embodiment, a length of 600 microns of the domain of above-mentioned the low noise amplifier chip, width are 426 microns, and thickness is
100 microns.
The working band of the low noise amplifier chip in embodiment illustrated in fig. 3 be 10GHz~13GHz, stability compared with
Good, the coefficient of stability can be greater than 1, and circuit meets unconditional stability.Also, inductor degeneration circuit is cascaded by using common source
Lesser noise coefficient may be implemented as first order amplifying circuit in structure, and second level amplifying circuit can then provide biggish
Gain.
The advantages of the low noise amplifier chip in above-described embodiment, is described further below with reference to effect picture.Fig. 4
For the curve graph of the input matching factor S11 of the low noise amplifier chip in embodiment illustrated in fig. 3.It can be seen from the figure that
S11 is below -10dB in the operating frequency range of the low noise amplifier chip namely its input matching can satisfy requirement.
Fig. 5 is the curve graph of the output matching factor S22 of the low noise amplifier chip in embodiment illustrated in fig. 3.It can from figure
Out, S22 is below -9dB namely its output matching in the operating frequency range of the low noise amplifier chip and can satisfy and want
It asks, so that the noise of entire the low noise amplifier chip is less than or equal to 1.5dB.Fig. 6 is the low noise amplifier chip in Fig. 3
The curve graph of isolation S12.It will be seen from figure 6 that its S12 is respectively less than -31dB, requirement on devices equally can satisfy.Fig. 7 is
The curve graph of the gain S21 of the low noise amplifier chip in Fig. 3.It can be seen from figure 7 that its in frequency range have compared with
High gain can reach 20dB or more.Fig. 8 is the Minimum noises coefficients NFmin and reality of the low noise amplifier chip in Fig. 3
The simulation result diagram of border noise coefficient nf (2).As can be seen from Figure 8, practical noise coefficient nf (2) relatively make an uproar by minimum
Sonic system number NFmin, that is to say, the bright adjusting by match circuit and matching unit, noise have reached minimum substantially.Fig. 9 is
The Simulation of stability result figure of the low noise amplifier chip in Fig. 3.It can be seen in figure 9 that its coefficient of stability is all larger than 1,
I.e. circuit meets unconditional stability.
A kind of front end amplification module is also provided in one embodiment of the invention.The front end amplification module includes input matching circuit
210, the low noise amplifier chip 220 and output matching circuit 230, as shown in Figure 10.Wherein, the low noise amplifier chip
220 can use the low noise amplifier chip in any of the preceding embodiments.Input matching circuit 210 and low-noise amplifier core
The first port of piece 220 connects, and output matching circuit 230 is connect with the second port of the low noise amplifier chip 220.In this reality
It applies in example, output matching circuit 210 and output matching circuit 230 are used to the input of chip exterior, output matching.Input matching
Circuit 210 and output matching circuit 230 can be using the match circuits being commonly made of capacitor and inductor.
In one embodiment, above-mentioned front end amplification module further includes inputting capacitance Cin and output capacitance Cout,
As shown in figure 11.Cin can prevent direct current signal from entering transistor to cause to damage, and be equivalent in radiofrequency signal input short
Road, CL can prevent direct current signal from entering load to cause to damage, and be equivalent to short circuit in radiofrequency signal input.
Referring to Figure 11, in the present embodiment, second crystalline substance of the power supply VCC by second port P2 into second level amplifying circuit
Body pipe T2 is powered, and realizes two-stage by R2~R3 in the resistance R1 and voltage offset electric circuit in electric power bias circuit
Amplifying circuit power sharing.Therefore, the low noise amplifier chip 220 only needs to do two-port design and can satisfy the use demand,
It is not readily susceptible to external interference, and simplifies subsequent debug circuit design and test and debugging is facilitated to work.
One embodiment of the invention also provides a kind of RF Receiving Device comprising rf signal reception module and front end amplification
Module.Wherein, which can be using the front end amplification module in previous embodiment.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously
It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art
It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to protection of the invention
Range.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (10)
1. a kind of the low noise amplifier chip, which is characterized in that including first port, first order amplifying circuit, interstage matched electricity
Road, second level amplifying circuit, voltage offset electric circuit, electric power bias circuit and second port；The first port and described the
The input terminal of level-one amplifying circuit connects；The output end of the first order amplifying circuit by the intervalve matching circuit with it is described
The input terminal of second level amplifying circuit connects；The output end of the second level amplifying circuit is connect with the second port；It is described
One end of voltage offset electric circuit is connect with the ground terminal of the second level amplifying circuit；The other end of the voltage offset electric circuit with
The input terminal of the first order amplifying circuit connects；One end of the electric power bias circuit is connect with the second port；It is described
The other end of electric power bias circuit is connect with the output end of the first order amplifying circuit；The first port is inputted as signal
End；The second port is used as signal output end and power source supply end simultaneously.
2. the low noise amplifier chip according to claim 1, which is characterized in that the electric power bias circuit includes first
Resistance；One end of the first resistor is connect with the second port；The other end of the first resistor is put with the first order
The output end connection of big circuit.
3. the low noise amplifier chip according to claim 1, which is characterized in that the voltage offset electric circuit includes second
Resistance, 3rd resistor and the 4th resistance；The ground terminal series connection 3rd resistor of the second level amplifying circuit and the described 4th
It is grounded after resistance；One end of the second resistance is connect with the input terminal of the first order amplifying circuit；The second resistance
The other end is connected to the common end of the 3rd resistor and the 4th resistance.
4. the low noise amplifier chip according to claim 1, which is characterized in that the first order amplifying circuit is using altogether
Source electrode cascades inductor degeneration circuit structure；The second level amplifying circuit uses common source amplification circuit structure.
5. the low noise amplifier chip according to claim 4, which is characterized in that the first order amplifying circuit includes the
One transistor and the first inductance；Input terminal of the grid of the first transistor as the first order amplifying circuit；Described
It is grounded after first inductance described in the source series of one transistor；The ground terminal of first inductance amplifies electricity as the first order
The ground terminal on road；Output end of the drain electrode of the first transistor as the first order amplifying circuit；
The second level amplifying circuit includes second transistor；The grid of the second transistor amplifies electricity as the second level
The input terminal on road；Output end of the drain electrode of the second transistor as the second level amplifying circuit；The second transistor
Ground terminal of the source electrode as the second level amplifying circuit.
6. according to right want 5 described in the low noise amplifier chip, which is characterized in that further include by-pass unit；The bypass is single
One end of member is connect with the source electrode of the second transistor；The other end of the by-pass unit is grounded.
7. according to right want 5 described in the low noise amplifier chip, which is characterized in that the first transistor and described second brilliant
Body pipe is GaAs pseudomorphic crystal shape high electron mobility transistor.
8. the low noise amplifier chip according to claim 1, which is characterized in that further include input matching unit and output
Matching unit；One end of the input matching unit is connect with the first port, and the other end of the input matching unit is also
It is connect with the input terminal of the first order amplifying circuit；One end of the output matching unit and the second level amplifying circuit
Output end connection；The other end of the output matching unit is connect with the second port.
9. a kind of front end amplification module, which is characterized in that including input matching circuit, the low noise amplifier chip and output
With circuit；The input matching circuit is connect with the first port of the low noise amplifier chip；The output matching circuit
It is connect with the second port of the low noise amplifier chip；The low noise amplifier chip is as claim 1~8 is any
The low noise amplifier chip.
10. a kind of RF Receiving Device, which is characterized in that including rf signal reception module and front end amplification module；It is described to penetrate
Frequency signal receiving module is connect with the front end amplification module；The front end amplification module is front end as claimed in claim 9
Amplification module.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810589748.8A CN108832903A (en) | 2018-06-08 | 2018-06-08 | The low noise amplifier chip and front end amplification module, RF Receiving Device |
| PCT/CN2019/082179 WO2019233176A1 (en) | 2018-06-08 | 2019-04-11 | Low-noise amplifier chip, front-end amplifier module, and radio-frequency receiver device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810589748.8A CN108832903A (en) | 2018-06-08 | 2018-06-08 | The low noise amplifier chip and front end amplification module, RF Receiving Device |
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| CN108832903A true CN108832903A (en) | 2018-11-16 |
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| CN201810589748.8A Pending CN108832903A (en) | 2018-06-08 | 2018-06-08 | The low noise amplifier chip and front end amplification module, RF Receiving Device |
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| CN (1) | CN108832903A (en) |
| WO (1) | WO2019233176A1 (en) |
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| WO2019233176A1 (en) * | 2018-06-08 | 2019-12-12 | 深圳市华讯方舟微电子科技有限公司 | Low-noise amplifier chip, front-end amplifier module, and radio-frequency receiver device |
| CN111130465A (en) * | 2019-11-19 | 2020-05-08 | 中国兵器装备集团上海电控研究所 | Low-noise radiation frequency front-end circuit suitable for Beidou second-generation frequency band |
| CN112350673A (en) * | 2020-11-09 | 2021-02-09 | 中国电子科技集团公司第三十八研究所 | Satellite-borne very low frequency preamplifier |
| CN116073774A (en) * | 2022-12-12 | 2023-05-05 | 苏州科技大学 | GaN HEMT-based high-linearity microwave power amplifier |
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|---|---|---|---|---|
| WO2019233176A1 (en) * | 2018-06-08 | 2019-12-12 | 深圳市华讯方舟微电子科技有限公司 | Low-noise amplifier chip, front-end amplifier module, and radio-frequency receiver device |
| CN111130465A (en) * | 2019-11-19 | 2020-05-08 | 中国兵器装备集团上海电控研究所 | Low-noise radiation frequency front-end circuit suitable for Beidou second-generation frequency band |
| CN112350673A (en) * | 2020-11-09 | 2021-02-09 | 中国电子科技集团公司第三十八研究所 | Satellite-borne very low frequency preamplifier |
| CN112350673B (en) * | 2020-11-09 | 2023-06-27 | 中国电子科技集团公司第三十八研究所 | Satellite-borne very low frequency preamplifier |
| CN116073774A (en) * | 2022-12-12 | 2023-05-05 | 苏州科技大学 | GaN HEMT-based high-linearity microwave power amplifier |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2019233176A1 (en) | 2019-12-12 |
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Application publication date: 20181116 |