CN108809719A - Ten thousand mbit ethernet interface inter-link methods, communication equipment and storage medium - Google Patents
Ten thousand mbit ethernet interface inter-link methods, communication equipment and storage medium Download PDFInfo
- Publication number
- CN108809719A CN108809719A CN201810604322.5A CN201810604322A CN108809719A CN 108809719 A CN108809719 A CN 108809719A CN 201810604322 A CN201810604322 A CN 201810604322A CN 108809719 A CN108809719 A CN 108809719A
- Authority
- CN
- China
- Prior art keywords
- ethernet interface
- mbit ethernet
- chip
- mbit
- prbs
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
- H04B1/12—Neutralising, balancing, or compensation arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Small-Scale Networks (AREA)
Abstract
An embodiment of the present invention provides a kind of ten thousand mbit ethernet interface inter-link methods, communication equipment and storage mediums, are related to data communication technology field.Method is by after to the 10000th mbit ethernet interface initialization, after the 10000th mbit ethernet interface execution shutoff operation, after pair the 20000th mbit ethernet interface initialization being connect with the 10000th mbit ethernet interface, the 20000th mbit ethernet interface is configured to send the mode of pseudo-random binary sequence PRBS code stream patterns, and then the 10000th mbit ethernet interface is executed into opening operation, 10,000,000,000 signals of PRBS sent to the 20000th mbit ethernet interface so as to the 10000th mbit ethernet interface.To which a large amount of error messages of probability appearance or serious conditions caused by unstable state waveform when solving the problems, such as that 10,000,000,000 chip receiver balanced devices are interconnected by ten thousand mbit ethernet interface chips directly result in 10,000,000,000 chips and can not communicate.
Description
Technical field
The present invention relates to data communication technology fields, in particular to a kind of ten thousand mbit ethernet interface inter-link methods, lead to
Believe equipment and storage medium.
Background technology
The outburst of big data in recent years, the equipment for using 10,000,000,000 interface chip interconnection schemes are rapid with extremely vigorous demand
It rises.People made higher requirement stability, the adaptability of equipment.
To avoid influence of the realization difference in different 10,000,000,000 interface chips interconnections to link signal, 10,000,000,000 interfaces needs from matching
The parameters such as preemphasis, the amplitude of transmit-receive position are set to be adjusted.For originating party to the mode of generally use software configuration is joined
Number is adjusted, and for receiving direction, there is non-intellectual and compatibility, such as printed circuit board biography between being interconnected due to chip
The decaying of defeated medium causes the signal strength that chip receives to have differences, therefore receiving terminal would generally use reception automatic equal
Weighing apparatus technology is adjusted, and it is to pass through printed circuit according to the signal that 10,000,000,000 interface chip of transmitting terminal is sent out to receive automatic balancing technique
After the transmission mediums such as plate carry out transmission, 10,000,000,000 interface chip of receiving terminal (judges 10,000,000,000 interface chip of receiving terminal by algorithm
The high size of eye for receiving the eye pattern of signal, takes suitable value), it obtains signal strength and calculates CTLE (Continuous Time
Linear Equalization, continuous linear are balanced) value, compensate 10,000,000,000 signals declining by transmission mediums such as printed circuit boards
Subtract, to reach the reliable and stable transmission of 10,000,000,000 interfaces.
Various 10,000,000,000 interface related agreements, which define 10,000,000,000 interfaces and send the waveform of signal at steady state, (calls in the following text steady
State waveform) (stable state waveform refers to " 0 " of digital signal, level"1" can be correctly sent).But cause in some cases
Unstable state waveform is presented in the signal that 10000000000 interfaces are sent out, and (unstable state waveform refers to " 0 " of digital signal, entanglement occurs in level"1".
Such as：Want to send out level"1", and what is be actually sent out is level "0").Unstable state waveform is not when 10000000000 interface chips interconnect
Have and required not allow by specification forces, therefore is also a kind of existing intrinsic characteristic of 10,000,000,000 interface chips interconnection.This problem can be led
Cause equipment under utilization the scene that 10,000,000,000 interface chips interconnects, greater probability 10,000,000,000 interfaces of the appearance a large amount of error messages of appearance or
Serious conditions directly result in 10,000,000,000 interface chips and can not communicate.
Invention content
The purpose of the present invention is to provide a kind of ten thousand mbit ethernet interface inter-link methods, communication equipment and storage mediums.This
It is as follows to invent the technical solution taken：
In a first aspect, an embodiment of the present invention provides a kind of ten thousand mbit ethernet interface inter-link methods, the method includes：It is right
After 10000th mbit ethernet interface initialization, the 10000th mbit ethernet interface is executed into shutoff operation；Pair with described the
After 20000th mbit ethernet interface initialization of 10000 mbit ethernet interfaces connection, the 20000th mbit ethernet interface is configured
At transmission pseudo-random binary sequence PRBS code stream patterns；The 10000th mbit ethernet interface is executed into opening operation, so as to
10,000,000,000 signals of PRBS that the 10000th mbit ethernet interface is sent to the 20000th mbit ethernet interface.
In the embodiment of the present application, by after to the 10000th mbit ethernet interface initialization, by the 10000000000th ether
It is initial to the 20000th mbit ethernet interface being connect with the 10000th mbit ethernet interface after network interface executes shutoff operation
After change, the 20000th mbit ethernet interface is configured to send the mode of pseudo-random binary sequence PRBS code stream patterns, into
And the 10000th mbit ethernet interface is executed into opening operation, so as to the 10000th mbit ethernet interface to the described 20000th
10,000,000,000 signals of PRBS that mbit ethernet interface is sent.It is connect by ten thousand mbit ethernets to solve 10,000,000,000 chip receiver balanced devices
It is probability caused by unstable state waveform when the interconnection of mouthful chip a large amount of error messages occur or serious conditions directly result in 10,000,000,000 cores
The problem of piece can not communicate.
Optionally, the 10000th mbit ethernet interface is being executed into opening operation, so as to the 10000th mbit ethernet
After 10,000,000,000 signals of PRBS that interface is sent to the 20000th mbit ethernet interface, the method further includes：Delay the
One preset time, so that the 10000th mbit ethernet interface is automatically performed continuous linear equilibrium CTLE；By the described 20000000000th
Ethernet interface executes shutoff operation；The 10000th mbit ethernet interface is configured to send PRBS code stream patterns；It will be described
20000th mbit ethernet interface execute opening operation, so as to the 20000th mbit ethernet interface to the described 10000000000th with
10,000,000,000 signals of PRBS that too network interface is sent.
In the embodiment of the present application, it solves 10,000,000,000 chip receiver balanced devices to be interconnected by ten thousand mbit ethernet interface chips
When unstable state waveform caused by probability there are a large amount of error messages or serious conditions directly result in 10,000,000,000 chips and can not communicate
The problem of.
Optionally, the 20000th mbit ethernet interface is being executed into opening operation, so as to the 20000th mbit ethernet
After 10,000,000,000 signals of PRBS that interface is sent to the 10000th mbit ethernet interface, the method further includes：Delay the
Two preset times, so that the 20000th mbit ethernet interface is automatically performed continuous linear equilibrium CTLE；By the described 10000000000th
Ethernet interface releases PRBS code streams pattern and is configured to normal mode and releases the 20000th mbit ethernet interface
PRBS code streams pattern and be configured to normal mode, with into row data communication.
In the embodiment of the present application, after the completion of the 10000th mbit ethernet interface and the 20000th mbit ethernet interface being configured,
Ensure the 10000th mbit ethernet interface and the 20000th mbit ethernet interface normal communication, it will not wrong message or 10,000,000,000 interfaces
The case where down.
Optionally, it is described by the 10000th mbit ethernet interface be configured to send PRBS code stream patterns include：It will be described
The reference clock that 10000th mbit ethernet interface sends PRBS code streams is set as the local clock of the 10000000000th chip, by described the
20000 mbit ethernet interfaces are configured to send pseudo-random binary sequence PRBS code stream patterns：By the 20000000000th ether
The reference clock of network interface transmission pseudo-random binary sequence PRBS code streams is set as the local clock of the 20000000000th chip.
In the embodiment of the present application, the local clock of 10,000,000,000 chips is set to the reference clock of corresponding PRBS code streams,
Simplify operation.
Second aspect, an embodiment of the present invention provides a kind of communication equipments, including the 10000000000th chip and the 20000000000th core
Piece.20000th mbit ethernet interface of the 10000th mbit ethernet interface and the 20000000000th chip of the 10000000000th chip
Connection.The communication equipment is for executing：After the 10000th mbit ethernet interface initialization, the 10000th mbit ethernet is connect
Mouth executes shutoff operation；After pair the 20000th mbit ethernet interface initialization being connect with the 10000th mbit ethernet interface,
The 20000th mbit ethernet interface is configured to send pseudo-random binary sequence PRBS code stream patterns；By the described 10000000000th
Ethernet interface executes opening operation, so as to the 10000th mbit ethernet interface to the 20000th mbit ethernet interface
10,000,000,000 signals of PRBS of transmission.
The third aspect, an embodiment of the present invention provides a kind of storage medium, the storage medium has program stored therein code, institute
Program code is stated when being read out by the processor and running, executes above-mentioned method.
Present example provides ten thousand mbit ethernet interface inter-link methods of one kind, communication equipment and storage medium, and method is logical
Cross to after the 10000th mbit ethernet interface initialization, after the 10000th mbit ethernet interface is executed shutoff operation, pair with
After 20000th mbit ethernet interface initialization of the 10000th mbit ethernet interface connection, the 20000th mbit ethernet is connect
Mouth is configured to send the mode of pseudo-random binary sequence PRBS code stream patterns, and then the execution of the 10000th mbit ethernet interface is beaten
Operation is opened, so that the PRBS 10,000,000,000 that the 10000th mbit ethernet interface to the 20000th mbit ethernet interface is sent believes
Number.To solve when 10,000,000,000 chip receiver balanced devices are interconnected by ten thousand mbit ethernet interface chips caused by unstable state waveform
Probability there are a large amount of error messages or serious conditions directly result in the problem of 10,000,000,000 chips can not communicate.
Other features and advantages of the present invention will be illustrated in subsequent specification, also, partly be become from specification
It is clear that by implementing understanding of the embodiment of the present invention.The purpose of the present invention and other advantages can be by saying what is write
Specifically noted structure is realized and is obtained in bright book, claims and attached drawing.
Description of the drawings
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below will be to needed in the embodiment attached
Figure is briefly described, it should be understood that the following drawings illustrates only certain embodiments of the present invention, therefore is not construed as pair
The restriction of range for those of ordinary skill in the art without creative efforts, can also be according to this
A little attached drawings obtain other relevant attached drawings.
Fig. 1 is one scheme schematic diagram of the prior art provided in an embodiment of the present invention；
Fig. 2 is two scheme schematic diagram of the prior art provided in an embodiment of the present invention；
Fig. 3 is the flow chart of ten thousand mbit ethernets interface inter-link method provided in an embodiment of the present invention；
Fig. 4 is the structure diagram of communication equipment provided in an embodiment of the present invention.
In figure：100- communication equipments；The 10000000000th chips of 110-；The 20000000000th chips of 120-；130- transmission mediums.
Specific implementation mode
In order to make the object, technical scheme and advantages of the embodiment of the invention clearer, below in conjunction with the embodiment of the present invention
In attached drawing, technical scheme in the embodiment of the invention is clearly and completely described, it is clear that described embodiment is
A part of the embodiment of the present invention, instead of all the embodiments.The present invention being usually described and illustrated herein in the accompanying drawings is implemented
The component of example can be arranged and be designed with a variety of different configurations.Therefore, below to the reality of the present invention provided in the accompanying drawings
The detailed description for applying example is not intended to limit the range of claimed invention, but is merely representative of the selected implementation of the present invention
Example.Based on the embodiments of the present invention, those of ordinary skill in the art are obtained without creative efforts
Every other embodiment, shall fall within the protection scope of the present invention.
It should be noted that：Similar label and letter indicate similar terms in following attached drawing, therefore, once a certain Xiang Yi
It is defined, then it further need not be defined and explained in subsequent attached drawing in a attached drawing.Meanwhile the present invention's
In description, term " first ", " second " etc. are only used for distinguishing description, are not understood to indicate or imply relative importance.
Present inventor has found that the prior art is during the invention embodiment of the present invention：10000000000 interface chips receive
There are following three kinds of situations to unstable signal：
10000000000 interface chips receive unstable signal, there is this unstable signal under three circumstances：One refers in transmitting terminal
Chip powers on initial stage since internal controller is in uncontrolled state, and 10,000,000,000 interface of transmitting terminal chip is caused to send out unstable state letter
Number；Two refer to only PCS layers of 10,000,000,000 interface chips, and the signal that 10,000,000,000 interface of transmitting terminal chip is sent out is by 10,000,000,000 signals that input
It carries out what encoding and decoding were sent out after restoring by circuit, but if it's not true for 10,000,000,000 signals of input, leads to 10,000,000,000 interface of chip
Send out unstable signal；Three refer to when system board noise is larger, even if 10,000,000,000 interface chip of transmitting terminal does not send signal also
When, but unstable signal has been also possible in noise.
Unstable state waveform in the case of these three, which is specification, to be allowed, and can not be eliminated.10,000,000,000 interface chip of part
Receiver receive 10,000,000,000 unstable state waveforms after, since unstable state waveform and stable state waveform cannot be distinguished in receiver, cause to connect
There is exception in receipts machine internal balance algorithm, the ability of equalization can be reached automatically most strong.When 10,000,000,000 interface of chip enters slave mode
After send stable state waveform, this waveform does not need to the too strong ability of equalization, therefore the strongest ability of equalization in chip receiver
It is abnormal to instead result in 10,000,000,000 interface chip receivers, probability a large amount of error messages occur or serious conditions directly result in chip
10000000000 interfaces can not communicate.
Prior art one：Such as Fig. 1, select chip receiver equalization algorithm can be adaptive 10,000,000,000 interface chips,
As 10,000,000,000 chips 1 and 10,000,000,000 chips 2, equalization algorithm can refer to adaptively：What the equalization algorithm meeting basis of chip receiver received
Unstable state waveform and stable state waveform carry out the constantly regulate ability of equalization, ensure that ability is equalized after receiving stable state waveform to expire
The eye high request of eye pattern inside sufficient chip receiver.
One defect of prior art is：This method can select 10,000,000,000 interface chips there are great limitation, from
From the point of view of chip type selecting, the equalization algorithm compared with multi-chip can not be accomplished adaptively.It may lead to not select suitable 10,000,000,000 interface
Chip, on the flexible design degree of equipment, there are very big influences for this.
Prior art two：Such as Fig. 2, interconnecting intermediate increase equalization algorithm in 10,000,000,000 chips 1 and 10,000,000,000 chips 2 can be adaptive
The chip answered, such as Retimer chips.
Two defect of prior art：Chip that can be adaptive due to increasing equalization algorithm increases cost, and balanced
Algorithm can be adaptive 10,000,000,000 numbers of channels of chip be limited, for the more system of 10,000,000,000 interfaces, need to increase more
The chip design, cause the design complexities of equipment to increase, reliability reduction.
Therefore, present inventor proposes ten thousand mbit ethernet interface inter-link methods of one kind, communication equipment and storage medium,
To improve 10,000,000,000 chips in the case where not supporting adaptive reception automatic equalization function, set in 10,000,000,000 interface chip interconnection schemes
When standby utilization scene, when 10,000,000,000 interface chip receiver equalizer are interconnected by 10,000,000,000 interface chips caused by unstable state waveform
Probability there are a large amount of error messages or serious conditions directly result in the problem of 10,000,000,000 interface chips can not communicate.
Referring to Fig. 3, an embodiment of the present invention provides a kind of ten thousand mbit ethernet interface inter-link methods, the method includes：
Step S300, step S310 and step S320.
Step S300：After the 10000th mbit ethernet interface initialization, the 10000th mbit ethernet interface is executed into pass
Closed operation.
For example, after to the 10000th mbit ethernet interface initialization, the 10000th mbit ethernet interface is executed into (Shut
Down operation), that is, execute shutoff operation.
Step S310：In the 20000th mbit ethernet interface initialization pair connect with the 10000th mbit ethernet interface
Afterwards, the 20000th mbit ethernet interface is configured to send pseudo-random binary sequence PRBS code stream patterns.
Step S320：The 10000th mbit ethernet interface is executed into opening operation, so as to the 10000th mbit ethernet
10,000,000,000 signals of PRBS that interface is sent to the 20000th mbit ethernet interface.
For example, the 10000th mbit ethernet interface is carried out (No Shut Down) operation, that is, opening operation is executed, with
Toilet states 10,000,000,000 signals of PRBS that the 10000th mbit ethernet interface is sent to the 20000th mbit ethernet interface.
In the present embodiment, PRBS：Pseudo-Random Binary Sequence, i.e. pseudo-random binary sequence, letter
It is referred to as pseudo noise code.Chip testing mainly uses the test of this pseudo noise code progress high-speed serial channels of PRBS, mainly
The case where testing the bit error rate.The PRBS patterns rate is matched, such as 10,000,000,000 interfaces, the pattern of PRBS with the rate of chip interface
Rate is also 10,000,000,000.PRBS is in the 10000000000th chip and each own Generator and Checker of the 20000000000th chip interior, originally
In embodiment, using the 10000000000th chip and the respective Generator functions with PRBS of the 20000000000th chip, send specific
PRBS patterns.
In the embodiment of the present application, by after to the 10000th mbit ethernet interface initialization, by the 10000000000th ether
It is initial to the 20000th mbit ethernet interface being connect with the 10000th mbit ethernet interface after network interface executes shutoff operation
After change, the 20000th mbit ethernet interface is configured to send the mode of pseudo-random binary sequence PRBS code stream patterns, into
And the 10000th mbit ethernet interface is executed into opening operation, so as to the 10000th mbit ethernet interface to the described 20000th
10,000,000,000 signals of PRBS that mbit ethernet interface is sent.It is connect by ten thousand mbit ethernets to solve 10,000,000,000 chip receiver balanced devices
It is probability caused by unstable state waveform when the interconnection of mouthful chip a large amount of error messages occur or serious conditions directly result in 10,000,000,000 cores
The problem of piece can not communicate.
Optionally, after step S320, the method further includes：
Postpone the first preset time, so that the 10000th mbit ethernet interface is automatically performed continuous linear equilibrium CTLE；
The 20000th mbit ethernet interface is executed into shutoff operation；The 10000th mbit ethernet interface is configured to send PRBS codes
Stream mode；The 20000th mbit ethernet interface is executed into opening operation, so that the 20000th mbit ethernet interface arrives
10,000,000,000 signals of PRBS that the 10000th mbit ethernet interface is sent.
First preset time can be the period of microsecond (us) grade.Wherein, the 20000th mbit ethernet interface is held
The 20000th mbit ethernet interface is executed power down operations, since the 10000th mbit ethernet connects by row shutoff operation
Mouth automatic equalization is not adaptive, therefore will not be impacted to the automatic equalization of the 10000th mbit ethernet interface.By described
20000 mbit ethernet interfaces execute power up operations, that is, opening operation are executed, so that the 20000th mbit ethernet interface connects
Receive 10,000,000,000 signals of PRBS that the 10000th mbit ethernet interface is sent
In the embodiment of the present application, it solves 10,000,000,000 chip receiver balanced devices to be interconnected by ten thousand mbit ethernet interface chips
When unstable state waveform caused by probability there are a large amount of error messages or serious conditions directly result in 10,000,000,000 chips and can not communicate
The problem of.
Optionally, the 20000th mbit ethernet interface is being executed into opening operation, so as to the 20000th mbit ethernet
After 10,000,000,000 signals of PRBS that interface is sent to the 10000th mbit ethernet interface, the method further includes：
Postpone the second preset time, so that the 20000th mbit ethernet interface is automatically performed continuous linear equilibrium CTLE；
By the 10000th mbit ethernet interface release PRBS code streams pattern and be configured to normal mode and by the described 20000000000th with
Too network interface releases PRBS code streams pattern and is configured to normal mode, with into row data communication.
In the present embodiment, the second preset time can be the period of microsecond (us) grade.
In the embodiment of the present application, after the completion of the 10000th mbit ethernet interface and the 20000th mbit ethernet interface being configured,
Ensure the 10000th mbit ethernet interface and the 20000th mbit ethernet interface normal communication, it will not wrong message or 10,000,000,000 interfaces
The case where closing.
Optionally, it is described by the 10000th mbit ethernet interface be configured to send PRBS code stream patterns include：It will be described
The reference clock that 10000th mbit ethernet interface sends PRBS code streams is set as the local clock of the 10000000000th chip, by described the
20000 mbit ethernet interfaces are configured to send pseudo-random binary sequence PRBS code stream patterns：By the 20000000000th ether
The reference clock of network interface transmission pseudo-random binary sequence PRBS code streams is set as the local clock of the 20000000000th chip.
In the embodiment of the present application, the local clock of 10,000,000,000 chips is set to the reference clock of corresponding PRBS code streams,
Simplify operation.
Present example provides a kind of ten thousand mbit ethernet interface inter-link methods, and method is by connecing the 10000th mbit ethernet
After mouthful initialization, pair it will be connect with the 10000th mbit ethernet after the 10000th mbit ethernet interface execution shutoff operation
After 20000th mbit ethernet interface initialization of mouth connection, the 20000th mbit ethernet interface is configured to send pseudorandom two
The mode of system sequence PRBS code stream patterns, and then the 10000th mbit ethernet interface is executed into opening operation, so as to described first
10,000,000,000 signals of PRBS that ten thousand mbit ethernet interfaces are sent to the 20000th mbit ethernet interface.To solve 10,000,000,000 cores
It is probability caused by unstable state waveform when piece receiver equalizer is interconnected by ten thousand mbit ethernet interface chips a large amount of mistakes occur
Message or serious conditions directly result in the problem of 10,000,000,000 chips can not communicate.
Referring to Fig. 4, an embodiment of the present invention provides a kind of communication equipment 100, including the 10000000000th chip 110 and second
10000000000 chips 120.The of 10000th mbit ethernet interface of the 10000000000th chip 110 and the 20000000000th chip 120
20000 mbit ethernet interfaces connect.The communication equipment is for executing：It, will be described after the 10000th mbit ethernet interface initialization
10000th mbit ethernet interface executes shutoff operation；In pair the 20000000000th ether being connect with the 10000th mbit ethernet interface
After network interface initialization, the 20000th mbit ethernet interface is configured to send pseudo-random binary sequence PRBS code stream moulds
Formula；The 10000th mbit ethernet interface is executed into opening operation, so that the 10000th mbit ethernet interface is described in
10,000,000,000 signals of PRBS that 20000th mbit ethernet interface is sent.
Optionally, the communication equipment is additionally operable to execute：Postpone the first preset time, so that the 10000th mbit ethernet
Interface is automatically performed continuous linear equilibrium CTLE；The 20000th mbit ethernet interface is executed into shutoff operation；By described first
Ten thousand mbit ethernet interfaces are configured to send PRBS code stream patterns；The 20000th mbit ethernet interface is executed into opening operation, with
Toilet states 10,000,000,000 signals of PRBS that the 20000th mbit ethernet interface is sent to the 10000th mbit ethernet interface.
Optionally, the communication equipment is additionally operable to execute：Postpone the second preset time, so that the 20000th mbit ethernet
Interface is automatically performed continuous linear equilibrium CTLE；The 10000th mbit ethernet interface is released into PRBS code streams pattern and is configured to
Normal mode and the 20000th mbit ethernet interface is released into PRBS code streams pattern and is configured to normal mode, with into line number
According to communication.
Optionally, the communication equipment is additionally operable to execute：The 10000th mbit ethernet interface is sent into PRBS code streams
Reference clock is set as the local clock of the 10000000000th chip and the 20000th mbit ethernet interface is sent pseudorandom two
The reference clock of system sequence PRBS code streams is set as the local clock of the 20000000000th chip.
The communication equipment 100 can also include transmission medium 130.10000000000th chip 110 passes through the transmission medium
130 connect with the 20000000000th chip.
Optionally, the transmission medium 130 may include printed circuit board and high speed connector, but be not limited only to this.It is real
The existing physical signal connection interconnected between 10000000000th chip 110 and the 20000000000th chip 120.Printed circuit board is connect with high speed
Device can select the plank and connector of different model according to different design of communication equipments, the plank of different model and connector
Dielectric loss and conductor losses difference, cause the physical signal between the 10000000000th chip and the 20000000000th chip by printing electricity
The attenuation of road plate and connector is also inconsistent, and the decaying of physical signal can introduce intersymbol interference (ISI), lead to physical signal
Shake increases, bandwidth reduces, and influences the transmitting of entire signal.
In the present embodiment, the 10000000000th chip 110 and the 20000000000th chip 120 realize 10,000,000,000 by transmission medium 130
Bus bar.As an implementation, the 10000000000th chip 110 and the 20000000000th chip 120 can be with voluntarily managing
The chip of function, such as the 10000000000th chip and the 20000000000th chip are the cpu chip for being integrated with 10,000,000,000 interfaces.
As another embodiment party, the 10000000000th chip 110 and the 20000000000th chip 120 can also be not have voluntarily to manage
The chip of reason, such as the 10000000000th chip and the 20000000000th chip can be exchange chip, PHY chip etc., communication equipment includes
The external management chip of Added Management, external management chip are all connected with the 10000000000th chip and the 20000000000th chip, exterior tube
Chip is managed for managing the 10000000000th chip and the 20000000000th chip, the content of management include 10,000,000,000 chip initiations, 10,000,000,000 with
Too network interface either on or off (NO Shut Down or Shut Down) management, the transmission of PRBS patterns, delay function etc..
Optionally, referring to Fig. 4, the 10000000000th chip 110 includes the 10000000000th interface bus.Described 20000000000th
Chip 120 includes the 20000000000th interface bus.10000000000th interface bus passes through the transmission medium and the described 20000th
Million interface bus connect.
In the present embodiment, the 10000000000th interface bus includes KR and KR4 with the 20000000000th interface bus,
But it is not limited only to this.10000000000th interface bus and the 20000000000th interface bus all can be any 10,000,000,000 or more rates
Bus.
Referring to Fig. 4, the 10000000000th chip 110 includes transmitter TX1, the 20000000000th chip 120 includes connecing
Receipts machine RX2.The transmitter TX1 of 10000000000th chip 110 sends signal and is transmitted to described the by the transmission medium 130
It is compensated by automatic equalizer inside the receiver RX2, the receiver RX2 of the 20000000000th chip 120 of 20000000000 chips 120
The signal passes through the decaying of the transmission medium so that the signal meets pre-set level.Similarly, the 20000000000th chip 120
Transmitter TX2 to send signal similar by the receiver RX1 processing procedures of transmission medium to the 10000000000th chip 110.It is default
Index i.e. 10,000,000,000 interface chip receiver received signals need to meet the technical indicator that specification defines, including：Amplitude, eye be high,
Wide, shake of eye etc..
Referring to Fig. 4, the 10000000000th chip 110 and the 20000000000th chip 120 include receiving automatic equalization.With the 20000th
For the reception automatic equalization of million chips 120, the signal that the 10000000000th chip 110 is sent out carries out channel by transmission medium 130
After transmission, it is transmitted to the 20000000000th chip 120, the 20000000000th chip 120 is such as judged based on the signal received by algorithm
The high size of eye of the eye pattern of the signal received takes suitable value, obtains signal strength and calculates CTLE (Continuous Time
Linear Equalization, continuous linear are balanced) value, the decaying that the signal passes through transmission medium is compensated, is connect with reaching 10,000,000,000
The reliable and stable transmission of mouth.In the operation of actual equipment, the transceiver of different 10,000,000,000 chips has different, different transmission mediums
Material property is variant, device temperature, power supply slight fluctuations etc., and the value assurance physical device for receiving automatic equalization is got most
Excellent equilibrium value.The automatic equalization function of the reception is divided to two classes, and one kind, which is received from dynamic equilibrium, can accomplish that overall process is adaptive, such is not
Within the scope of the considerations of the present embodiment；Another kind of to be received from dynamic equilibrium and do not accomplish that overall process is adaptive, the present invention is exactly this
In the case of, ensure 10,000,000,000 interface normal communications, it will not wrong message or the case where 10,000,000,000 interface down.
It is compared with prior art one shown in FIG. 1, communication equipment provided in an embodiment of the present invention has following beneficial
Effect：Equipment design flexibility improves：10000000000 interface chips are selected without constraint, and whether the reception automatic equalization of chip receiver props up
It is no longer bottleneck to hold adaptive, and there is no constrain in this respect for equipment design flexibility；Material commercial affairs risk reduces：10000000000 interface cores
Piece selection increases without constraint, the commercial choice of material, more has control to material commercial affairs risk control.
It is compared with prior art two shown in Fig. 2, communication equipment provided in an embodiment of the present invention：System design is complicated
Degree reduces：When 10,000,000,000 interface chips are interconnected without adding the chip with receiver adaptive ability；Cost reduction：Account
Method can be adaptive chip 10,000,000,000 channels be it is limited, if each channel save the chip design, saved for system
The cost of province is all very objective；Equipment dependability increases, i.e., chip is reduced, and corresponding peripheral circuit does not just have, then equipment dependability
Increase.
It is apparent to those skilled in the art that for convenience and simplicity of description, the communication of foregoing description
The specific work process of equipment, can refer to corresponding processes in the foregoing method embodiment, and details are not described herein.
An embodiment of the present invention provides a kind of communication equipments 100, including the 10000000000th chip 110 and the 20000000000th chip
120.10000th mbit ethernet interface of the 10000000000th chip 110 with the 20000000000th of the 20000000000th chip 120 the with
Too network interface connects.The communication equipment is for executing：After the 10000th mbit ethernet interface initialization, by the described 10000000000th
Ethernet interface executes shutoff operation；At the beginning of pair the 20000th mbit ethernet interface being connect with the 10000th mbit ethernet interface
After beginningization, the 20000th mbit ethernet interface is configured to send pseudo-random binary sequence PRBS code stream patterns；It will be described
10000th mbit ethernet interface execute opening operation, so as to the 10000th mbit ethernet interface to the described 20000000000th with
10,000,000,000 signals of PRBS that too network interface is sent.Adaptive problem can not be accomplished by improving the automatic equalization algorithm of reception of 10,000,000,000 chips,
To realize the 10000000000th chip and the interconnection of the 20000000000th chip, and then it is in communication with each other.
An embodiment of the present invention provides a kind of storage medium, the storage medium has program stored therein code, described program generation
Code executes above-mentioned method when being read out by the processor and running.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, protection scope of the present invention should be subject to the protection scope in claims.
Claims (10)
1. a kind of ten thousand mbit ethernet interface inter-link methods, which is characterized in that the method includes：
After the 10000th mbit ethernet interface initialization, the 10000th mbit ethernet interface is executed into shutoff operation；
After pair the 20000th mbit ethernet interface initialization being connect with the 10000th mbit ethernet interface, by the described 20000th
Mbit ethernet interface is configured to send pseudo-random binary sequence PRBS code stream patterns；
The 10000th mbit ethernet interface is executed into opening operation, so that the 10000th mbit ethernet interface is described in
10,000,000,000 signals of PRBS that 20000th mbit ethernet interface is sent.
2. according to the method described in claim 1, it is characterized in that, opening behaviour executing the 10000th mbit ethernet interface
Make, 10,000,000,000 signals of PRBS sent so as to the 10000th mbit ethernet interface to the 20000th mbit ethernet interface it
Afterwards, the method further includes：
Postpone the first preset time, so that the 10000th mbit ethernet interface is automatically performed continuous linear equilibrium CTLE；
The 20000th mbit ethernet interface is executed into shutoff operation；
The 10000th mbit ethernet interface is configured to send PRBS code stream patterns；
The 20000th mbit ethernet interface is executed into opening operation, so that the 20000th mbit ethernet interface is described in
10,000,000,000 signals of PRBS that 10000th mbit ethernet interface is sent.
3. according to the method described in claim 2, it is characterized in that, opening behaviour executing the 20000th mbit ethernet interface
Make, 10,000,000,000 signals of PRBS sent so as to the 20000th mbit ethernet interface to the 10000th mbit ethernet interface it
Afterwards, the method further includes：
Postpone the second preset time, so that the 20000th mbit ethernet interface is automatically performed continuous linear equilibrium CTLE；
The 10000th mbit ethernet interface is released into PRBS code streams pattern and is configured to normal mode and by the described 20000th
Mbit ethernet interface releases PRBS code streams pattern and is configured to normal mode, with into row data communication.
4. according to the method described in claim 2, it is characterized in that, described be configured to send out by the 10000th mbit ethernet interface
The PRBS code stream patterns are sent to include：The reference clock that the 10000th mbit ethernet interface is sent to PRBS code streams is set as the 10000th
The local clock of million chips,
The 20000th mbit ethernet interface, which is configured to transmission pseudo-random binary sequence PRBS code stream patterns, includes：It will be described
The reference clock that 20000th mbit ethernet interface sends pseudo-random binary sequence PRBS code streams is set as the 20000000000th chip
Local clock.
5. a kind of communication equipment, which is characterized in that including the 10000000000th chip and the 20000000000th chip, the 10000000000th chip
The 10000th mbit ethernet interface connect with the 20000th mbit ethernet interface of the 20000000000th chip, the communication equipment is used
In execution：
After the 10000th mbit ethernet interface initialization, the 10000th mbit ethernet interface is executed into shutoff operation；
After pair the 20000th mbit ethernet interface initialization being connect with the 10000th mbit ethernet interface, by the described 20000th
Mbit ethernet interface is configured to send pseudo-random binary sequence PRBS code stream patterns；
The 10000th mbit ethernet interface is executed into opening operation, so that the 10000th mbit ethernet interface is described in
10,000,000,000 signals of PRBS that 20000th mbit ethernet interface is sent.
6. communication equipment according to claim 5, which is characterized in that the communication equipment is additionally operable to execute：
Postpone the first preset time, so that the 10000th mbit ethernet interface is automatically performed continuous linear equilibrium CTLE；
The 20000th mbit ethernet interface is executed into shutoff operation；
The 10000th mbit ethernet interface is configured to send PRBS code stream patterns；
The 20000th mbit ethernet interface is executed into opening operation, so that the 20000th mbit ethernet interface is described in
10,000,000,000 signals of PRBS that 10000th mbit ethernet interface is sent.
7. communication equipment according to claim 6, which is characterized in that the communication equipment is additionally operable to execute：
Postpone the second preset time, so that the 20000th mbit ethernet interface is automatically performed continuous linear equilibrium CTLE；
The 10000th mbit ethernet interface is released into PRBS code streams pattern and is configured to normal mode and by the described 20000th
Mbit ethernet interface releases PRBS code streams pattern and is configured to normal mode, with into row data communication.
8. communication equipment according to claim 6, which is characterized in that the communication equipment is additionally operable to execute：
When setting the reference clock of the 10000th mbit ethernet interface transmission PRBS code streams to the local of the 10000000000th chip
Clock and the reference clock that the 20000th mbit ethernet interface is sent to pseudo-random binary sequence PRBS code streams are set as the
The local clock of 20000000000 chips.
9. communication equipment according to claim 5, which is characterized in that the 10000000000th chip includes transmitter, described
20000000000th chip includes receiver, and the transmitter of the 10000000000th chip sends signal by some transmission medium to described
The receiver of 20000000000th chip compensates the signal by automatic equalizer inside the receiver of the 20000000000th chip and passes through
Cross the decaying of the transmission medium so that the signal meets pre-set level.
10. a kind of storage medium, which is characterized in that the storage medium has program stored therein code, and said program code is being located
When reason device reads and runs, the method as described in claim 1-4 any one is executed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810604322.5A CN108809719B (en) | 2018-06-12 | 2018-06-12 | Gigabit Ethernet interface interconnection method, communication device and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810604322.5A CN108809719B (en) | 2018-06-12 | 2018-06-12 | Gigabit Ethernet interface interconnection method, communication device and storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108809719A true CN108809719A (en) | 2018-11-13 |
| CN108809719B CN108809719B (en) | 2021-05-18 |
Family
ID=64085577
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810604322.5A Active CN108809719B (en) | 2018-06-12 | 2018-06-12 | Gigabit Ethernet interface interconnection method, communication device and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108809719B (en) |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7757142B2 (en) * | 2003-08-28 | 2010-07-13 | International Business Machines Corporation | Self-synchronizing pseudorandom bit sequence checker |
| CN102480449A (en) * | 2010-11-19 | 2012-05-30 | 马克西姆综合产品公司 | Method and apparatus for controlling a continuous time linear equalizer |
| CN104322014A (en) * | 2012-06-22 | 2015-01-28 | 英特尔公司 | Link training and training frame for 100Gbps Ethernet |
| CN105391603A (en) * | 2015-12-17 | 2016-03-09 | 迈普通信技术股份有限公司 | A system and method for testing 10-gigabit electrical signals |
| CN105610607A (en) * | 2015-12-17 | 2016-05-25 | 上海市共进通信技术有限公司 | Method for achieving automatic adjustment of parameters of Ethernet based on PRBS |
| CN106375110A (en) * | 2016-08-23 | 2017-02-01 | 杭州华三通信技术有限公司 | Port training method and device |
| CN106375161A (en) * | 2016-12-06 | 2017-02-01 | 中国电子科技集团公司第四十研究所 | 10-gigabit Ethernet tester |
| CN107920038A (en) * | 2017-10-31 | 2018-04-17 | 北京集创北方科技股份有限公司 | Balanced device adjusting method and device |
-
2018
- 2018-06-12 CN CN201810604322.5A patent/CN108809719B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7757142B2 (en) * | 2003-08-28 | 2010-07-13 | International Business Machines Corporation | Self-synchronizing pseudorandom bit sequence checker |
| CN102480449A (en) * | 2010-11-19 | 2012-05-30 | 马克西姆综合产品公司 | Method and apparatus for controlling a continuous time linear equalizer |
| CN104322014A (en) * | 2012-06-22 | 2015-01-28 | 英特尔公司 | Link training and training frame for 100Gbps Ethernet |
| CN105391603A (en) * | 2015-12-17 | 2016-03-09 | 迈普通信技术股份有限公司 | A system and method for testing 10-gigabit electrical signals |
| CN105610607A (en) * | 2015-12-17 | 2016-05-25 | 上海市共进通信技术有限公司 | Method for achieving automatic adjustment of parameters of Ethernet based on PRBS |
| CN106375110A (en) * | 2016-08-23 | 2017-02-01 | 杭州华三通信技术有限公司 | Port training method and device |
| CN106375161A (en) * | 2016-12-06 | 2017-02-01 | 中国电子科技集团公司第四十研究所 | 10-gigabit Ethernet tester |
| CN107920038A (en) * | 2017-10-31 | 2018-04-17 | 北京集创北方科技股份有限公司 | Balanced device adjusting method and device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108809719B (en) | 2021-05-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10374782B2 (en) | Full duplex transmission method for high speed backplane system | |
| US9807208B2 (en) | Adaptive rate control of NBASE-T data transport system | |
| US9742465B1 (en) | NBASE-T PHY-to-PHY information exchange method and apparatus | |
| US20210297307A1 (en) | Rapid rate adaptation in nbase-t ethernet | |
| CN1809176B (en) | Digital distribution frame based alignment method and its apparatus | |
| US10148508B1 (en) | Method and system for ethernet transceiver rate control | |
| US10530906B2 (en) | High-speed interconnect solutions with support for continuous time back channel communication | |
| CN102253914A (en) | Data transmitting and processing method and device and equipment interface | |
| US10511549B2 (en) | High-speed interconnect solutions with support for continuous time in-band back channel communication and proprietary features | |
| CN113740703B (en) | Test board and test system of Retimer chip | |
| US20190020511A1 (en) | High-speed interconnect solutions with support for continuous time in-band back channel communication and proprietary communication speeds | |
| US8503474B2 (en) | System and method for enhanced physical layer device interface capability for backward support of fast retrain | |
| CN105812064B (en) | A kind of optical module control method, optical module and optical communication terminal | |
| CN108809719A (en) | Ten thousand mbit ethernet interface inter-link methods, communication equipment and storage medium | |
| CN101667991A (en) | Method and device for setting pre-emphasis and/or equalization parameters | |
| US10715356B2 (en) | High-speed interconnect solutions with support for secondary continuous time in-band back channel communication for simplex retimer solutions | |
| CN113726425B (en) | Wired communication method, device, equipment and readable storage medium | |
| CN102142986A (en) | Veneer communication system and communication method thereof | |
| CN112350785A (en) | Method and system for checking SERDES communication link performance | |
| EP1197038B1 (en) | A method and apparatus for verifying connectivity among nodes in a communications network | |
| CN217789686U (en) | QSGMII signal transmission packet loss processing circuit | |
| US10742262B1 (en) | Method and system for ethernet active-pair detection | |
| KR100329355B1 (en) | Device for connecting bs to bsc of mobile communication system | |
| KR100492947B1 (en) | Ithernet-based xDSL Modem having inter-modem flow controller | |
| KR20030070959A (en) | Apparatus and Method for implementation of RS-485 network |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |