CN217789686U - QSGMII signal transmission packet loss processing circuit - Google Patents
QSGMII signal transmission packet loss processing circuit Download PDFInfo
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Abstract
The utility model provides a QSGMII signal transmission packet loss processing circuit, which comprises an MCU module, a SWITCH module and a PHY module, wherein the SWITCH module is connected with the PHY module, and the SWITCH module and the PHY module are respectively connected with the MCU module; the MCU module sends a first parameter to the PHY module; the PHY module adjusts according to the first parameter, counts the first quantity of the received messages, sends the received messages to the SWITCH module, and sends the first quantity to the MCU module; the SWITCH module counts a second quantity of the received messages and sends the second quantity to the MCU module; the MCU module determines the optimal first parameter of the PHY module according to the first quantity, the second quantity and the first parameter, improves the quality of QSGMII signals used for transmitting messages in the circuit, and further improves the quality and efficiency of message transmission.
Description
Technical Field
The utility model relates to the field of communication technology, especially, relate to a QSGMII signal transmission packet loss processing circuit.
Background
With the development of technologies, message transmission is more and more common in the communication process, but some technical problems such as message packet loss and the like also follow. The packet loss includes packet loss between two devices and packet loss in one device. In the prior art, a solution is provided only for the packet loss situation in the message transmission process between two electronic devices.
However, in the actual application process, packet loss inside the device is also serious. Specifically, after a Port Physical Layer (PHY) module of one device receives a packet sent by another device, the PHY module needs to transmit the packet to a Micro Control Unit (MCU) module in the device, so that the processing module processes the packet. However, in the internal transmission process of the device, packet loss may occur, which may cause problems such as poor quality of packet transmission.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides a QSGMII signal transmission packet loss processing circuit for alleviate the packet loss condition of message when equipment internal transmission, improve the quality of message transmission.
The utility model provides a QSGMII signal transmission packet loss processing circuit, QSGMII signal transmission packet loss processing circuit includes: the switching module is connected with the PHY module, and the switching module and the PHY module are respectively connected with the MCU module;
the MCU module is used for sending a first parameter to the PHY module;
the PHY module is configured to receive the first parameter, and adjust a parameter of a first four-way Serial Gigabit Media Independent Interface (QSGMII) in the PHY module, where the parameter is used to send a packet to the SWITCH module, according to the first parameter; receiving at least one message sent by other equipment, counting a first quantity of the received message, sending the received message to the SWITCH module through the first QSGMII, and sending the first quantity to the MCU module;
the SWITCH module is configured to receive the packets sent by the PHY module, count a second number of the received packets, and send the second number to the MCU module;
and the MCU module is used for determining the optimal first parameter of the PHY module according to the first quantity, the second quantity and the first parameter and sending the optimal first parameter to the PHY module.
Further, the MCU module is further configured to send a second parameter to the SWITCH module;
the SWITCH module is further configured to receive the second parameter, and adjust a parameter of a second QSGMII in the SWITCH module, where the parameter is used to send a packet to the PHY module, according to the second parameter; sending the received message to the PHY module;
the PHY module is further configured to receive the packets sent by the SWITCH module, count a third number of the currently received packets sent by the SWITCH module, and send the third number to the MCU module; and sending the received message sent by the SWITCH module to the other equipment;
the MCU module is further configured to receive the third number, determine an optimal second parameter of the SWITCH module according to the second number, the third number, and the second parameter, and send the optimal second parameter to the SWITCH module.
Further, the MCU module is specifically configured to compare a second difference between the second quantity and the third quantity corresponding to each group of the second parameters if the number of times of receiving the second quantity and the third quantity is consistent with the group number of the second parameters stored in advance, and determine the second parameter corresponding to the minimum second difference as the optimal second parameter.
Further, the QSGMII signal transmission packet loss processing circuit further includes: a second transformer module and a second information Jack (Registered Jack 45, RJ45) interface, the second transformer module being connected to the PHY module, the second RJ45 interface being connected to the second transformer module;
the second transformer module is configured to receive a packet sent by the PHY module and send the packet to the second RJ45 interface;
and the second RJ45 interface is used for receiving the message sent by the second transformer module and sending the message to the other equipment.
Further, the QSGMII signal transmission packet loss processing circuit further includes: the first transformer module is connected with the PHY module, and the first RJ45 interface is connected with the first transformer module;
the first RJ45 interface is configured to receive a message sent by the other device, and send the message to the first transformer module;
the first transformer module is configured to receive a packet sent by the first RJ45 interface and send the packet to the PHY module.
Further, the QSGMII signal transmission packet loss processing circuit further includes: the display module is connected with the MCU module;
the display module is used for displaying the first parameter and/or the second parameter.
Further, the MCU module is specifically configured to compare a first difference between the first quantity and the second quantity corresponding to each group of the first parameters if the number of times of receiving the first quantity and the second quantity is consistent with the group number of the first parameters stored in advance, and determine the first parameter corresponding to the smallest first difference as the optimal first parameter.
Further, an SMI is arranged on the SWITCH module, and the SMI of the SWITCH module is connected with the MCU module;
and the PHY module is provided with an SMI, and the SMI of the PHY module is connected with the MCU module.
Further, the PHY module is further configured to consider that the first number statistics is completed if a packet sent by another device is not received within a preset time interval.
Further, the SWITCH module is further configured to consider that the second quantity statistics is completed if the packet sent by the PHY module is not received within a preset time interval.
The utility model discloses in, QSGMII signal transmission packet loss processing circuit includes: an MCU module, a SWITCH module and a PHY module, wherein the SWITCH module is connected with the PHY module, and the SWITCH module and the PHY module are respectively connected with the MCU module; the MCU module is used for sending a first parameter to the PHY module; the PHY module is configured to receive the first parameter, and adjust, according to the first parameter, a parameter of a first QSGMII in the PHY module, where the parameter is used to send a packet to the SWITCH module; receiving at least one message sent by other equipment, counting a first quantity of the received message, sending the received message to the SWITCH module through the first QSGMII, and sending the first quantity to the MCU module; the SWITCH module is used for receiving the messages sent by the PHY module through the second QSGMII, counting a second number of the received messages and sending the second number to the MCU module; the MCU module is used for determining the optimal first parameter of the PHY module according to the first quantity, the second quantity and the first parameter and sending the optimal first parameter to the PHY module. That is the utility model discloses in, MCU module among the QSGMII signal transmission packet loss processing circuit sends first parameter to the PHY module to this MCU module passes through the first quantity that the PHY module sent and the second quantity that the SWITCH module sent, confirms optimum first parameter, improves the QSGMII signal quality who is used for transmitting the message among the QSGMII signal transmission packet loss processing circuit, and then has improved message transmission's quality and efficiency.
Drawings
Fig. 1 is a schematic diagram of a QSGMII signal transmission packet loss processing circuit according to an embodiment of the present invention;
fig. 2 is a schematic diagram of the QSGMII signal transmission packet loss processing circuit and other devices provided by the present invention, as shown in fig. 2.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
In order to improve the QSGMII signal quality who is used for transmitting the message among the QSGMII signal transmission packet loss processing circuit, improve the quality and the efficiency of message transmission, the embodiment of the utility model provides a QSGMII signal transmission packet loss processing circuit.
Example 1:
fig. 1 is a schematic structural diagram of a QSGMII signal transmission packet loss processing circuit according to an embodiment of the present invention, as shown in fig. 1, the QSGMII signal transmission packet loss processing circuit includes an MCU module 101, a SWITCH module 102, and a PHY module 103, where the SWITCH module 102 is connected to the PHY module 103, and the SWITCH module 102 and the PHY module 103 are respectively connected to the MCU module 101;
the MCU module 101 is configured to send a first parameter to the PHY module 103;
the PHY module 103 is configured to receive the first parameter, and adjust, according to the first parameter, a parameter of a first QSGMII in the PHY module, where the parameter is used to send a packet to the SWITCH module; receiving at least one message sent by other devices, counting a first number of the received messages, sending the received messages to the SWITCH module 102 through the first QSGMII, and sending the first number to the MCU module 101;
the SWITCH module 102 is configured to receive the packets sent by the PHY module 103, count a second number of the received packets, and send the second number to the MCU module 101;
the MCU module 101 is configured to determine an optimal first parameter of the PHY module 103 according to the first number, the second number, and the first parameter, and send the optimal first parameter to the PHY module 103.
The utility model discloses in, QSGMII signal transmission packet loss processing circuit includes MCU module 101, SWITCH module 102 and PHY module 103, and wherein the second QSGMII in the SWITCH module 102 is connected with the first QSGMII in the PHY module 103 to SWITCH module 102 and PHY module 103 are connected with MCU module 101 respectively through respective Serial Interface (SMI).
For example, the SWITCH module can adopt a VSC7448YIH-02 chip of a manufacturer of Majoram, and the chip supports QSGMII; the PHY module can adopt a VSC8514XMK-14 chip of a Meigaosram manufacturer, and the chip supports QSGMII; the MCU module can adopt a GD32F130G8U6 chip for controlling the SWITCH module and the PHY module.
The message is based on QSGMII signal transmission when transmitting between SWITCH module and PHY module, and wherein QSGMII signal quality can influence the efficiency and the quality of message transmission, and based on this, in order to improve message transmission's efficiency and quality the utility model discloses in, the MCU module keeps in the PHY module 103 and is used for sending the at least two sets of first parameters of the first QSGMII of message to the SWITCH module, and the MCU module can be based on these at least two sets of first parameters, tests message transmission process, the first parameter of the best of final determination QSGMII signal quality when the time PHY module is the highest.
In the present invention, the first parameter is a parameter of the first QSGMII of the PHY module, and the first parameter may include only one sub-parameter or at least two sub-parameters. For example, the first parameter contains sub-parameters ob _ post0, ob _ port1, and ob _ lev.
The utility model discloses in, the optimum first parameter of PHY module can be confirmed to the MCU module, based on this optimum first parameter, can improve the QSGMII signal quality who is used for transmitting the message among the QSGMII signal transmission packet loss processing circuit, and then improves the quality and the efficiency of message transmission.
In this embodiment, the MCU module may adjust a parameter of a signal of the first QSGMII in the PHY module, where the signal is used to send a message to the SWITCH module. Specifically, in this embodiment of the application, the MCU module sends the first parameter to the PHY module, and the PHY module modifies the first parameter after receiving the first parameter, so as to change the amplitude of the signal of the first QSGMII, the edge of the signal, and the jitter of the signal.
Specifically, the process of determining the optimal first parameter includes: the MCU module sends the group of first parameters to the PHY module aiming at any one group of at least two groups of first parameters. And after receiving the first parameter, the PHY module adjusts the parameter of the first QSGMII according to the first parameter. When the parameter of the first QSGMII is adjusted to be the first parameter, the PHY module receives at least one message sent by other equipment, counts the first quantity of the received message, forwards the received message to the SWITCH module through the first QSGMII, and sends the first quantity to the MCU module. After receiving the messages sent by the PHY module, the SWITCH module counts a second number of the received messages and sends the second number to the MCU module. And after receiving the first quantity and the second quantity, the MCU module correspondingly stores the first quantity, the second quantity and the first parameter.
Wherein, the utility model discloses in, the MCU module passes through SMI and is connected with the PHY module to receive the first quantity that the PHY module sent through this SMI, it is specific, the first quantity of the message that other equipment that the PHY module statistics was received sent, if the message that other equipment sent is not received to this PHY module in presetting time interval, then think that this first quantity statistics is accomplished, then send this first quantity for the MCU module through SMI. It should be noted that, in the present invention, the process of counting the first number of the messages sent by other devices currently received is completed in the counting register in the PHY module.
The MCU module is connected to the SWITCH module via an SMI, and receives a second number sent by the SWITCH module via the SMI, specifically, the SWITCH module counts the second number of the received messages sent by the PHY module, and if the SWITCH module does not receive the messages sent by the PHY module within a preset time interval, it considers that the counting of the second number is completed, and sends the second number to the MCU module via the SMI. It should be noted that, in the present invention, the process of counting the second number of the received messages sent by the PHY module is completed in the counting register in the SWITCH module.
And after receiving the first quantity and the second quantity, the MCU module compares the first quantity with the second quantity, and if the first quantity is consistent with the second quantity, the current first parameter is determined to be the optimal first parameter.
Furthermore, in the present invention, before the testing, the MCU module initially sets the parameters of the first QSGMII in the PHY module. Specifically, the MCU module sends a first initialization parameter to the PHY module, and performs initialization setting on a parameter of a first QSGMII in the PHY module.
The utility model discloses in, MCU module among the QSGMII signal transmission packet loss processing circuit sends first parameter to the PHY module to this MCU module passes through the first quantity that the PHY module sent and the second quantity that the SWITCH module sent, confirms the optimum first parameter, improves the QSGMII signal quality who is used for transmitting the message among the QSGMII signal transmission packet loss processing circuit, and then has improved message transmission's quality and efficiency.
Example 2:
in order to further improve the accuracy of the message sent by the SWITCH module to the PHY module, on the basis of the above embodiment, in the present invention, the MCU module 101 is further configured to send a second parameter to the SWITCH module 102;
the SWITCH module 102 is further configured to receive the second parameter, and adjust a parameter of a second QSGMII in the SWITCH module, which is used to send a packet to the PHY module, according to the second parameter; sending the received packet to the PHY module 103;
the PHY module 103 is further configured to receive the packets sent by the SWITCH module 102, count a third number of the currently received packets sent by the SWITCH module 102, and send the third number to the MCU module 101;
the MCU module 101 is further configured to receive the third number, determine an optimal second parameter of the SWITCH module 102 according to the second number, the third number, and the second parameter, and send the optimal second parameter to the SWITCH module 102.
The utility model discloses in, because in the application process of reality the equipment still sends the message to other equipment except receiving the message that other equipment sent, so the utility model discloses in, when testing message transmission process, still can test the SWITCH module and send the message to the PHY module, send the process for other equipment with the message by the PHY module again. In order to reduce the packet loss rate of the packet in the process of sending the packet to other equipment by the QSGMII signal transmission packet loss processing circuit, improve the efficiency and the quality of the packet transmission, the utility model discloses in, can also confirm the optimal second parameter of the SWITCH module for reduce the packet loss rate of the in-process packet of the SWITCH module to the PHY module sending packet, improve the quality of QSGMII signal.
Specifically, the utility model discloses in, the MCU module is saved the second QSGMII's that the SWITCH module used when sending the message to the PHY module at least two sets of second parameters in the MCU module, and the MCU module can be based on these at least two sets of second parameters, tests the message transmission process, and the final determination QSGMII signal quality is the best second parameter of the SWITCH module when the highest.
In the present invention, the second parameter is a parameter of the second QSGMII of the SWITCH module, and the second parameter may include only one sub-parameter or at least two sub-parameters. The number of sub-parameters included in the second parameter may be the same as or different from the number of sub-parameters included in the first parameter, and is not limited herein. For example, the second parameter contains sub-parameters ob _ post0, ob _ prec, ob _ port1, and ob _ lev.
In this embodiment, the MCU module may adjust a parameter of a second QSGMII signal in the SWITCH module, where the second QSGMII signal is used to send a packet to the PHY module. Specifically, in this embodiment of the application, the MCU module sends the second parameter to the SWITCH module, and the SWITCH module modifies the second parameter according to the second parameter after receiving the second parameter, thereby changing the amplitude of the signal of the second QSGMII, the edge of the signal, and the jitter of the signal.
Specifically, the process of determining the optimal second parameter includes: the MCU module sends the group of second parameters to the SWITCH module aiming at any one group of at least two groups of second parameters corresponding to the second parameters. And after receiving the second parameter, the SWITCH module adjusts the parameter of the second QSGMII according to the second parameter. When the second QSGMII is the second parameter, after the SWITCH module receives the packet sent by the PHY module, the SWITCH module counts a second number of the received packets, sends the second number to the MCU module, and forwards the received packet to the PHY module. After receiving the messages sent by the SWITCH module, the PHY module determines a third number of the received messages sent by the SWITCH module, sends the third number to the MCU module, and sends the received messages to other devices. And after receiving the second quantity and the third quantity, the MCU module correspondingly stores the second quantity, the third quantity and the second parameter.
And after receiving the second quantity and the third quantity, the MCU module compares the second quantity with the third quantity, and if the second quantity is consistent with the third quantity, the current second parameter is determined to be the optimal second parameter.
Furthermore, in the present invention, before the testing, the MCU module initially sets the parameters of the second QSGMII in the SWITCH module. Specifically, the MCU module sends a second initialization parameter to the SWITCH module, and performs initialization setting on a parameter of a second QSGMII in the SWITCH module.
Example 3:
in order to make QSGMII signal transmission packet loss processing circuit can receive the message that other equipment sent, on the basis of each above-mentioned embodiment the utility model discloses in, QSGMII signal transmission packet loss processing circuit still includes: a first transformer module 104 and a first RJ45 interface 105, wherein the first transformer module 104 is connected to the PHY module 103, and the first RJ45 interface 105 is connected to the first transformer module 104;
the first RJ45 interface 105 is configured to receive a message sent by the other device, and send the message to the first transformer module 104;
the first transformer module 104 is configured to receive a packet sent by the first RJ45 interface 105, and send the packet to the PHY module 103.
The utility model discloses in, other equipment are based on the network is sent when losing packet processing circuit transmission message to QSGMII signal transmission, but the PHY module can not directly receive the message from the network, but needs other modules to receive the message from the network, forwards this PHY module with received message again.
Based on this, the utility model provides a QSGMII signal transmission loses packet processing circuit still includes first transformer module and first RJ45 Interface, and wherein this first transformer module passes through the Medium Dependent Interface (MDI) and is connected with the first port of PHY module, and this first RJ45 Interface passes through MDI and is connected with this first transformer module.
Specifically, the utility model discloses in, the message that other equipment in the net twine receiving network sent is passed through to first RJ45 interface to send this message for first transformer module through MDI, send this message for the PHY module by this first transformer module again, realized that the PHY module receives the message that other equipment sent.
Example 4:
in order to make QSGMII signal transmission packet loss processing circuit can send the message to other equipment, on the basis of each above-mentioned embodiment the utility model discloses in, QSGMII signal transmission packet loss processing circuit still includes: a second transformer module 106 and a second RJ45 interface 107, wherein the second transformer module 106 is connected to the PHY module 103, and the second RJ45 interface 107 is connected to the second transformer module 106;
the second transformer module 106 is configured to receive a packet sent by the PHY module 103, and send the packet to the second RJ45 interface 107;
the second RJ45 interface 107 is configured to receive the message sent by the second transformer module 106, and send the message to the other device.
The utility model discloses in, after the PHY module received the message that the SWITCH module sent, this message need be sent for other equipment, therefore this PHY module need be with the message routing that this SWITCH module received sent for other equipment.
However, in the present invention, when receiving a message sent by the QSGMII packet loss processing circuit, other devices receive the message based on the network, but the PHY module cannot directly send the message to other devices, and instead, the PHY module is required to send the message to other modules, and then the other modules send the message to other devices through the network.
Based on this, the utility model provides a QSGMII signal transmission loses packet processing circuit still includes second transformer module and second RJ45 interface, and wherein this second transformer module passes through MDI and PHY module's second port and is connected, and this second RJ45 interface passes through MDI and this second transformer module and is connected.
Specifically, the utility model discloses in, the second transformer passes through MDI and receives the message that the PHY module sent to send this message for second RJ45 interface through MDI, send this message for other equipment through the net twine by this second RJ45 interface again.
Example 5:
in order to disclose PHY module first parameter and SWICTH module second parameter, on the basis of above-mentioned each embodiment the utility model discloses in, QSGMII signal transmission loses packet processing circuit still includes: the display module 108, the display module 108 is connected with the MCU module 101;
the display module 108 is configured to display the first parameter and/or the second parameter.
The utility model discloses in, this QSGMII signal transmission packet loss processing circuit still includes display module, and this display module is connected with the MCU module. If the MCU module stores the current first parameter of the PHY module, the display module acquires the current first parameter of the PHY module from the MCU module and displays the first parameter. In addition, if the MCU module stores the current second parameter of the SWITCH module, the display module may further obtain the current second parameter of the SWITCH module from the MCU module and display the current second parameter.
Fig. 2 is the utility model provides a QSGMII signal transmission loses packet processing circuit and other equipment's schematic diagram, as this fig. 2 shows, this QSGMII signal transmission loses packet processing circuit includes first RJ45 interface, second RJ45 interface, first transformer module, second transformer module, PHY module, SWITCH module, MCU module and display module, and other equipment are for beating the appearance of flowing. The flow meter is connected with a first RJ45 interface and a second RJ45 interface through network cables respectively, the first RJ45 interface is connected with a first transformer module through MDI, the first transformer module is connected with a first port (port 1) of a PHY module through MDI, the PHY module is connected with an SWITCH module through QSGMII, the PHY module is further connected with an MCU module through SMI, the SWITCH module is connected with the MCU module through SMI, the MCU module is connected with a display module, a second port (port 2) of the PHY module is connected with a second transformer module through MDI, and the second transformer module is connected with the second RJ45 interface through MDI.
Example 6:
in order to improve message transmission's signal quality, confirm the optimum first parameter, on the basis of above-mentioned each embodiment the utility model discloses in, MCU module 101 specifically is used for if the number of times of receiving first quantity and second quantity is unanimous with the group number of the first parameter of preserving in advance, then compares the first quantity that the first parameter of every group corresponds and the first difference of second quantity, confirms the first parameter that minimum first difference corresponds as optimum first parameter.
When the number of times that the MCU receives the first quantity and the second quantity is consistent with the group number of the stored first parameters, the MCU module determines that the first quantity and the second quantity corresponding to each group of first parameters are currently stored, the MCU module compares the difference value between the first quantity and the second quantity corresponding to each group of first parameters, determines the first parameter corresponding to the minimum difference value as the optimal first parameter and sends the optimal first parameter to the PHY module, and the PHY module adjusts the parameter of the first QSGMII to the optimal first parameter. The utility model discloses in, if when there are two at least minimum difference values, then one in these two at least minimum difference values is selected at random to the MCU module to confirm the first parameter that this minimum difference value corresponds as the optimum first parameter.
Example 7:
in order to improve the signal quality of message transmission, confirm the optimum first parameter, on the basis of above-mentioned each embodiment the utility model discloses in, MCU module 101 specifically is used for if the number of times of receiving second quantity and third quantity is unanimous with the group number of the second parameter of preserving in advance, then compares the second quantity that every group second parameter corresponds and the second difference of third quantity, confirms the second parameter that minimum second difference corresponds as optimum second parameter.
When the number of times that the MCU module receives the second quantity and the third quantity is consistent with the group number of the stored second parameters, the MCU module determines that the third quantity and the second quantity corresponding to each second parameter are currently stored, the MCU module compares the difference value between the third quantity and the second quantity corresponding to each second parameter, determines the second parameter corresponding to the minimum difference value as the optimal second parameter, and sends the optimal second parameter to the SWITCH module, so that the SWITCH module adjusts the parameter of the second QSGMII to the optimal second parameter. The utility model discloses in, if when there are two at least minimum difference values, then one in these two at least minimum difference values is selected at random to the MCU module to confirm the first parameter that this minimum difference value corresponds as the optimum first parameter.
Example 8:
in order to realize data transmission between the SWITCH module and the MCU and data transmission between the PHY module and the MCU, on the basis of the above embodiments, in the present invention, an SMI is provided on the SWITCH module, and the SMI of the SWITCH module is connected to the MCU module;
and the PHY module is provided with an SMI, and the SMI of the PHY module is connected with the MCU module.
The utility model discloses in, the MCU module passes through SMI and is connected with the PHY module to receive the first quantity that the PHY module sent through this SMI.
And, in the utility model discloses in, the MCU module passes through SMI and is connected with the SWITCH module to receive the second quantity that the SWITCH module sent through this SMI.
Example 9:
in order to avoid the message being completely received, but the PHY module is still in the state of receiving the message, reduces the wasting of resources of the PHY module, on the basis of each of the above embodiments, the PHY module is further configured to consider that the first quantity statistics is completed if the message sent by other devices is not received within the preset time interval.
The utility model discloses in, the message that other equipment sent is received to the PHY module, but probably there is other equipment to have accomplished the sending of all messages, but the PHY module is still waiting for the message that receives other equipment and send, has wasted the resource of PHY module. Based on this, in the utility model discloses in, if the PHY module is in predetermined time interval, does not receive the message that other equipment sent, then think that the message reception has been accomplished, then stop waiting for to receive the message.
Specifically, the PHY module counts a first number of received messages sent by other devices, and if the PHY module does not receive messages sent by other devices within a preset time interval, the PHY module considers that the first number counting is completed, and sends the first number to the MCU module through SMI. It should be noted that, in the present invention, the process of counting the first number of the messages sent by other devices currently received is completed in the counting register in the PHY module.
Example 10:
in order to avoid that the message has been completely received, but the SWITCH module is still in the state of receiving the message, reduces the wasting of resources of the SWITCH module, on the basis of each above-mentioned embodiment, in the utility model discloses in, the SWITCH module is still used for if not receiving in the predetermined time interval the message that the PHY module sent, then thinks the statistics of second quantity is accomplished.
The utility model discloses in, the message that PHY module sent is received to the SWITCH module, but probably there is other equipment to have accomplished the sending of all messages, but the SWITCH module is still waiting for the message that receives PHY module and send, has wasted the resource of SWITCH module. Based on this, in the utility model discloses in, if the SWITCH module is in predetermined time interval, the message that PHY module sent has not been received, then think that message reception has been accomplished, then stop to wait for to receive the message.
Specifically, the SWITCH module counts a second number of received messages sent by the PHY module, and if the SWITCH module does not receive the message sent by the PHY module within a preset time interval, it considers that the second number counting is completed, and sends the second number to the MCU module through SMI. It should be noted that, in the present invention, the process of counting the second number of the received messages sent by the PHY module is completed in the counting register in the SWITCH module.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present application without departing from the spirit and scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims of the present application and their equivalents, the present application is intended to include such modifications and variations as well.
Claims (10)
1. A QSGMII signal transmission packet loss processing circuit, comprising: the SWITCH module is connected with the PHY module, and the SWITCH module and the PHY module are respectively connected with the MCU module;
the MCU module is used for sending a first parameter to the PHY module;
the PHY module is configured to receive the first parameter, and adjust a parameter of a first QSGMII in the PHY module, where the parameter is used to send a packet to the SWITCH module, according to the first parameter; receiving at least one message sent by other equipment, counting a first number of the received messages, sending the received messages to the SWITCH module through the first QSGMII, and sending the first number to the MCU module;
the SWITCH module is configured to receive the packets sent by the PHY module, count a second number of the received packets, and send the second number to the MCU module;
the MCU module is used for determining the optimal first parameter of the PHY module according to the first quantity, the second quantity and the first parameter and sending the optimal first parameter to the PHY module.
2. The QSGMII signal transmission packet loss processing circuit according to claim 1, wherein the MCU module is further configured to send a second parameter to the SWITCH module;
the SWITCH module is further configured to receive the second parameter, and adjust a parameter of a second QSGMII in the SWITCH module, which is used to send a packet to the PHY module, according to the second parameter; sending the received message to the PHY module;
the PHY module is further configured to receive the packets sent by the SWITCH module, count a third number of the currently received packets sent by the SWITCH module, and send the third number to the MCU module; and sending the received message sent by the SWITCH module to the other equipment;
the MCU module is further configured to receive the third number, determine an optimal second parameter of the SWITCH module according to the second number, the third number, and the second parameter, and send the optimal second parameter to the SWITCH module.
3. The QSGMII signal transmission packet loss processing circuit according to claim 2, wherein the MCU module is further configured to: and if the times of receiving the second quantity and the third quantity are consistent with the group number of the second parameters stored in advance, comparing a second difference value between the second quantity and the third quantity corresponding to each group of the second parameters, and determining the second parameter corresponding to the minimum second difference value as the optimal second parameter.
4. The QSGMII signal transmission packet loss processing circuit according to claim 2, wherein the QSGMII signal transmission packet loss processing circuit further includes: a second transformer module and a second RJ45 interface, the second transformer module being connected to the PHY module, the second RJ45 interface being connected to the second transformer module;
the second transformer module is configured to receive a packet sent by the PHY module and send the packet to the second RJ45 interface;
and the second RJ45 interface is used for receiving the message sent by the second transformer module and sending the message to the other equipment.
5. The QSGMII signal transmission packet loss processing circuit according to claim 1, wherein the QSGMII signal transmission packet loss processing circuit further includes: the first transformer module is connected with the PHY module, and the first RJ45 interface is connected with the first transformer module;
the first RJ45 interface is configured to receive a message sent by the other device, and send the message to the first transformer module;
the first transformer module is configured to receive a packet sent by the first RJ45 interface and send the packet to the PHY module.
6. The QSGMII signal transmission packet loss processing circuit according to claim 2, wherein the QSGMII signal transmission packet loss processing circuit further includes: the display module is connected with the MCU module;
the display module is used for displaying the first parameter and/or the second parameter.
7. The QSGMII signal transmission packet loss processing circuit according to claim 1, wherein the MCU module is specifically configured to, if the number of times of receiving the first number and the second number is consistent with the number of sets of the prestored first parameter, compare a first difference between the first number and the second number corresponding to each set of the first parameter, and determine a first parameter corresponding to a minimum first difference as an optimal first parameter.
8. The QSGMII signal transmission packet loss processing circuit according to claim 1, wherein an SMI is provided on the SWITCH module, and the SMI of the SWITCH module is connected to the MCU module;
and the PHY module is provided with SMI, and the SMI of the PHY module is connected with the MCU module.
9. The QSGMII signal transmission packet loss processing circuit according to claim 1, wherein the PHY module is further configured to consider that the first number statistics is completed if a packet sent by another device is not received within a preset time interval.
10. The QSGMII signal transmission packet loss processing circuit according to claim 1, wherein the SWITCH module is further configured to consider that the second quantity statistics is completed if a packet transmitted by the PHY module is not received within a preset time interval.
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| CN202221350311.7U CN217789686U (en) | 2022-05-27 | 2022-05-27 | QSGMII signal transmission packet loss processing circuit |
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| CN202221350311.7U CN217789686U (en) | 2022-05-27 | 2022-05-27 | QSGMII signal transmission packet loss processing circuit |
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