CN108806607B

CN108806607B - Pixel device and display apparatus

Info

Publication number: CN108806607B
Application number: CN201810383822.0A
Authority: CN
Inventors: 张盛东; 吴继祥; 廖聪维; 易水平; 霍新新; 王莹
Original assignee: Peking University Shenzhen Graduate School
Current assignee: Peking University Shenzhen Graduate School
Priority date: 2018-04-26
Filing date: 2018-04-26
Publication date: 2020-04-28
Anticipated expiration: 2038-04-26
Also published as: CN108806607A

Abstract

Pixel device and display device. The present application relates to a pixel apparatus including a light emitting device; a programming module receiving a data signal and a reference signal; a capacitance module, coupled to the programming module, comprising a first capacitance; wherein the programming module charges the first capacitor using the data signal and the reference signal; a threshold voltage extraction module coupled to the capacitance module and including a first transistor through which the first capacitance is charged with a power supply voltage; a driving module coupled between the threshold extraction module and the light emitting device, the driving module including a second transistor; the driving module drives the light-emitting device to emit light through the second transistor by using a power supply voltage and a driving voltage provided by the capacitance module; wherein the first and second transistors are substantially the same size and have an active area distance of no more than 10 microns; the reference signal comprises a first or second reference signal, the first reference signal being greater than the data signal, the second reference signal being less than the data signal.

Description

Pixel device and display apparatus

Technical Field

The application belongs to the technical field of display, and particularly relates to a pixel device capable of compensating device threshold voltage change and high level voltage change and corresponding display equipment.

Background

Active-matrix organic light emitting diode (AMOLED) display is becoming the mainstream display technology, mainly because of its advantages of fast response speed, wide viewing angle, low power consumption, etc. The AMOLED display array is composed of Thin Film Transistors (TFTs) and pixels of organic light emitting devices, and the electrical characteristics of the TFTs have an important influence on the display effect. Low temperature poly-silicon (LTPS) TFTs are by far the only technology that has enabled large-scale commercial application of AMOLEDs. This is mainly because LTPS TFTs have higher mobility, good device stability. However, the LTPS TFT still has the problem of uneven threshold voltage and mobility distribution, and the influence of uneven electrical characteristics of the LTPS TFT on the optical characteristics of the AMOLED in high-resolution and large-size AMOLED panel displays needs to be compensated.

In general, the basic principle of the compensation circuit within an AMOLED pixel is: the threshold voltage of the driving transistor is extracted under the control of the row scanning line, the value of the threshold voltage is superposed on the data voltage of the data line to form a driving voltage, and the driving voltage is converted into a driving current corresponding to the light emitting brightness by the driving transistor. However, the conventional AMOLED pixel circuit structure formed by LTPS TFT transistors is generally complicated, and compensation based on the above principle may greatly increase the complexity of the circuit, and the above principle can only compensate for the threshold voltage drift of the transistor. In fact, for the AMOLED pixel circuit, besides the performance problem possibly caused by the non-uniform threshold voltage of the LTPS TFT transistor, there are other problems to be solved related to IR drop and TFT leakage current, which are not solved by the existing AMOLED pixel circuit.

The IR DROP problem refers to a voltage DROP problem (current-resistance voltage DROP) caused by a parasitic resistance on a power supply line of the AMOLED panel. When current flows through the parasitic resistance on the power line, the potential at the power input port in the pixel circuit matrix has a certain difference from the set value, which may cause non-uniformity of display brightness of pixels at different positions on the display panel.

In addition, the polysilicon TFT display panel has a large leakage current, which may cause unstable gate voltage of the driving transistor, and affect the stability of the OLED light emission during the light emission stage.

Modern application methods increasingly demand larger display sizes, higher resolutions, 3D displays, and the like. The high frame frequency display technology has the advantages of clear display picture, good color saturation and the like, is widely applied to large-screen display and the like, and is a research hotspot of the display industry. High resolution and high frame rate display require the pixel circuit to have a fast data writing speed, require that the threshold voltage extraction does not occupy the data writing time, do not affect the threshold voltage compensation precision, and require that the input data voltage range is small.

Disclosure of Invention

In view of the problems in the prior art, there is provided according to the present application a pixel device including a light emitting device; a programming module configured to receive a data signal and a reference signal; a capacitance module, coupled to the programming module, comprising a first capacitance; wherein the programming module is configured to charge the first capacitance with the data signal and the reference signal; a threshold voltage extraction module coupled to the capacitance module and including a first transistor configured to recharge the first capacitance with a supply voltage through the first transistor; a driving module coupled between the threshold extraction module and the light emitting device, the driving module including a second transistor; the driving module is configured to drive the light emitting device to emit light through the second transistor by using a power supply voltage and a driving voltage provided by the capacitance module; wherein the first transistor and the second transistor are substantially the same size and have an active region distance of no more than 10 microns.

In particular, a first terminal of the first capacitor is configured to receive the reference signal through the programming module, and a second terminal of the first capacitor is configured to receive the data signal through the programming module.

In particular, a first terminal of the first capacitor is configured to receive the data signal through the programming module, and a second terminal of the first capacitor is configured to receive the reference signal through the programming module.

In particular, a first pole of the first transistor is coupled to a power supply, a second pole thereof is coupled to the second terminal of the first capacitor, and a third pole thereof is coupled to the first terminal of the first capacitor; and a first pole of the second transistor is coupled to a power source, a second pole thereof is coupled to an anode of the light emitting device, and a third pole thereof is coupled to a second pole of the first transistor.

In particular, the programming module includes a third transistor having a first pole coupled to the second terminal of the first capacitor, a second pole configured to receive the data signal, and a third pole configured to receive a first scan signal; the programming module further comprises a fourth transistor having a first pole coupled to the first terminal of the first capacitor, a second pole configured to receive the reference signal, and a third pole configured to receive the second scan signal; wherein the active level of the first scan signal is behind the active level of the second scan signal by a predetermined time interval.

In particular, the predetermined time interval is greater than 0 and less than or equal to 40 microseconds.

In particular, the programming module includes a third transistor having a first pole coupled to the second terminal of the first capacitor, a second pole configured to receive the data signal, and a third pole configured to receive a first scan signal; the programming module further includes a fourth transistor having a first pole coupled to the first terminal of the first capacitor, a second pole configured to receive the reference signal, and a third pole configured to receive the first scan signal.

In particular, the programming module comprises a third transistor, a first pole of which is coupled to the second end of the first capacitor, a second pole of which is configured to receive the reference signal, and a third pole of which is configured to receive a first scan signal; the programming module further includes a fourth transistor having a first pole coupled to the first terminal of the first capacitor, a second pole configured to receive the data signal, and a third pole configured to receive the first scan signal.

In particular, the capacitor module further comprises a second capacitor, a first end of the second capacitor is coupled to a power supply, and a second end of the second capacitor is coupled to a second end of the first capacitor.

In particular, the capacitance module further comprises a second capacitance having a first end configured to receive the reference signal and a second end coupled to the second end of the first capacitance.

In particular, the threshold voltage extraction module further comprises a fifth transistor coupled between the high level and the first transistor, a first pole thereof being coupled to a power supply, a second pole thereof being coupled to the first pole of the first transistor, a third pole thereof being configured to receive a third scan signal; the active level of the third scan signal is one data write line time behind the active level of the first scan signal.

In particular, the threshold voltage extraction module further comprises a fifth transistor, a first pole of the first transistor is coupled to a power supply, and a third pole of the first transistor is coupled to the first end of the first capacitor; and a first pole of the fifth transistor is coupled to the second pole of the first transistor, a second pole thereof is coupled to the second terminal of the first capacitor, and a third pole thereof is configured to receive the third scan signal.

In particular, the driving module further includes a sixth transistor coupled between the second transistor and the light emitting device, a first pole of which is coupled to the second pole of the second transistor, a second pole of which is coupled to the anode of the light emitting device, and a third pole of which is configured to receive a light emission control signal.

The present application also provides a display apparatus including a gate driving device configured to provide one or more scan signals and/or light emission control signals via a plurality of scan lines; a data driving device configured to supply data signals via a plurality of data lines; and a pixel device array comprising a plurality of pixel devices as described in any one of the preceding claims, wherein the programming module of the pixel device is configured to receive corresponding scan signals and data signals, and the driving module of the pixel device is configured to receive the emission control signal.

Drawings

Preferred embodiments of the present application will now be described in further detail with reference to the accompanying drawings, in which:

FIG. 1 is a schematic diagram of a pixel circuit according to one embodiment of the present application;

FIG. 2 is a timing diagram illustrating the operation of the pixel circuit shown in FIG. 1;

fig. 3-5 are performance diagrams of the pixel circuit of fig. 1;

FIG. 6 is a schematic diagram of a pixel circuit according to another embodiment of the present application;

FIG. 7 is a timing diagram illustrating the operation of the pixel circuit shown in FIG. 6;

FIG. 8 is a schematic diagram of a pixel circuit according to yet another embodiment of the present application;

FIG. 9 is a timing diagram illustrating the operation of the pixel circuit shown in FIG. 8;

FIG. 10 is a schematic diagram of a pixel circuit according to one embodiment of the present application;

FIG. 11 is a timing diagram illustrating the operation of the pixel circuit shown in FIG. 10;

FIG. 12 is a schematic diagram of a pixel circuit according to yet another embodiment of the present application;

FIG. 13 is a schematic diagram of a pixel circuit according to another embodiment of the present application;

FIG. 14 is a schematic diagram of a pixel circuit according to yet another embodiment of the present application;

FIG. 15 is a schematic diagram of a display device according to an embodiment of the present application; and

fig. 16 is a timing chart showing the operation of the display device of fig. 15.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the following detailed description, reference is made to the accompanying drawings that form a part hereof and in which is shown by way of illustration specific embodiments of the application. In the drawings, like numerals describe substantially similar components throughout the different views. Various specific embodiments of the present application are described in sufficient detail below to enable those skilled in the art to practice the teachings of the present application. It is to be understood that other embodiments may be utilized and structural, logical or electrical changes may be made to the embodiments of the present application.

Some terms are first explained: the transistors in the present application may be transistors of any structure, such as Bipolar Junction Transistors (BJTs) or Field Effect Transistors (FETs). When the transistor is a bipolar transistor, the control electrode of the transistor refers to the base electrode of the bipolar transistor, the first electrode can be the collector or the emitter of the bipolar transistor, and the corresponding second electrode can be the emitter or the collector of the bipolar transistor, and in the practical application process, the emitter and the collector can be interchanged according to the signal flow direction; when the transistor is a field effect transistor, the control electrode refers to a gate electrode of the field effect transistor, the first electrode may be a drain electrode or a source electrode of the field effect transistor, and the corresponding second electrode may be a source electrode or a drain electrode of the field effect transistor, and in an actual application process, "source electrode" and "drain electrode" may be interchanged according to a signal flow direction.

The light-emitting element may be an organic light-emitting diode, an electrodeless light-emitting diode, a quantum dot light-emitting diode, or the like, and in other embodiments, may be another light-emitting element.

After research, the inventors found that although uniformity in large-area display arrays of LTPS TFTs is not ideal, the electrical characteristics of the LTPS TFTs have little difference between two TFT grains which are physically located close to each other in the active region and have the same grain. According to one embodiment, this distance may be, for example, within 10 microns. Of course, as TFT technology advances, the size of the die may become larger and larger, so that the physical distance between the active regions of the transistors that can be used to compensate for the threshold voltage of each other may also become larger and larger. Based on this finding, the inventors proposed a concept of extracting the threshold voltages of other transistors having a distance from the active region of the driving transistor less than a preset level (e.g., less than 10 μm) in place of the threshold voltage of the driving transistor and designing a corresponding pixel circuit based on this concept. Through tests, the actual effect is relatively ideal.

The first embodiment is as follows:

fig. 1 is a schematic diagram of a pixel circuit according to an embodiment of the invention. The pixel circuit may include: a programming module 110, a capacitance module 120, a threshold voltage extraction module 130, a driving module 140, and a light emitting element 150.

The programming module 110 may be used to quickly charge the capacitor C1 in the capacitor module 120 under the control of a row SCAN signal, such as SCAN [ n ], to accomplish the task of data input.

The capacitance module 120 may be used to store the data voltage V_dataAnd threshold voltage information of the transistor T3 in the threshold voltage extraction block 130 while the SCAN signal line SCAN n can be reduced]The effect of the capacitance coupling effect caused by the jump and the influence of the off-state leakage current of the TFT transistor coupled to the capacitance module on the stability of the driving voltage, for example, maintain the stability of the driving voltage supplied to the driving module 140.

The threshold voltage extraction module 130 may be used for extracting the threshold voltage on another SCAN signal SCAN [ n +1]]And extracts and superimposes threshold voltage information of the transistor T3 adjacent to the driving transistor T5 in the driving module 140 on the data voltage V_dataAs the driving voltage supplied to the driving module 140.

The driving module 140 may be configured to convert the driving voltage provided by the capacitor module 120 into a driving current corresponding to the emitting brightness under the control of the emitting signal EM, and cooperate with the power supply V_DDThe light emitting element 150 is driven to emit light.

According to one embodiment, the program module 110 may include a transistor T1 and a transistor T2, the capacitance module 120 may include a capacitor C1 and a capacitor C2, the threshold voltage extraction module 130 may include a transistor T3 and a transistor T4, and the driving module 140 may include a driving transistor T5 and a transistor T6. These transistors are all P-type transistors in this embodiment. Of course, complementary substitutions by N-type transistors are also possible, as will be appreciated by those skilled in the art.

According to one embodiment, the gates of the transistor T1 and the transistor T2 in the program module 110 are both tied to the SCAN line SCAN [ n ]]And the drain of the transistor T1 is connected to the data signal line V_dataThe source of transistor T1 is connected to the bottom plate of capacitor module C1. The drain of the transistor T2 is connected to the reference signal input terminal V_RefThe source of transistor T2 is connected to the upper plate of capacitor C1. Of course, the programming module 110 may have a different structure in other embodiments.

According to one embodiment, in the capacitor module 120, the capacitor C1 is connected to the source of the transistor T1And the pole to the source of transistor T2. The upper plate of the capacitor C2 is connected to the power supply line V_DDThe lower plate of which is connected to the lower plate of capacitor C1. The capacitor C2 is used for reducing the SCAN [ n ] signal]The capacitive coupling effect caused by the jump affects the programming voltage of the pixel and keeps the voltage difference between the source and the gate of the driving transistor T5 constant during the light emitting period.

According to one embodiment, the source of the transistor T4 in the threshold voltage extraction module 130 is connected to the power supply line V_DDA drain connected to the source of the transistor T3, and a gate connected to another SCAN signal line SCAN [ n +1]]. The drain of the transistor T3 in the threshold voltage extraction module 130 is connected to the lower plates of the capacitors C1 and C2, the source thereof is connected to the drain of the transistor T4, and the gate thereof is connected to the upper plate of the capacitor C1. Wherein, as shown in FIG. 2, the SCAN signal SCAN [ n +1]]Low level pulse ratio SCAN signal SCAN [ n ]]Lags behind the data write line time or the length of time by an active level.

According to one embodiment, the driving module 140 may include a transistor T5 having a gate connected to the lower plates of the capacitors C1 and C2 and a source connected to the power line V_DD(ii) a The driving module 140 may further include a transistor T6 having a source connected to the drain of the transistor T5, a drain connected to the anode of the light emitting element 150, and a gate connected to the light signal line EM. The cathode of the light emitting element 150 is connected to the common potential GND.

Fig. 2 is a timing chart showing the operation of the pixel circuit shown in fig. 1, and the operation flow of the pixel circuit in fig. 1 will be described with reference to fig. 2.

The driving method of the pixel circuit shown in fig. 1 is to perform data input and threshold voltage extraction row by row, and the light emission mode is to emit light row by row. The line scanning frame time is divided into a programming stage, a threshold voltage extraction stage and a light-emitting stage, and an initialization stage is not required. The threshold voltage extraction stage does not occupy data writing time, and the accuracy of threshold voltage extraction can be improved.

According to one embodiment, during the programming phase, when the SCAN signal SCAN [ n ]]Jumping to low potential, the transistor T1 and the transistor T2 are conducted, the upper plate of the capacitor C1 is connected with the reference potentialV_REFThe lower plate receives a data signal V_DATAAnd charges the capacitor C1 to complete the data writing task.

According to one embodiment, during the threshold voltage extraction phase, the SCAN signal SCAN [ n ]]Jump to high potential, SCAN signal SCAN [ n +1]]Jumping to low potential, the transistor T3 and the transistor T4 are turned on, and the power line V_DDThe capacitor C1 and the capacitor C2 are charged, so that the upper plate potential of the capacitor C1 is V_DD-|V_TH3L, wherein V_TH3Is the threshold voltage of transistor T3. Thus, the lower plate potential of the capacitor C1 is V_DD-|V_TH3|-V_REF+V_DATA. Thus, the source potential V of the transistor T5_DDPotential difference with its grid is V_REF-V_DATA+|V_TH3L. The threshold voltage extraction stage stores the threshold voltage of the transistor T3 through C1, and completes the operation of extracting the threshold voltage of the transistor T3.

According to one embodiment, the SCAN signal SCAN [ n +1] is generated during the light emitting period]Jumping to high potential, the light emitting signal EM changes to low potential, the transistor T5 and the transistor T6 are turned on, the transistor T5 converts the driving voltage provided by the capacitor module 120 into a driving current, and the driving current is supplied to the capacitor module at the power voltage V_DDThe light emitting element 150 is driven to emit light.

Fig. 3 is a diagram showing a transient simulation of the pixel circuit shown in fig. 1 at various stages. In the flow of operation under control of the control signal shown in fig. 2, the voltage at node A, B within the pixel circuit is as shown in fig. 3.

During the programming phase, the voltage at the node A, B is respectively the reference voltage V_REFAnd a data voltage V_DATA. During the threshold voltage extraction phase, the voltage of node A is equal to V_DD-|V_TH3Voltage at node B equal to V_DD-|V_TH3|-V_REF+V_DATA. In the light emitting period, the voltage at the node B is kept constant, the capacitor module 120 supplies the driving voltage to the transistor T5, and the power line V is connected to the power line_DDThe lower light emitting element 150 is driven to emit light. The current flowing through the transistor T5 in fig. 3 remains substantially constant throughout the light emission period.

FIG. 4 shows that when the threshold voltage of the transistor T5 appearsThe current flowing through the transistor T5 varies in the case of ripple. As shown in fig. 4, assuming that the threshold voltage of the transistor T5 varies up and down by 0.5V due to non-uniformity of the threshold voltage, the voltage of the node B also varies up and down by about 0.5V. According to the previous assumption, since the transistor T3 and the transistor T5 are physically very close to each other, the threshold voltage of the transistor T3 can be considered to be substantially the same as the threshold voltage of the transistor T5. The current flowing through the transistor T5 is calculated by the formula

From the expression, when | V_TH3|＝|V_TH5It can be ensured that the current through the transistor T5 is no longer related to the threshold voltage of the transistor T5. Therefore, the variation of the threshold voltage of the transistor T5 does not substantially affect the magnitude of the current flowing through the transistor T5. As shown in fig. 4, in the case where the threshold voltage of the transistor T5 does not drift, the voltage of the node B may be about 6.71V; when | V_TH5Increasing the voltage I by 0.5V, and correspondingly reducing the voltage of the node B by 0.5V to about 6.22V; when | V_TH5If | is decreased by 0.5V, the voltage at node B is correspondingly increased by 0.5V to about 7.21V. But regardless of the voltage sum | V of the node B_TH5How | varies, the current flowing through the transistor T5 is about 0.59 microampere, and it can be seen that the pixel circuit has a good threshold voltage compensation effect.

In the present embodiment, the potential difference between the source and the gate of the transistor T5 is V_SG＝|V_TH3|+V_REF-V_DATANot only with | V_TH5Is independent of and also dependent on the supply voltage V_DDIs irrelevant. Therefore, the IR DROP on the power line has no influence on the current flowing through the transistor T5, i.e., the influence of the IR DROP on the power line can be compensated.

The IR DROP on the power line appears as the supply voltage V_DDBy varying the supply voltage V_DDTo simulate an IR DROP scenario. According to one embodiment, when the supply voltage V is low_DDWhen floating does not occur and the value is 10V, the gate voltage of the transistor T5 may be about 6.8V; when the power supply voltage V_DDFloating to 10.5VThe gate voltage of the transistor T5 may be about 7.3V; when the power supply voltage V_DDIn the case of floating to 9.5V, the gate voltage of the transistor T5 may be about 6.3V. However, as shown in fig. 5, in these three cases, the magnitude of the current flowing through the transistor T5 and the power supply voltage V_DDThe variations are almost independent, all around 1.4 microamperes, and it can be seen that the pixel circuit is well able to compensate for the effects of IR DROP on the power supply line.

In the present embodiment, during the light emitting period, the transistor T1 and the transistor T2 are in the off state, the source-drain voltage difference is small, the off-state leakage current is small, and the power supply V supplies power to the transistors_DDThe capacitor module 120 is charged to compensate for the effect of capacitor leakage. The capacitor C2 is used to maintain the driving voltage stable and to keep the voltage difference between the source and the gate of the transistor T5 constant, and the small leakage current keeps the driving voltage stable in the whole light emitting period, so as to ensure the stability of the current flowing through the light emitting device 150.

In the pixel circuit of this embodiment, the line scanning does not require initialization for one frame time, and the data voltage V_DATAIs directly added to the threshold voltage of the transistor T3 to form the driving voltage, so that the input data voltage V_DATAThe input data range can be smaller without capacitive coupling voltage division like some pixel circuits, and the power consumption of AMOLED display can be reduced.

In addition, in the pixel circuit of this embodiment, the reference voltage V is set during the programming stage_REFAnd a data voltage V_DATAThe capacitor module 120 is charged by being directly connected to two ends of the capacitor C1, so that the data writing operation can be completed quickly. And, the data voltage V_DATAThe threshold voltage extraction of the transistor T3 and the input of the transistor(s) are performed in steps, and the threshold voltage extraction does not take time for data input, thereby improving the threshold voltage extraction accuracy. In addition, the light-emitting control signal is used to control the operating state of the driving module 140, so that the light-emitting element 150 emits light only in the light-emitting stage, and the display contrast can be improved.

Example two:

FIG. 6 is a schematic diagram of a pixel circuit according to one embodiment of the present application. As shown in fig. 6The pixel circuit structure is similar to that of the first embodiment. The difference between the second embodiment and the first embodiment is that the driving module 640 of fig. 6 only includes the transistor T5, and the source of the transistor T5 directly receives the power voltage V_DDIts drain connected to the anode of light emitting device 650 and its gate still connected to the lower plates of capacitors C1 and C2. The layout can reduce the number of transistors and reduce light-emitting control signal lines, simplify the structure of the pixel circuit, and increase the OLED light-emitting area, namely the aperture ratio, of the pixel circuit. Meanwhile, the pixel circuit in fig. 6 only needs one group of scanning signals, and the design of a peripheral driving circuit is simplified.

Fig. 7 is a signal timing diagram for controlling the operation of the pixel circuit shown in fig. 6, and the driving principle of the pixel circuit in the second embodiment is similar to that of the first embodiment except that the transistor T5 is turned on during both the programming phase and the threshold voltage extraction phase. However, since the programming phase and the threshold voltage extraction phase are short in time, the current flowing through the light emitting device 150, such as an OLED device, is not large.

Example three:

FIG. 8 is a schematic diagram of a pixel circuit according to one embodiment of the present application. As shown in fig. 8, the pixel circuit structure is similar to that of the first embodiment. The difference between the pixel circuit shown in FIG. 8 and the first embodiment is that the threshold voltage extraction module 830 includes only the transistor T3, and the source of the transistor T3 directly receives the power voltage V_DDIts drain is still connected to the lower plates of capacitors C1 and C2, and its gate is still connected to the upper plate of capacitor C1. Also, since the transistor T4 in the threshold voltage extraction block is removed, the pixel circuit can use only one SCAN signal SCAN n]. Thus, the aperture ratio of the pixel circuit can be increased, and the circuit structure can be simplified.

Fig. 9 is a signal timing diagram for controlling the operation of the pixel circuit shown in fig. 8, and the operation flow of the pixel circuit of fig. 8 will be described in detail with reference to fig. 9. The pixel circuit line scanning time is divided into a programming phase, a threshold voltage extraction phase and a light-emitting phase.

According to one embodiment, during the programming phase, when the SCAN signal SCAN [ n ]]Jump and jumpAt a low potential, the transistors T1 and T2 are turned on, and the reference signal V is turned on_REFAnd a data signal V_DATARespectively connected to the upper and lower plates of the capacitor C1 to charge the capacitor C1. At this stage, the transistor T3 is not completely turned off and is in a turned-on state. The potential of the lower plate of the capacitor C1 is adjusted by the magnitude of the current flowing through the transistor T3. If the threshold voltage of the transistor T3 is small or the mobility is large, the current flowing through the transistor T3 is large, so that the potential of the lower plate of the capacitor C1 is increased, that is, the voltage difference between the gate and the source of the transistor T5 is reduced, and the influence of the non-uniformity of the threshold voltage and the mobility of the transistor T5 can be compensated to some extent. That is, the threshold voltage value of the transistor T5 is substantially synchronized with the threshold voltage value of the transistor T3, so that the influence of the threshold voltage and mobility non-uniformity of the transistor T5 can be compensated to some extent by the transistor T3 connected to the gate of the transistor T5. Meanwhile, the upper plate potential of the capacitor C1 is always approximately equal to the voltage on the reference signal line.

In the threshold voltage extraction phase, the operation of the pixel circuit in the threshold voltage extraction phase is the same as that of the pixel circuit shown in fig. 2, and is not described here again.

In the light emitting period, when the light emitting signal EM changes to the low potential, the transistor T5 converts the driving voltage provided by the capacitor module 820 into the driving current, and the driving current is supplied to the power supply V_DDDrives the light emitting element 850 to emit light. In the threshold voltage extraction stage, the power supply voltage V is used_DDThe capacitor module 820 is charged, if the threshold extraction time is long enough, with the supply voltage V_DDThe lower plate potentials of the capacitor elements C1 and C2 can be finally kept stable. Then during the light emitting period, the transistor T3 is turned off, and the lower plate potentials of the capacitors C1 and C2 are the data voltage superimposed on the threshold voltage of the transistor T3, and remain stable.

Example four:

fig. 10 is a circuit diagram of a pixel according to a fourth embodiment, and the circuit configuration and the operation principle of fig. 10 are similar to those of fig. 8. The important difference between the pixel circuit shown in fig. 10 and the pixel circuit shown in fig. 8 is that the capacitance module 1020 in the pixel circuit shown in fig. 10 only includes the capacitor C1. In particular, a capacitorThe upper plate of C1 directly receives the power voltage V_DDThe lower plate is still connected to the source of transistor T1 and the lower plate of capacitor C2. In addition, in the programming module 1010, the gates of the transistors T1 and T2 may be respectively used for receiving two different SCAN signals, for example, the gate of the transistor T1 may be used for receiving the SCAN signal SCAN [ n ]]The source and drain are connected in the same manner as in the previous embodiment, and the gate of the transistor T2 can be used for receiving the SCAN signal SCAN [ n-1]]The source and drain connections are substantially the same as in the previous embodiment.

Fig. 11 is a signal timing chart for controlling the operation of the pixel circuit shown in fig. 10, and the following describes the operation flow of the pixel circuit shown in fig. 11 in conjunction with fig. 11. The pixel circuit in the fourth embodiment operates in a similar manner to the third embodiment, wherein the capacitor module 1020 includes only one capacitor C1. In the fourth embodiment, the gate of the transistor T1 is connected to the SCAN signal line SCAN [ n ], and the gate of the transistor T2 is connected to the SCAN signal line SCAN [ n-1 ]. The reason why two overlapped scan signals are used to control the transistor T1 and the transistor T2 in the programming module of the pixel circuit shown in this embodiment is that if the same scan signal is used, the two transistors will be turned on at the same time in the programming stage, and the potential of the upper plate of the capacitor C1 may suddenly jump to a high level, which may make the transistor T3 in the threshold voltage extracting module 1030 unable to be turned on, and affect the normal operation of the transistor T3. On the other hand, however, the overlap time of the low level between the SCAN signal SCAN [ n-1] and the SCAN signal SCAN [ n ] at least satisfies a certain threshold, for example, within at least 5 microseconds, so as to satisfy the time for charging the capacitor C1. According to one embodiment, as shown in FIG. 11, the low level of the SCAN signal SCAN [ n-1] is advanced by a time earlier than the SCAN signal SCAN [ n ], i.e., a time difference between two adjacent dotted lines is, for example, 0 to 5 μ s.

Scan [ n-1] signal after completion of the programming phase or SCAN]When jumping to high level, SCAN [ n ] is generated due to SCAN signal]Still at the low level, the transistor T1 remains on and the data line V_DATAStill connected to the lower plate of the capacitive element C1, and therefore can use the potential V on the data line_DATATo reduce the sweepScan-1 signal]The jump causes a capacitive coupling effect to affect the operation of the transistor T3.

Of course, according to another embodiment, the driving module 1040 may include only the transistor T5.

Example five:

fig. 12 is a schematic diagram of a pixel circuit according to a fifth embodiment, where the circuit structure of fig. 12 is similar to the circuit structure of fig. 1, and the driving timing diagram of fig. 12 is the same as the driving timing diagram of fig. 1, and thus, the description thereof is omitted here.

The pixel circuit shown in fig. 12 is different from the pixel circuit structure shown in fig. 1 in that the upper plate of a capacitor C2 is connected to a reference potential line V in the pixel circuit shown in fig. 13_REFInstead of the upper plate of the capacitor C2 being connected to the power supply line to V as in the pixel circuit shown in fig. 1_DD. In the present embodiment, the reference potential V_REFCan reduce the power supply line V_DDThe capacitive load of (2) reduces the dynamic power consumption of the display. The function of the capacitor C2 is to reduce the SCAN line SCAN [ n ]]The off-state leakage current of the TFT transistor coupled to the capacitor module 1220 is reduced by the capacitive coupling effect caused by the jump, and the voltage of the output of the capacitor module 1220 is kept stable. Specifically, the equivalent capacitance of the gate of the transistor T3 is now the series value of the capacitors C1 and C2, and the series value of the capacitors C1 and C2 is much larger than the parasitic capacitance associated with the gate of the transistor T3, thus overcoming the effect of parasitic capacitive coupling such as the transistor T2 on the gate of the transistor T3. In addition, since it is relative to V_DDIn other words, the reference potential line V_REFThe upper voltage is more stable, and the capacitor C2 is connected to the reference potential line V_REFTherefore, the output voltage of the capacitor module 1220 can be more stable. In addition, it is noted that in this embodiment, the gates of the transistors T1 and T2 in the program module 1210 are connected to the SCAN line SCAN [ n ]]And the gate of the transistor T4 in the threshold voltage extraction module 1230 is connected to the SCAN line SCAN [ n +1]]Wherein SCAN [ n ]]And SCAN [ n +1]]The timing of (2) is shown in fig. 7.

Example six:

fig. 13 is a circuit diagram of a pixel according to a sixth embodiment, the circuit configuration of fig. 13 is similar to that of fig. 1,

the driving timing diagram of the pixel circuit shown in fig. 13 is the same as the driving timing diagram of the pixel circuit shown in fig. 1, and thus, the description thereof is omitted.

The pixel circuit of FIG. 13 differs from the pixel circuit of FIG. 1 in that the pixel circuit of FIG. 13 will program the reference potential line V of the module 1310_REFConnected to the drain of the transistor T1, a data line V_DATAThe connection to the drain of the transistor T2 is reversed with respect to the connection to the drains of the transistors T1 and T2 in fig. 1. Such a transposed structure may be applicable to all of the previous embodiments, according to different embodiments. Thus, in the present embodiment, the upper plate of the capacitor C1 is connected to the reference potential line V through the transistor T1_REF' (V here)_REF' with the aforementioned V_REFIn contrast, V of the front_REFGreater than V_DATAHere, V_REF' less than V_DATAThe difference between the reference voltage and the data voltage is the programming voltage of the pixel), the lower plate of the capacitor C1 is connected to the data line V through the transistor T2_DATA. In addition, it is noted that in this embodiment, the gates of the transistors T1 and T2 in the program module 1210 are connected to the SCAN line SCAN [ n ]]And the gate of the transistor T4 in the threshold voltage extraction module 1230 is connected to the SCAN line SCAN [ n +1]]Wherein SCAN [ n ]]And SCAN [ n +1]]The timing of (2) is shown in fig. 7.

Example seven:

fig. 14 is a pixel circuit diagram according to a seventh embodiment, the circuit structure of fig. 14 is similar to the circuit structure of fig. 1, and a driving timing diagram of the pixel circuit shown in fig. 14 is the same as the driving timing diagram of the pixel circuit shown in fig. 1, and is not repeated here.

The pixel circuit in fig. 14 differs from the pixel circuit in fig. 1 in that the pixel circuit in fig. 14 has the positions of the transistors T3 and T4 in fig. 1 reversed. The source of the transistor T3 in the threshold voltage extraction module 1430 is connected to the power supply line V_DDAnd the drain is connected to the source of the transistor T4, and the gate is connected to the upper plate of the capacitor C1. The gate of the transistor T4 in the threshold voltage extraction module 1430 is connected to the SCAN signal line SCAN [ n +1]]And its drain is connected to the lower plates of capacitors C1 and C2.This is done so that the source of the transistor T3 is tied to the source of the transistor T5.

FIG. 15 illustrates a display device according to one embodiment of the present application. The display device may include: a gate driving circuit 1510 for generating a scan pulse signal and supplying a scan signal to the pixel circuit through a scan line; a data driving circuit 1520 for generating a data voltage signal representing gray scale information and supplying the data voltage signal to the pixel circuit through the data line; a light emission control signal driving circuit 1530 for generating a light emission control signal and controlling the light emitting element to emit light by the light emission signal line; the display device 1540 includes a pixel array constituted by the pixel circuits described in the embodiments described above.

Fig. 16 is an operation timing chart of the display device shown in fig. 15. When the n-1 th row SCAN signal SCAN [ n-1] transitions to the active level, Pixel _11 and Pixel _12 complete data input, and when the next row SCAN signal SCAN [ n ] transitions to the active level, Pixel _21 and Pixel _22 complete data input, and Pixel _11 and Pixel _12 complete the threshold voltage extraction phase. After the threshold voltage extraction stage, the light-emitting signal EM [ n ] starts to become effective, and the Pixel _11 and the Pixel _12 start to emit light; waiting for one line time again, the light-on signal EM [ n +1] starts to become active, and Pixel _21 and Pixel _22 emit light.

The above-described embodiments are provided for illustrative purposes only and are not intended to be limiting, and various changes and modifications may be made by those skilled in the art without departing from the scope of the present disclosure, and therefore, all equivalent technical solutions should fall within the scope of the present disclosure.

Claims

1. A pixel device comprises

A light emitting device;

a programming module configured to receive a data signal and a reference signal;

a capacitance module, coupled to the programming module, comprising a first capacitance; wherein the programming module is configured to charge the first capacitance with the data signal and the reference signal;

a threshold voltage extraction module coupled to the capacitance module and including a first transistor configured to recharge the first capacitance with a supply voltage through the first transistor;

a driving module coupled between the threshold voltage extraction module and the light emitting device, the driving module including a second transistor; the driving module is configured to drive the light emitting device to emit light through the second transistor by using a power supply voltage and a driving voltage provided by the capacitance module;

wherein the first transistor and the second transistor are substantially the same size and have an active region distance of no more than 10 microns; the reference signal comprises a first or second reference signal, the first reference signal being greater than the data signal, the second reference signal being less than the data signal.

2. The pixel device of claim 1, wherein a first terminal of the first capacitance is configured to receive the first reference signal through the programming module and a second terminal of the first capacitance is configured to receive the data signal through the programming module.

3. The pixel device of claim 1, wherein a first terminal of the first capacitance is configured to receive the data signal through the programming module and a second terminal of the first capacitance is configured to receive the second reference signal through the programming module.

4. A pixel device as claimed in claim 2 or 3, wherein a first pole of the first transistor is coupled to a power supply, a second pole thereof is coupled to the second terminal of the first capacitance, and a third pole thereof is coupled to the first terminal of the first capacitance; and a first pole of the second transistor is coupled to a power source, a second pole thereof is coupled to an anode of the light emitting device, and a third pole thereof is coupled to a second pole of the first transistor.

5. The pixel device of claim 2, wherein the programming module comprises a third transistor having a first pole coupled to the second terminal of the first capacitor, a second pole configured to receive the data signal, and a third pole configured to receive a first scan signal; the programming module further comprises a fourth transistor having a first pole coupled to the first terminal of the first capacitor, a second pole configured to receive the first reference signal, and a third pole configured to receive a second scan signal; wherein the active level of the first scan signal is behind the active level of the second scan signal by a predetermined time interval.

6. The pixel device of claim 2, wherein the programming module comprises a third transistor having a first pole coupled to the second terminal of the first capacitor, a second pole configured to receive the data signal, and a third pole configured to receive a first scan signal; the programming module also includes a fourth transistor having a first pole coupled to the first terminal of the first capacitor, a second pole configured to receive the first reference signal, and a third pole configured to receive a first scan signal.

7. The pixel device of claim 3, wherein the programming module comprises a third transistor having a first pole coupled to the second terminal of the first capacitor, a second pole configured to receive the second reference signal, and a third pole configured to receive a first scan signal; the programming module further includes a fourth transistor having a first pole coupled to the first terminal of the first capacitor, a second pole configured to receive the data signal, and a third pole configured to receive a first scan signal.

8. The pixel device of claim 4, wherein said capacitance module further comprises a second capacitance having a first terminal coupled to a power supply and a second terminal coupled to a second terminal of said first capacitance.

9. The pixel device of claim 4, wherein the capacitance module further comprises a second capacitance having a first end configured to receive the reference signal and a second end coupled to a second end of the first capacitance.

10. The pixel device of claim 4, wherein the threshold voltage extraction module further comprises a fifth transistor coupled between a power supply and the first transistor, a first pole thereof coupled to the power supply, a second pole thereof coupled to the first pole of the first transistor, a third pole thereof configured to receive a third scan signal; the active level of the third scan signal is one data write line time later than the active level of the first scan signal.

11. A pixel device as claimed in claim 2 or 3, wherein the threshold voltage extraction module further comprises a fifth transistor, a first pole of the first transistor being coupled to a power supply, a third pole thereof being coupled to a first terminal of the first capacitance; and a first pole of the fifth transistor is coupled to the second pole of the first transistor, a second pole thereof is coupled to the second terminal of the first capacitor, and a third pole thereof is configured to receive a third scan signal.

12. The pixel device according to claim 1, wherein the driving module further comprises a sixth transistor coupled between the second transistor and the light emitting device, a first pole thereof being coupled to a second pole of the second transistor, a second pole thereof being coupled to an anode of the light emitting device, and a third pole thereof being configured to receive a light emission control signal.

13. A display device comprises

A gate driving device configured to provide one or more scan signals and/or light emission control signals via a plurality of scan lines;

a data driving device configured to supply data signals via a plurality of data lines; and a pixel device array comprising a plurality of pixel devices according to any one of claims 1-12, wherein a programming module of the pixel devices is configured to receive respective scan and data signals, and a driving module of the pixel devices is configured to receive the emission control signal.