CN108962145B - Display device, pixel circuit and driving method thereof - Google Patents

Display device, pixel circuit and driving method thereof Download PDF

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Publication number
CN108962145B
CN108962145B CN201810713115.3A CN201810713115A CN108962145B CN 108962145 B CN108962145 B CN 108962145B CN 201810713115 A CN201810713115 A CN 201810713115A CN 108962145 B CN108962145 B CN 108962145B
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transistor
pixel circuit
row
line
light
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CN108962145A (en
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张盛东
吴继祥
廖聪维
王莹
霍新新
易水平
谢锐彬
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Peking University Shenzhen Graduate School
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Peking University Shenzhen Graduate School
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

The invention discloses a display device, a pixel circuit and a driving method thereof. The pixel circuit comprises a driving transistor, second to fifth transistors and a second capacitor, wherein the driving transistor is used for providing driving current for a light-emitting device, the second to fifth transistors are used as switching tubes and used for responding to scanning signals, data signals and light-emitting control signals, and the second capacitor is used for storing sampling voltage. The invention compensates the threshold voltage of the driving transistor, reduces the influence of uneven mobility of the transistor and improves the contrast of the display device. The invention can support two modes of line-by-line light emitting and simultaneous light emitting, and can be applied to a high-resolution or high-frame frequency display device.

Description

Display device, pixel circuit and driving method thereof
Technical Field
The invention relates to the technical field of display, in particular to a display device, a pixel circuit and a driving method thereof.
Background
Organic Light-Emitting Diode (OLED) displays have been widely researched in recent years due to their advantages of high brightness, high Light-Emitting efficiency, wide viewing angle, low power consumption, etc., and are rapidly applied to new generation display devices.
The driving method of the OLED display may be Passive Matrix OLED (PMOLED) or Active Matrix OLED (AMOLED). Although the passive matrix driving is low in cost, the high-resolution display cannot be realized due to the cross-talk phenomenon, the passive matrix driving current is large, and the service life of the OLED is shortened. In contrast, in the active matrix driving mode, transistors with different numbers are arranged on each pixel to serve as current sources, cross talk is avoided, the required driving current is small, the power consumption is low, the service life of the OLED is prolonged, high-resolution display can be achieved, and meanwhile, the active matrix driving can easily meet the requirements of large-area and high-gray-scale display. The AMOLED display array is composed of two simple Thin Film Transistors (TFTs) and pixels of an organic light emitting element, and although the circuit has a simple structure, the circuit cannot compensate for the shift of the threshold voltage of the driving transistor T1 and the OLED or the non-uniformity of the threshold voltage of the TFT devices at various positions of the panel due to the polycrystalline material used for the TFT devices. When the threshold voltage of the driving transistor T1, the threshold voltage of the OLED, or the threshold voltage of the OLED shifts or varies from place to place on the panel, the driving current IDS changes, and different pixels on the panel shift differently due to the bias voltage, which causes non-uniformity of the panel display. Low Temperature Poly-silicon (LTPS) TFTs are by far the only technology that has enabled large-scale commercial application of AMOLEDs. This is mainly because LTPS TFTs have higher mobility, good device stability. However, LTPS TFTs still have the problem of uneven threshold voltage and mobility distribution.
Disclosure of Invention
The application provides a display device, a pixel circuit and a driving method thereof, which solve the problem of uneven threshold voltage and mobility distribution in the prior art.
According to a first aspect, an embodiment provides a pixel circuit including a driving transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a second capacitor, and a light emitting device; wherein:
the second pole of the driving transistor is connected with the first pole of the third transistor and is used for driving the light-emitting device to emit light; the control electrode of the driving transistor is connected with the second electrode of the fifth transistor;
a first pole of the second transistor is connected with a first pole of a fourth transistor, and a second pole of the second transistor is connected with a second pole of the driving transistor; a control electrode of the second transistor is connected to a scan line of a next row of the pixel circuit or to a control line of a row of the pixel circuit;
a control electrode of the third transistor is connected to a light-emission control signal line of a row in which the pixel circuit is located, a second electrode of the third transistor is connected to an anode of the light-emitting device, and a cathode of the light-emitting device is grounded;
a control electrode of the fourth transistor is connected to a scanning line of a row in which the pixel circuit is located;
a control electrode of the fifth transistor is connected to a scanning line of a row in which the pixel circuit is located;
the second capacitor is connected between the control electrode of the driving transistor and the first electrode of the second transistor and used for extracting the aging information of the driving transistor when the second transistor is conducted;
wherein:
a first pole of the driving transistor is connected to a power line, a second pole of the fourth transistor is connected to a data line of a column where the pixel circuit is located, and a first pole of the fifth transistor is connected to a reference voltage line;
or, a first pole of the driving transistor is connected to a power line, a second pole of the fourth transistor is grounded, and a first pole of the fifth transistor is connected to a data line of a column where the pixel circuit is located;
or, a first pole of the driving transistor is connected to a scanning line of a row where the pixel circuit is located, a second pole of the fourth transistor is connected to a data line of a column where the pixel circuit is located, and a first pole of the fifth transistor is connected to a reference voltage line.
According to a second aspect, there is provided in one embodiment a driving method of the pixel circuit of the first aspect,
the driving method comprises a programming phase, a compensation phase and a light-emitting phase; for any row of pixel circuits:
in a programming stage, setting a scanning line of the row of pixel circuits to be at a low potential, so that the fourth transistor and the fifth transistor are turned on, and a reference voltage line and a data line of the row of pixel circuits are used for charging a second capacitor and a first capacitor to write data;
in the compensation stage, setting the scanning line of the pixel circuit in the row to be at a high potential and setting the scanning line of the next row to be at a low potential, so that the second transistor and the driving transistor are conducted, and the power line of the pixel circuit in the row is used for charging the first capacitor and the second capacitor to compensate the voltage;
in a light emitting stage, setting a scanning line of the pixel circuit of the row to be at a high potential and setting a scanning line of a next row to be at a high potential, so that the second transistor, the fourth transistor and the fifth transistor are turned off, and setting a light emitting control signal line of the pixel circuit of the row to be at a low potential, so that the sixth transistor and the third transistor are turned on, thereby enabling two ends of the second capacitor to be in short circuit for discharging, and keeping the voltage at two ends of the first capacitor unchanged for a period of time.
According to a third aspect, there is provided in one embodiment a display device comprising:
a pixel matrix comprising a plurality of pixel circuits according to any one of claims 3 to 7 arranged in a matrix; the pixel circuits are respectively connected with the respective scanning lines, the data lines and the light-emitting control signal lines;
a gate driving circuit for transmitting a scan signal to the pixel matrix through the scan line to gate each row of the pixel circuits;
the data driving circuit is used for sending data signals to the pixel matrix through the data lines, wherein the pixel circuits in the same column are connected to the same data line;
and the light-emitting control signal driving circuit is used for sending light-emitting control signals to the pixel matrix through the light-emitting control signal lines, wherein the pixel circuits in the same row are connected to the same light-emitting control signal line.
According to a fourth aspect, an embodiment provides a driving method of the display device according to the third aspect, the driving method comprising a programming phase, a compensation phase and a light emitting phase;
the gate driving circuit performs the following operations on the pixel circuits of each row in the pixel matrix in sequence:
in a programming stage, the gate driving circuit sets a scanning line of the row of pixel circuits to be at a low potential, so that the fourth transistor and the fifth transistor are turned on, a reference voltage line and a data line of the row of pixel circuits charge the second capacitor and the first capacitor, and data is written in;
in the compensation stage, the gate driving circuit sets the scanning line of the pixel circuit in the row to a high potential and sets the scanning line of the next row to a low potential, so that the second transistor and the driving transistor are conducted, and the power line of the pixel circuit in the row charges the first capacitor and the second capacitor to compensate the voltage;
in a light emitting stage, the gate driving circuit sets a scanning line of the pixel circuit of the row and a scanning line of the next row to be high potential, so that the second transistor, the fourth transistor and the fifth transistor are turned off; the light-emitting control signal driving circuit sets the light-emitting control signal line of the pixel circuit at a low potential, so that the sixth transistor and the third transistor are conducted, the two ends of the second capacitor are short-circuited to discharge, and the voltage at the two ends of the first capacitor is kept unchanged for a period of time.
According to the display device, the pixel circuit and the driving method thereof of the above embodiments, since the initialization current does not flow through the light emitting device, the pixel circuit has a good display contrast. The control signal required by the pixel circuit is simple, the pixel circuit shares the upper and lower scanning lines, and the data input voltage of the pixel circuit is not divided by capacitive coupling, so that the required data input voltage range is small.
Drawings
FIG. 1 is a block diagram of a pixel circuit according to an embodiment of the disclosure;
FIG. 2 is a timing diagram illustrating an operation of a pixel circuit according to an embodiment of the disclosure;
FIG. 3 is a timing diagram illustrating an operation of another pixel circuit according to an embodiment of the disclosure;
FIG. 4 is a timing diagram illustrating an operation of another pixel circuit according to an embodiment of the disclosure;
FIG. 5 is a diagram of a pixel circuit structure according to the second embodiment;
FIG. 6 is a diagram of a pixel circuit structure according to the third embodiment;
FIG. 7 is a diagram of a pixel circuit structure according to the fourth embodiment;
FIG. 8 is a flowchart illustrating a driving method of a pixel circuit according to the fifth embodiment;
FIG. 9 is a schematic diagram of a display device according to a sixth embodiment of the disclosure;
FIG. 10 is a timing diagram illustrating operation of a display device according to a sixth embodiment of the disclosure;
fig. 11 is a flowchart of a driving method of a display device according to the seventh embodiment.
Detailed Description
The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.
Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where such sequence must be followed.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings).
In the display of a high-resolution and large-size AMOLED panel, the influence of non-uniform electrical characteristics of LTPS TFT on the optical characteristics of the AMOLED needs to be compensated, the basic principle of the compensation circuit is to extract the threshold voltage of the driving transistor under the control of a row scanning line, then superpose the value of the threshold voltage on the data voltage of a data line to form a driving voltage, and then convert the driving voltage into a driving current corresponding to the luminous brightness by the driving transistor. However, the conventional AMOLED pixel circuit structure including LTPS TFTs is generally complicated, and compensation based on the above principle may significantly increase the circuit complexity, and the above principle can only compensate for the threshold voltage shift of the transistor. In fact, for the AMOLED pixel circuit, besides performance problems possibly caused by non-uniform threshold voltage of the LTPS TFT transistor, other problems such as non-uniform mobility of the LTPS TFT, IR-Drop, reduction of contrast ratio caused by initialization current flowing through the OLED, and the like need to be solved, which are not well solved by the existing AMOLED pixel circuit.
The active layer of the LTPS TFT device is of a polycrystalline structure, and due to the fact that grains are different in size, grain boundaries exist and the crystal orientations are different, the mobility of the LTPS TFT device is greatly uneven on a large-size panel. The driving transistor converts a driving voltage corresponding to the light emitting current into a driving current, and the light emitting currents generated by different pixels have a non-uniform phenomenon for a specific driving voltage due to the difference of the mobility of the driving transistor in different pixels. The current principle of many pixel circuits for compensating mobility is to make the driving transistor in a conducting state in a data writing stage, and the written data voltage has a certain relation with the mobility of the driving transistor. However, this results in a large range of input data voltages, and the relationship between the value of the input data voltage and the light emission luminance is not well defined. The IR-Drop problem refers to a voltage Drop problem (current-resistance voltage Drop) caused by a parasitic resistance on a power line of the AMOLED panel. When current flows through the parasitic resistance on the power line, the potential at the power input port in the pixel circuit matrix has a certain difference from the set value, which may cause non-uniformity of display brightness of pixels at different positions on the display panel. In addition, current flows through the light emitting device in the initialization stage of the current pixel circuit, which causes the light emitting device to emit light in the programming stage, reducing the display contrast, and simultaneously, a large current flows through the light emitting device in the programming stage, increasing the power consumption. In order to solve this problem, the current pixel circuit is often designed to be complicated, and the number of control signals required is increased.
In practical application, the requirements for larger display size, higher resolution, 3D display, and the like are increasing. The high frame rate display technology has the advantages of clear display picture, good color saturation and the like, and is a research hotspot in the display industry when being widely applied to large-screen display. However, high resolution and high frame rate display require the pixel circuit to have a fast data writing speed, and require a small input data voltage range.
Some terms referred to in the present application will be described first.
The transistors in the present application may be transistors of any structure, such as Bipolar Junction Transistors (BJTs) or Field Effect Transistors (FETs). When the transistor is a bipolar transistor, the control electrode of the transistor refers to the grid electrode of the bipolar transistor, the first electrode can be the collector or the emitter of the bipolar transistor, the corresponding second electrode can be the emitter or the collector of the bipolar transistor, and in the practical application process, the emitter and the collector can be interchanged according to the signal flow direction; when the transistor is a field effect transistor, the control electrode refers to a gate electrode of the field effect transistor, the first electrode may be a drain electrode or a source electrode of the field effect transistor, and the corresponding second electrode may be a source electrode or a drain electrode of the field effect transistor, and in an actual application process, "source electrode" and "drain electrode" may be interchanged according to a signal flow direction.
The Light Emitting element may be an Organic Light-Emitting Diode (OLED), an electrodeless Light-Emitting Diode, a quantum dot Light-Emitting Diode, or the like, and in other embodiments, may be another Light Emitting element. The first end of the light emitting element may be a cathode or an anode, and correspondingly, the second end of the light emitting element is an anode or a cathode. Those skilled in the art will understand that: current should flow from the anode to the cathode of the light emitting element, and thus, the anode and the cathode of the light emitting element can be determined based on the flow direction of current.
The active level can be a high level or a low level, and can be adaptively replaced according to the function implementation of a specific component.
The first level terminal and the second level terminal are both terminals of a power supply provided for the operation of the pixel circuit. In one embodiment, the first level terminal may be a high level terminal VDDThe second level terminal is a low level terminal VSSOr ground, and in other embodiments, may be adaptively replaced. It should be noted that: for a pixel circuit, a first level terminal (e.g., a high level terminal V)DD) And a second level terminal (e.g., a low level terminal V)SSOr ground) is not a part of the pixel circuit of the present application, and the first level terminal and the second level terminal are specifically introduced for description in order to make those skilled in the art better understand the technical solution of the present application.
It should be noted that, for the convenience of description and to make the technical solutions of the present application more clearly understood by those skilled in the art, the first node a, the second node B and the third node C are introduced in the present document to identify relevant parts of the circuit structure, and cannot be regarded as terminals additionally introduced in the circuit.
For convenience of description, the high level adopts VHCharacterisation, low level using VLAnd (5) characterizing.
In the embodiment of the invention, the pixel circuit has a good compensation effect on the uneven threshold voltage phenomenon of the driving transistor, and can reduce the influence of the uneven mobility of the driving transistor on the display effect. The pixel circuit passes through the current of the light emitting device and the power supply VDDRegardless, the effect of IR-Drop on the power line on the display effect can be compensated.
Example one
Referring to fig. 1, a structure diagram of a pixel circuit according to an embodiment of the disclosure includes: for being connected in series to a power supply line VDDAnd a driving transistor T1 and a third transistor T3 between the light emitting element OLED, and a second transistor T2, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and capacitors C1 and C2. Also comprises a power line VDDData line VDATAReference voltage line VREFSCAN line SCAN [ n ]]SCAN line SCAN [ n +1]]And emission control signal line EM [ n ]]Wherein n denotes the serial number of the row in which the pixel circuit is located, e.g. SCAN line SCAN [ n ]]SCAN line SCAN [ n +1]]Respectively denote a scanning line of the pixel circuit of the n-th row and a scanning line of the pixel circuit of the n + 1-th row, and similarly, the emission control signal line EM [ n [ ]]A light emission control signal line of the pixel circuit of the nth row is shown. Here, the SCAN line of the row where the pixel circuit is located in this embodiment is referred to as SCAN line SCAN [ n ] of this row]. The scanning line of the next row of the pixel circuit is called the scanning line SCAN [ n +1] of the next row]. Power supply line V of pixel circuitDDFor providing power to the pixel circuit. Reference voltage line V of pixel circuitREFFor providing a reference voltage for the pixel circuit. The driving transistor T1 is used to drive the light emitting device OLED to emit light.
The second pole of the driving transistor T1 is connected to the first pole of the third transistor T3 to form a third node C for driving the light emitting device to emit light. The second electrode of the third transistor T3 is connected to the first terminal of the light emitting element OLED, i.e., the anode of the light emitting device OLED. The second terminal of the light emitting element OLED is connected to the reference ground, i.e., the cathode of the light emitting device OLED is connected to the reference ground. The first pole of the second transistor T2 is connected to the first pole of the fourth transistor T4 to form a second node B. The second pole of the second transistor T2 is connected to node C. The gate of the second transistor T2 is connected to the SCAN line SCAN [ n +1]]And a circuit for connecting the driving transistor and the capacitance element to extract aging information of the driving transistor, wherein the aging information refers to threshold voltage information and mobility information. The second pole of the fourth transistor T4 is connected to the data line VDATA. The first electrode of the driving transistor T1 is connected to the power supply line VDD. The second pole of the fifth transistor T5 is connected to the first pole of the sixth transistor T6 to formNode a. A first pole of the fifth transistor T5 is connected to a reference voltage line VREF. The second pole of the sixth transistor T6 is connected to the node B for storing the data voltage signal sampled from the data line during the programming phase. The gate of the driving transistor T1 is connected to the node a for providing a driving voltage corresponding to the light emitting brightness to the gate of the driving transistor T1. The gate of the third transistor T3 and the gate of the sixth transistor T6 are connected to the emission control signal line EM [ n [ ]]And the driving circuit is used for controlling whether the driving current flows through the light-emitting device or not and controlling the light-emitting state of the light-emitting device. While for the light emitting phase the first capacitor C1 is connected to the gate of the driving transistor T1 while the second capacitor C2 is shorted. The gate of the fourth transistor T4 and the gate of the fifth transistor T5 are connected to the SCAN line SCAN [ n ]]For sampling the data voltage on the data line to the second capacitor C2 and the first capacitor C1, and for inputting the reference voltage to the upper plate of the second capacitor C2. The first capacitor C1 is connected between the power supply line VDD and the node B. A second capacitor C2 between node a and node B.
Referring to fig. 2, a timing diagram of an operation of a pixel circuit according to an embodiment of the disclosure is shown, and an operation flow of the pixel circuit in fig. 1 will be described with reference to fig. 2. In a specific embodiment, the driving method of the pixel circuit shown in fig. 1 is to perform data input and threshold voltage extraction row by row, and the light emitting mode is to emit light row by row. The line scanning frame time is divided into a programming phase (1), a compensation phase (2) and a light-emitting phase (3), and an initialization phase is not required. When the pixel circuit is in a programming stage, a scanning line of a row where the pixel circuit is located is set to a low potential, and a scanning line of a next row of the pixel circuit and a light-emitting control signal line of the row where the pixel circuit is located are set to a high potential. When the pixel circuit works in a compensation stage, setting a scanning line of a row where the pixel circuit is positioned as a high potential, setting a scanning line of a next row of the pixel circuit as a low potential, and setting a light-emitting control signal line of the row where the pixel circuit is positioned as a high potential; when the pixel circuit works in a light-emitting stage, setting a scanning line of a row where the pixel circuit is positioned as a high potential, setting a scanning line of a next row of the pixel circuit as a high potential, and setting a light-emitting control signal line of the row where the pixel circuit is positioned as a low potential; or, when the pixel circuit is in the programming stage, setting the scanning line of the row where the pixel circuit is located at a low potential, setting the control line of the row where the pixel circuit is located at a high potential, and setting the light-emitting control signal line of the row where the pixel circuit is located at a high potential. When the pixel circuit works in the compensation stage, the scanning line of the row of the pixel circuit is set to be at a high potential, the control line of the row of the pixel circuit is set to be at a low potential, and the light-emitting control signal line of the row of the pixel circuit is set to be at a high potential. When the pixel circuit works in a light-emitting stage, the scanning line of the row of the pixel circuit is set to be at a high potential, the control line of the row of the pixel circuit is set to be at a high potential, and the light-emitting control signal line of the row of the pixel circuit is set to be at a low potential. The method specifically comprises the following steps:
in the programming phase (1), the scanning lines SCAN [ n ] of the pixel circuits of the row are set]Set to the low potential, the fourth transistor T4 and the fifth transistor T5 are turned on, so that the reference voltage line V of the row of pixel circuitsREFAnd a data line VDATAThe second capacitor C2 and the first capacitor C1 are charged, and data is written. I.e. when the line SCAN signal SCAN [ n ]]Jumping to a low potential, the fourth transistor T4 and the fifth transistor T5 are turned on, and the upper plate of the second capacitor C2 is connected to the reference voltage VREFThe lower plate of the second capacitor C2 and the lower plate of the first capacitor C1 receive the data signal VDATAAnd the capacitors C1 and C2 are charged, and the data writing task is completed.
In the compensation stage (2), the SCAN lines SCAN [ n ] of the pixel circuits of the row are connected]Set to high potential and SCAN line of next row SCAN [ n +1]]Set to the low potential, the second transistor T2 and the driving transistor T1 are turned on to make the power supply line V of the row of pixel circuitsDDThe first capacitor C1 and the second capacitor C2 are charged, and voltage compensation is performed. I.e. the line SCAN signal SCAN [ n ]]Jump to high potential, next row scanning signal SCAN [ n +1]]Jumping to low potential, the second transistor T2 is turned on, the driving transistor T1 is in saturation state, and the power line VDDThe first capacitor C1 and the second capacitor C2 are charged by the driving transistor T1, so that the upper plate potential of the second capacitor C2 is towards VDD-|VTH1Is close to (V)TH1The threshold voltage of the driving transistor T1).Since the compensation time Δ T is limited, at the end of the compensation phase, the upper plate potential of the second capacitor C2 is:
Figure GDA0002699412000000081
wherein, mu and CoxW, L are respectively the effective mobility, gate capacitance per unit area, channel width and channel length, V, of the drive transistor T1TH1To drive the threshold voltage, V, of the transistor T1AIs the upper plate voltage, V, of the second capacitor C2DDIs the power line voltage, VREFIs a reference voltage line voltage, C1Δ T is the compensation time, which is the capacitance of the first capacitor C1. The upper plate potential of the second capacitor C2 is approximately:
Figure GDA0002699412000000082
wherein, mu and CoxW, L are respectively the effective mobility, gate capacitance per unit area, channel width and channel length, V, of the drive transistor T1TH1To drive the threshold voltage, V, of the transistor T1AIs the upper plate voltage, V, of the second capacitor C2DDIs the supply line voltage, C1Δ T is the compensation time, which is the capacitance of the first capacitor C1. At this time, the lower plate potentials of the second capacitor C2 and the first capacitor C1 are:
VB＝VA-(VREF-VDATA)
......(1-3)。
wherein, VBIs the lower plate voltage, V, of the first capacitor C1AIs the upper plate voltage, V, of the second capacitor C2DATATo the data line voltage, VREFIs a reference voltage line voltage, so that a voltage related to the threshold voltage and mobility information of the driving transistor T1 is stored on the capacitors C1 and C2.
In the light emission phase (3), the SCAN line SCAN [ n ] of the pixel circuit of the row and the SCAN line SCAN [ n +1] of the next row are set to a high potential, so that the second transistor T2, the fourth transistor T5, and the fifth transistor T5 are turned off. The light emitting control signal line EM [ n ] of the pixel circuit in the row is set to a low potential, so that the sixth transistor T6 and the third transistor T3 are turned on, the two ends of the second capacitor C2 are shorted to discharge, and the voltage across the first capacitor C1 is kept unchanged for a period of time, so as to reduce the adverse effect of the mobility increase of the driving transistor T1 and compensate the threshold value of the driving transistor T1. That is, the scanning line SCAN [ n ] of the one row and the scanning line SCAN [ n +1] of the next row both become high potential, and the second transistor T2, the fourth transistor T4, and the fifth transistor T5 are all in the off state. At this time, the row emission control signal EM [ n ] transitions to the low level, the sixth transistor T6 and the third transistor T3 start to be turned on, the sixth transistor T6 is turned on, so that the lower plate of the first capacitor C1 is connected to the gate of the driving transistor T1, and the T6 connects the upper and lower plates of the second capacitor C2 together. At this time, the node a and the node B share the charge, because the upper and lower plates of the second capacitor C2 are connected together, the positive and negative charges on the plates are cancelled, the charge on the plate of the first capacitor C1 remains unchanged in the previous stage, and the potential of the node a is equal to that of the node B, and the potential is:
Figure GDA0002699412000000091
wherein, mu and CoxW, L are respectively the effective mobility, gate capacitance per unit area, channel width and channel length, V, of the drive transistor T1BIs the lower plate voltage, V, of the first capacitor C1AIs the upper plate voltage, V, of the second capacitor C2TH1To drive the threshold voltage, V, of the transistor T1DDIs the power line voltage, VDATAFor data line voltage, VREFIs a reference voltage line voltage, C1Δ T is the compensation time, which is the capacitance of the first capacitor C1. In the light emitting stage, the light emitting current flowing through the OLED is shown by the following formula:
Figure GDA0002699412000000092
wherein, mu and CoxW, L points areRespectively, effective mobility, gate capacitance per unit area, channel width and channel length, V, of the driving transistor T1DATATo the data line voltage, VREFIs a reference voltage line voltage, C1Is the capacitance value of the first capacitor C1, Δ T is the compensation time, IOLEDIs the light emitting current through the OLED. As can be seen from the expression, it is ensured that the current flowing through the driving transistor T1 and the threshold voltage of the first driving transistor T1 are no longer correlated during the light emitting period, and therefore the variation of the threshold voltage of the driving transistor T1 does not substantially affect the magnitude of the current flowing through the driving transistor T1. In addition, the current flowing through the driving transistor T1 has a certain relationship with the mobility of the driving transistor T1, the mobility of the driving transistor T1 is relatively high, and the gate-source voltage of the driving transistor T1 is correspondingly reduced by a portion, so that the current flowing through the OLED is not relatively high due to the increase of the mobility of the driving transistor. For the present embodiment, the potential difference between the source and the gate of the transistor T5 is not only equal to VTH1Independently of the supply voltage VDDIs irrelevant. Therefore, the IR Drop on the power line has no effect on the current flowing through transistor T5, i.e., the effect of IR Drop on the power line can be compensated.
FIG. 3 is a timing diagram illustrating the operation of another pixel circuit according to the first embodiment, and FIG. 3 differs from FIG. 2 in that the control electrode of the second transistor T2 is connected to the control line SCAN _ B [ n ] n of the row in which the pixel circuit is located]. Control line SCAN _ B [ n ]]Is larger than the line scanning time, which increases the compensation time, the power supply line V during the compensation phaseDDThe first capacitor C1 and the second capacitor C2 are charged by the driving transistor T1, and the upper plate potential of the second capacitor C2 is approximately equal to V at the end of compensationDD-|VTH1L. This results in better compensation of the threshold voltage variation of the driving transistor T1, which has a disadvantage in that the compensation of the mobility variation of the driving transistor T1 is weakened.
Fig. 4 is a timing diagram illustrating an operation of a pixel circuit according to another embodiment of the disclosure, and the difference between fig. 4 and fig. 2 and 3 is that the emission control signal is at a high level when data is input to the entire panel, and the emission control signal transitions to a low level only after all pixel data is input. Under the timing control, the pixel circuits collectively emit light after programming is completed, and the light emission mode is simultaneous light emission. Specifically, when the SCAN line SCAN [ n ] of the current row is at a low potential, the pixel circuit of the current row performs a data input operation, and when the SCAN line SCAN [ n ] of the current row jumps to a high potential and the SCAN line SCAN [ n +1] of the next row becomes a low potential, the pixel circuit of the current row performs a compensation operation and the pixel circuit of the next row performs a data input operation. When all the pixel circuits complete data input and compensation operation, the light-emitting control signal line EM jumps to a low potential, all the light-emitting devices of the whole panel emit light simultaneously, and the pixel circuits can be applied to 3D display under time sequence control.
Based on the above embodiments, the present application discloses a pixel circuit, which has a good compensation effect on the uneven threshold voltage of the driving transistor, and can reduce the influence of the uneven mobility of the driving transistor on the display effect. The pixel circuit passes through the current of the light emitting device and the power supply VDDRegardless, the effect of IR-Drop on the power line on the display effect can be compensated. The pixel circuit has a good display contrast because the initialization current does not flow through the light emitting device. The control signal required by the pixel circuit is simple, wherein the pixel circuit shares the upper and lower scanning lines. The data input voltage of the pixel circuit is not subjected to voltage division through capacitive coupling, and the range of the required data input voltage is small. In summary, the pixel circuit can be well applied to a display device with high resolution and high frame rate.
Example two
Fig. 5 is a structural diagram of a pixel circuit according to the second embodiment. The circuit configuration of fig. 5 is similar to that of fig. 1, including: for being connected in series to a power supply line VDDAnd a driving transistor T1 and a transistor T3 between the light emitting element OLED, and a second transistor T2, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, and capacitors C1 and C2. Also comprises a power line VDDData line VDATAReference voltage line VREFSCAN line SCAN [ n ]]SCAN line SCAN [ n +1]]And emission control signal line EM [ n ]]. In the scanning line of the row where the pixel circuit disclosed in this embodiment is locatedCalled the SCAN line SCAN [ n ]]. The scanning line of the next row of the pixel circuit is called the scanning line SCAN [ n +1] of the next row]. Power supply line V of pixel circuitDDFor providing power to the pixel circuit. Reference voltage line V of pixel circuitREFFor providing a reference voltage for the pixel circuit. The specific connection relationship is as follows:
a first electrode of the sixth transistor T6 is connected to the upper plate of the second capacitor C2. The gate of the driving transistor T1 is connected to the second electrode of the fifth transistor T5, and the second electrode of the sixth transistor T6 is connected to the lower plate of the second capacitor C2. A lower plate of the first capacitor C1 is connected to a first electrode of the fourth transistor T4 and a first electrode of the second transistor T2. The gate of the sixth transistor T6 is connected to the emission control signal line EM [ n ] for the emission phase to connect the lower plate of the first capacitor C1 to the gate of the driving transistor T1 while connecting the upper and lower plates of the second capacitor C2 together.
An upper plate of the second capacitor C2 is connected to the gate of the driving transistor T1, the second electrode of the fifth transistor T5 and the first electrode of the sixth transistor T6, and a lower plate of the second capacitor C2 is connected to a lower plate of the first capacitor C1, the second electrode of the sixth transistor T6, the first electrode of the second transistor T2 and the first electrode of the fourth transistor T4, for storing the data voltage signal sampled from the data line during a programming phase.
The upper plate of the first capacitor C1 is connected to the power supply line VDDIn addition, the lower plate of the first capacitor C1 is connected to the lower plate of the second capacitor C2, the second electrode of the sixth transistor T6, the first electrode of the second transistor T2 and the first electrode of the fourth transistor T4, and is configured to provide a driving voltage corresponding to the light-emitting brightness to the gate of the driving transistor T1.
A first electrode of the second transistor T2 is connected to a lower plate of the first capacitor C1, a lower plate of the second capacitor C2, a second electrode of the sixth transistor T6 and a first electrode of the fourth transistor T4, a second electrode of the second transistor T2 is connected to a second electrode of the driving transistor T1 and a first electrode of the third transistor T3, and a gate of the second transistor T2 is connected to a next row SCAN line SCAN [ n +1] for connecting the driving transistor T1 with a capacitive element, and aging information of the driving transistor T1, where the aging information refers to threshold voltage information and mobility information, is extracted.
The first electrode of the driving transistor T1 is connected to the power supply line VDDA second electrode of the driving transistor T1 is connected to the second electrode of the second transistor T2 and the first electrode of the third transistor T3, a gate electrode of the driving transistor T1 is connected to the upper plate of the second capacitor C2, the first electrode of the sixth transistor T6 and the second electrode of the fifth transistor T5, and the driving transistor T1 is used for driving the light emitting device OLED to emit light.
A first electrode of the third transistor T3 is connected to the second electrode of the driving transistor T1 and the second electrode of the second transistor T2, a second electrode of the third transistor T3 is connected to an anode of the light emitting device OLED, and a gate electrode of the third transistor T3 is connected to a light emission control signal line EM [ n ] for controlling whether a driving current flows through the light emitting device to control a light emission state of the light emitting device.
The first electrode of the fourth transistor T4 is connected to the lower plates of the first capacitor C1 and the second capacitor C2, and to the second electrode of the sixth transistor T6 and the first electrode of the second transistor T2, and the second electrode of the fourth transistor T4 is connected to the cathode of the OLED (which may also be connected to another reference potential). If connected to a separate reference potential, V is required at this timeREFLess than VDATA. The gate of the fourth transistor T4 is connected to the row SCAN line SCAN [ n ]]And is used for sampling the data voltage on the data line to the lower plates of the second capacitor C2 and the first capacitor C1.
A first electrode of the fifth transistor T5 is connected to the data line VDATAIn the above, the upper plate of the second capacitor C2 is connected to the data line through the fifth transistor T5 for the program phase, and the data voltage is sampled. A second electrode of the fifth transistor T5 is connected to the gate electrode of the driving transistor T1, the upper plate of the second capacitor C2, and the first electrode of the sixth transistor T6, and a gate electrode of the fifth transistor is connected to the row SCAN line SCAN [ n ] n]For inputting a reference voltage to the upper plate of the second capacitor C2. The anode of the light emitting device OLED is connected to the second electrode of the driving transistor T1 anda second electrode of the second transistor T2, and a cathode electrode of the light emitting device OLED are connected to a reference ground. The driving timing diagram of the pixel circuit shown in fig. 5 is the same as the driving timing diagram of the first embodiment.
EXAMPLE III
FIG. 6 is a block diagram of a pixel circuit according to a third embodiment, the circuit structure of FIG. 6 is similar to that of FIG. 1, except that the upper plate of the first capacitor C1 in the pixel circuit of FIG. 6 is connected to the reference potential line VREFInstead of the upper plate of the first capacitor C1 being connected to the power supply line V as in the pixel circuit shown in fig. 1DD. In the present embodiment, the first capacitor C1 is connected to the reference potential VREFCan reduce the power supply line VDDThe capacitive load of (2) reduces the dynamic power consumption of the display. In addition, since it is relative to VDDIn other words, the reference potential line VREFThe upper voltage is more stable, and the second capacitor C2 is connected to the reference potential line VREFThe output voltage of the upper and lower polar plates of the capacitor module can be ensured to be more stable. The driving timing diagram of the pixel circuit shown in fig. 6 is the same as that of the first embodiment.
Example four
FIG. 7 is a block diagram of a pixel circuit according to the fourth embodiment, the circuit structure of FIG. 7 is similar to that of FIG. 1, except that the upper plate of the first capacitor C1 in the pixel circuit of FIG. 7 is connected to the reference potential line VREFInstead of the upper plate of the first capacitor C1 being connected to the power supply line V as in the pixel circuit shown in fig. 1DD. In the present embodiment, the reference potential VREFCan reduce the power supply line VDDThe capacitive load of (2) reduces the dynamic power consumption of the display. In addition, since it is relative to VDDIn other words, the reference potential line VREFThe upper voltage is more stable, and the second capacitor C2 is connected to the reference potential line VREFThe output voltage of the upper and lower polar plates of the capacitor module can be ensured to be more stable. Second, the pixel circuit shown in fig. 7 reduces the power supply line VDDFrom the SCAN line SCAN [ n ] of the current row]Current is supplied to the light emitting device in the pixel circuit. Reducing the power supply line VDDThe area of the pixel circuit can be reduced, and the transmittance of the light-emitting device can be increased. Shown in FIG. 7The driving timing diagram of the pixel circuit is the same as that of the first embodiment.
EXAMPLE five
Fig. 8 is a flowchart of a driving method of a pixel circuit according to the fifth embodiment. The pixel circuit may be the pixel circuit described in any one of the first to fifth embodiments, and the driving method may include, without taking the pixel circuit described in the first embodiment, that is, taking the pixel circuit shown in fig. 1 as an example:
in step 501, in the programming stage, the scan line of the row of pixel circuits is set to a low potential, so that the fourth transistor and the fifth transistor are turned on, and the reference voltage line and the data line of the row of pixel circuits charge the second capacitor and the first capacitor, so as to write data.
In step 502, in the compensation stage, the scan line of the row of pixel circuits is set to a high potential and the scan line of the next row is set to a low potential, so that the second transistor and the driving transistor are turned on, and the power line of the row of pixel circuits charges the first capacitor and the second capacitor to compensate the voltage.
In step 503, in the light emitting stage, the scan line of the pixel circuit in the row is set to a high potential and the scan line in the next row is set to a high potential, so that the second transistor, the fourth transistor and the fifth transistor are turned off, and the light emitting control signal line of the pixel circuit in the row is set to a low potential, so that the sixth transistor and the third transistor are turned on, so that both ends of the second capacitor are short-circuited to discharge, the voltage at both ends of the first capacitor is kept unchanged for a period of time, and the method is used for reducing the adverse effect of the increase of the mobility of the driving transistor and compensating the threshold voltage of the driving transistor.
EXAMPLE six
Fig. 9 is a schematic structural diagram of a display device according to a sixth embodiment. The display device includes: a gate driving circuit 200, a data driving circuit 300, a light emission control signal driving circuit 400, and a display panel 100. The display panel 100 comprises a pixel matrix including a plurality of pixels arranged in a matrix as in embodiment one, embodiment two, embodiment three or embodimentAnd the pixel circuit is described in the fourth paragraph. The pixel circuits are respectively connected with the respective scanning lines, the data lines and the light-emitting control signal lines. The gate driving circuit 200 is configured to transmit a scan signal to the pixel matrix through the scan line to gate each row of the pixel circuits, for example, to gate each row of the pixel circuits sequentially in one frame, or to gate each row of the pixel circuits simultaneously, and the gate driving circuit 200 may gate any row of the pixel circuits for a predetermined time according to a timing predetermined by a user. The data driving circuit 300 is configured to send data signals to the pixel matrix through the data lines, wherein the pixel circuits in the same column are connected to the same data line. The light-emitting control signal driving circuit 400 is configured to send light-emitting control signals to the pixel matrix through the light-emitting control signal lines, wherein the pixel circuits in the same row are connected to the same light-emitting control signal line. Display panel 100 the display panel 100 comprises Pixel circuits Pixel 1 provided in the above-described embodiment arranged in a matrix of n rows and n columns][1]……Pixel_[n][n]Wherein n is an integer greater than 0, Pixel _ [ n][n]Characterizing the pixel circuits of the nth row and the nth column; multiple SCAN lines SCAN [ 1] of a first direction (e.g., transverse direction) connected to each pixel]……SCAN[n]Wherein, SCAN [ n ]]And the scanning line corresponding to the pixel circuit of the nth row is shown and is used for providing a scanning control signal for the pixel circuit of the current row. And a plurality of Data lines Data [ 1] in a second direction (e.g., longitudinal direction)]……Data[n]Wherein Data [ n ]]Data lines for supplying data voltages V to the pixel circuitsDATA. The display panel may be a liquid crystal display panel, an organic light emitting display panel, an electronic paper display panel, or the like, and the corresponding display device may be a liquid crystal display, an organic light emitting display, an electronic paper display, or the like. The gate driving circuit 200 is used for generating a scan pulse signal and supplying a scan signal to the pixel circuit through a scan line. The data driving circuit 300 generates a data voltage signal representing gray scale information and supplies the data voltage signal to the pixel circuit through the data line. A light emission control signal driving circuit 400 for generating a light emission control signal and controlling the light emitting element to emit light by the light emission control signal line; the display device includes a pixel array composed of the pixel circuits described in the above embodiments.
Fig. 10 is a timing chart of the operation of the display device according to the sixth embodiment. When the n-1 th row SCAN signal SCAN [ n-1] jumps to the active level, Pixel _11 and Pixel _12 complete data input, and when the next row SCAN signal SCAN [ n ] jumps to the active level, Pixel _21 and Pixel _22 complete data input, and Pixel _11 and Pixel _12 complete the compensation phase. After the compensation phase, the light-emitting control signal EM [ n ] starts to become effective, and the Pixel _11 and the Pixel _12 start to emit light; waiting for one line time again, the light emission control signal EM [ n +1] starts to become active, and Pixel _21 and Pixel _22 emit light.
EXAMPLE seven
Fig. 11 is a flowchart illustrating a driving method of the display device disclosed in this embodiment. The display device may be the display device disclosed in embodiment six. For example, according to the display device shown in fig. 9, a driving method of the display device may include the gate driving circuit sequentially performing the following operations on the pixel circuits of each row in the pixel matrix:
in step 601, in the programming stage, the gate driving circuit sets the scan line of the row of pixel circuits to a low potential, so that the fourth transistor and the fifth transistor of the row of pixel circuits are turned on, and the reference voltage line and the data line of the row of pixel circuits charge the second capacitor and the first capacitor, so as to write data.
In step 602, in the compensation phase, the gate driving circuit sets the scan line of the pixel circuit in the row to a high potential and sets the scan line in the next row to a low potential, so that the second transistor and the driving transistor of the pixel circuit in the row are turned on, and the power line of the pixel circuit in the row charges the first capacitor and the second capacitor, thereby performing voltage compensation.
Step 603, in the light emitting stage, the gate driving circuit sets the scanning line of the pixel circuit in the row and the scanning line in the next row to high potential, so that the second transistor, the fourth transistor and the fifth transistor of the pixel circuit in the row are turned off. The light-emitting control signal driving circuit sets the light-emitting control signal line of the pixel circuit at a low potential, so that the sixth transistor and the third transistor of the pixel circuit are conducted, the two ends of the second capacitor are in short circuit discharge, the voltage at the two ends of the first capacitor is kept unchanged for a period of time, and the light-emitting control signal driving circuit is used for reducing the adverse effect of the increase of the mobility of the driving transistor and compensating the threshold voltage of the driving transistor.
The present invention has been described in terms of specific examples, which are provided to aid understanding of the invention and are not intended to be limiting. For a person skilled in the art to which the invention pertains, several simple deductions, modifications or substitutions may be made according to the idea of the invention.

Claims (9)

1. A pixel circuit is characterized by comprising a driving transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a first capacitor, a second capacitor and a light-emitting device; wherein:
the second pole of the driving transistor is connected with the first pole of the third transistor and is used for driving the light-emitting device to emit light; the control electrode of the driving transistor is connected with the second electrode of the fifth transistor;
a first pole of the second transistor is connected with a first pole of a fourth transistor, and a second pole of the second transistor is connected with a second pole of the driving transistor; a control electrode of the second transistor is connected to a scan line of a next row of the pixel circuit or to a control line of a row of the pixel circuit;
a control electrode of the third transistor is connected to a light-emission control signal line of a row in which the pixel circuit is located, a second electrode of the third transistor is connected to an anode of the light-emitting device, and a cathode of the light-emitting device is grounded;
a control electrode of the fourth transistor is connected to a scanning line of a row in which the pixel circuit is located;
a control electrode of the fifth transistor is connected to a scanning line of a row in which the pixel circuit is located;
the sixth transistor is used for controlling the short-circuit state of the second capacitor, and a first electrode and a second electrode of the sixth transistor are respectively connected to two ends of the second capacitor;
one end of the first capacitor is connected to the power line, and the other end of the first capacitor is connected with the first pole of the second transistor;
the second capacitor is connected between the control electrode of the driving transistor and the first electrode of the second transistor and used for extracting the aging information of the driving transistor when the second transistor is conducted;
wherein:
a first pole of the driving transistor is connected to a power line, a second pole of the fourth transistor is grounded, and a first pole of the fifth transistor is connected to a data line of a column where the pixel circuit is located;
or, a first pole of the driving transistor is connected to a scanning line of a row where the pixel circuit is located, a second pole of the fourth transistor is connected to a data line of a column where the pixel circuit is located, and a first pole of the fifth transistor is connected to a reference voltage line.
2. The pixel circuit according to claim 1,
a control electrode of the sixth transistor is connected to a light emission control signal line of the row in which the pixel circuit is located.
3. The pixel circuit according to claim 2,
the first capacitor is used for providing a driving voltage corresponding to the light-emitting brightness of the light-emitting device to the control end of the driving transistor.
4. The pixel circuit according to claim 3, wherein when the first pole of the fifth transistor is connected to a reference voltage line, one end of the first capacitor is connected to the reference voltage line, and the other end is connected to the first pole of the second transistor.
5. The pixel circuit according to claim 1, wherein the aging information includes threshold voltage information and/or mobility information.
6. The pixel circuit according to claim 1, wherein the pixel circuit comprises a programming phase, a compensation phase, and a light emission phase; wherein:
when the pixel circuit is in a programming stage, a scanning line of a row of the pixel circuit is at a low potential, a scanning line of a next row of the pixel circuit is at a high potential, and a light-emitting control signal line of the row of the pixel circuit is at a high potential; when the pixel circuit works in a compensation stage, a scanning line of a row where the pixel circuit is located is at a high potential, a scanning line of a next row of the pixel circuit is at a low potential, and a light-emitting control signal line of the row where the pixel circuit is located is at the high potential; when the pixel circuit works in a light-emitting stage, a scanning line of a row where the pixel circuit is located is at a high potential, a scanning line of a next row of the pixel circuit is at a high potential, and a light-emitting control signal line of the row where the pixel circuit is located is at a low potential;
or, when the pixel circuit is in the programming phase, the scanning line of the row where the pixel circuit is located is a low potential, the control line of the row where the pixel circuit is located is a high potential, and the light-emitting control signal line of the row where the pixel circuit is located is a high potential; when the pixel circuit works in a compensation stage, a scanning line of a row of the pixel circuit is at a high potential, a control line of the row of the pixel circuit is at a low potential, and a light-emitting control signal line of the row of the pixel circuit is at a high potential; when the pixel circuit works in a light-emitting stage, a scanning line of a row of the pixel circuit is at a high potential, a control line of the row of the pixel circuit is at a high potential, and a light-emitting control signal line of the row of the pixel circuit is at a low potential.
7. A driving method of the pixel circuit according to claim 1, 3 or 4, wherein the driving method comprises a programming phase, a compensation phase and a light emitting phase; for any row of pixel circuits:
in a programming stage, setting a scanning line of the row of pixel circuits to be at a low potential, so that the fourth transistor and the fifth transistor are turned on, and a reference voltage line and a data line of the row of pixel circuits are used for charging a second capacitor and a first capacitor to write data;
in the compensation stage, setting the scanning line of the pixel circuit in the row to be at a high potential and setting the scanning line of the next row to be at a low potential, so that the second transistor and the driving transistor are conducted, and the power line of the pixel circuit in the row is used for charging the first capacitor and the second capacitor to compensate the voltage;
in a light emitting stage, setting a scanning line of the pixel circuit of the row to be at a high potential and setting a scanning line of a next row to be at a high potential, so that the second transistor, the fourth transistor and the fifth transistor are turned off, and setting a light emitting control signal line of the pixel circuit of the row to be at a low potential, so that the sixth transistor and the third transistor are turned on, thereby enabling two ends of the second capacitor to be in short circuit for discharging, and keeping the voltage at two ends of the first capacitor unchanged for a period of time.
8. A display device, comprising:
a pixel matrix comprising a plurality of pixel circuits as claimed in any one of claims 3 to 6 arranged in a matrix; the pixel circuits are respectively connected with the respective scanning lines, the data lines and the light-emitting control signal lines;
a gate driving circuit for transmitting a scan signal to the pixel matrix through the scan line to gate each row of the pixel circuits;
the data driving circuit is used for sending data signals to the pixel matrix through the data lines, wherein the pixel circuits in the same column are connected to the same data line;
and the light-emitting control signal driving circuit is used for sending light-emitting control signals to the pixel matrix through the light-emitting control signal lines, wherein the pixel circuits in the same row are connected to the same light-emitting control signal line.
9. A driving method of a display device according to claim 8, wherein when the matrix of pixels comprises a sixth transistor, the driving method comprises a programming phase, a compensation phase and a light emitting phase;
the gate driving circuit performs the following operations on the pixel circuits of each row in the pixel matrix in sequence:
in a programming stage, the gate driving circuit sets a scanning line of the row of pixel circuits to be at a low potential, so that the fourth transistor and the fifth transistor are turned on, a reference voltage line and a data line of the row of pixel circuits charge the second capacitor and the first capacitor, and data is written in;
in the compensation stage, the gate driving circuit sets the scanning line of the pixel circuit in the row to a high potential and sets the scanning line of the next row to a low potential, so that the second transistor and the driving transistor are conducted, and the power line of the pixel circuit in the row charges the first capacitor and the second capacitor to compensate the voltage;
in a light emitting stage, the gate driving circuit sets a scanning line of the pixel circuit of the row and a scanning line of the next row to be high potential, so that the second transistor, the fourth transistor and the fifth transistor are turned off; the light-emitting control signal driving circuit sets the light-emitting control signal line of the pixel circuit at a low potential, so that the sixth transistor and the third transistor are conducted, the two ends of the second capacitor are short-circuited to discharge, and the voltage at the two ends of the first capacitor is kept unchanged for a period of time.
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