CN108804724A - The discrimination method of circuit code method and circuit framework - Google Patents
The discrimination method of circuit code method and circuit framework Download PDFInfo
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- CN108804724A CN108804724A CN201710289164.4A CN201710289164A CN108804724A CN 108804724 A CN108804724 A CN 108804724A CN 201710289164 A CN201710289164 A CN 201710289164A CN 108804724 A CN108804724 A CN 108804724A
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Abstract
Disclosed herein the discrimination methods of circuit code method and circuit framework.The circuit framework that circuit code method is applied to a circuit recognizes flow.Circuit code method includes:All transistors of the circuit are chosen for target transistor one by one;End point electric connection (DC Connect) voltage source when the target transistor or ground connection port, one first numerical value is added by one end point value of the endpoint;When the endpoint of the target transistor is electrically connected the endpoint other than the voltage source and the reference voltage, the endpoint value of the endpoint is added into a second value;And using the set of a plurality of endpoint values of the target transistor as a transistor condition code of the target transistor.
Description
Technical field
The present invention is about circuit design, especially with respect to circuit code and discrimination method.
Background technology
Circuit design now is mostly at electric design automation (Electronic Design Automation, EDA)
And it is completed under the assistance of computer aided design (Computer-Aided Design, CAD).When the desired element from a circuit
Line relationship description shelves (such as simulation formula (the Simulation Program with to be attached most importance to integrated circuit
Integrated Circuit Emphasis, hereinafter referred to as SPICE) institute's output circuit meshwork list (netlist)) identification circuit
Framework when, the framework stratum tree (hierarchy tree) of circuit is established generally according to component connection wire relationship description shelves, and
The sub-circuit corresponding to the branch of framework stratum tree is found out in (recursive) method of pulling over, sub-circuit is compared again later
It is right.The method the disadvantage is that establish framework stratum tree and pull over method take.
Invention content
In view of the deficiency of prior art, one of present invention is designed to provide a kind of circuit code method and circuit framework
Discrimination method.
The invention discloses a kind of discrimination methods of circuit framework, are applied to a component connection wire relationship description shelves, which connects
Line relationship description shelves correspond to a circuit and record the connection relation of a plurality of transistors of the circuit.This method includes:To each electricity
Crystal generates a transistor condition code, the transistor condition code and each transistor and voltage source (power), ground connection port (ground)
Connection relation it is related;It is electrical according to the sub-circuit declaration (such as " Subckt " of SPICE) of those transistors, drain or source electrode
The circuit is divided into a plurality of transistor groups by line;The transistor feature of a plurality of transistors according to each transistor group
Code generates a transistor group characteristics code to each transistor group;Those transistor group characteristics codes and a default group are special
Sign code compares;And when a target transistor group characteristics code of those transistor group characteristics codes is equal to default group spy
Code is levied, will be recognized as corresponding to default group spy corresponding to a target transistor group of the target transistor group characteristics code
Levy a default sub-circuit framework of code.
The present invention separately discloses a kind of circuit code method, and the circuit framework for being applied to a circuit recognizes flow.This method packet
Contain:All transistors of the circuit are chosen for target transistor one by one;When the end point of the target transistor is electrically connected the electricity
One end point value of the endpoint is added one first numerical value by one of potential source and ground connection port;When the end of the target transistor
Point is electrically connected the endpoint other than the voltage source and the reference voltage, and the endpoint value of the endpoint is added a second value;With
And using the set of a plurality of endpoint values of the target transistor as a transistor condition code of the target transistor.
Drain or the electrical line of source electrode in the discrimination method foundation circuit of the circuit framework of the present invention divide a circuit into
A plurality of sub-circuits can rapidly make circuit preliminary division and judgement.Circuit code method provides simple coding and drills
Algorithm can rapidly encode circuit, and help the efficiency that sub-circuit compares in the discrimination method for improving circuit framework
And accuracy.Sub-circuit is found out in the method for pulling over compared to known techniques, the present invention substantially shortens the identification time of circuit framework.
Feature, implementation and effect for the present invention, hereby schema being coordinated to make embodiment, detailed description are as follows.
Description of the drawings
Fig. 1 is the flow chart of an embodiment of the discrimination method of the circuit framework of the present invention;
Fig. 2 is the detailed step of the coded program of the present invention;
Fig. 3 A~3C are the encoding paradigm of the present invention;
Fig. 4 is the flow chart of the detailed step of comparing feature codes;
Fig. 5 is the detailed step of the circuit division operation of the present invention;
Fig. 6 is an example of the circuit division operation of the present invention;
Fig. 7 is the transistor group characteristics code of transistor group to be obtained according to the coding rule of table 1, and individual electricity are brilliant
Another example of the transistor condition code of body;And
Fig. 8 is to illustrate the schematic diagram " being electrically connected ".
【Symbol description】
M1~M8:Transistor;
S105~S190, S210~S270, S415~S460, S510~S570:Step.
Specific implementation mode
The disclosure of the present invention includes the discrimination method of circuit code method and circuit framework, is distinguished with promoting circuit framework
The speed of knowledge and accuracy.The technical terms of following description are the idiom with reference to the art, such as this specification
Part term is illustrated or is defined, the explanation of the part term be subject to this specification explanation or definition.
Fig. 1 is the flow chart of an embodiment of the discrimination method of the circuit framework of this case.The circuit framework identification side of this case
Method is applied to the component connection wire relationship description shelves of a circuit, and component connection wire relationship description shelves record a plurality of transistors of the circuit
Connection relation.The discrimination method of circuit framework first encodes (step S105) circuit.In detail, this step is according to electricity
The connection relation of a plurality of transistors on road encodes circuit, and each transistor will obtain a transistor feature after coding
Code.In one embodiment, endpoint (including gate, source electrode, drain and matrix) each production of coded program for a transistor
A raw endpoint value, and the set that the transistor condition code of the transistor is a plurality of endpoint values for being the transistor.It is each
The type for one or more endpoints that the endpoint value of endpoint is connected according to the endpoint and determine.In one embodiment, work as endpoint
When being connected to an external terminal, step S105 gives the one outside numerical value of endpoint;When endpoint is connected to an inner terminal, step
S105 gives one internal numeric of endpoint.External terminal is, for example, voltage source or the ground connection port of circuit, and inner terminal is, for example, should
The endpoint of other transistors in other endpoints or circuit of transistor itself.The correspondence of table 1 display end point type and numerical value
A kind of embodiment.In this embodiment, the numerical value for corresponding to external terminal is odd number, and the numerical value corresponding to inner terminal is
Even number.Table 1 is only used for illustrating, and is not intended to limit the invention.
Table 1
Fig. 2 is the detailed step of coded program, coordinates the flow of the encoding paradigm definition graph 2 of Fig. 3 A~3C below.Fig. 3 A
For a phase inverter (inverter), include the transistor M1 and M2 of two concatenations.First, it is brilliant that target electricity is chosen from circuit
Body (step S210), such as choose M1.Next, depending on the type of endpoint that is electrically connected of each endpoint of target transistor,
And the endpoint value of each endpoint (preset value 0) is added into corresponding numerical value (step S220 and S230).In detail, when target electricity is brilliant
The end point of body is electrically connected voltage source or reference voltage (i.e. external terminal), and the endpoint value of the endpoint is added external numerical value
(such as numerical value 1 or 3 of table 1) (step S220);When the endpoint of target transistor is electrically connected other than voltage source and ground connection port
Endpoint (i.e. inner terminal), by the endpoint value of the endpoint add internal numeric (such as numerical value 2,4,6 or 8 of table 1) (step
S230).The sequence of step S220 and S230 are commutative.For example, for M1, drain (D) is only electrically connected drawing for M2
Pole, therefore the endpoint value of drain becomes 2 (step S230) after coding;Its gate (G) is only electrically connected the gate of M2, therefore encodes
The endpoint value of gate becomes 4 (step S230) afterwards;Its source electrode (S) is electrically connected voltage source and matrix, therefore source electrode after coding
Endpoint value becomes 11 (=3+8) (step S220 and S230);Its matrix (B) is electrically connected voltage source and source electrode, therefore after coding
The endpoint value of matrix is 9 (=3+6) (step S220 and S230).
Next, being p-type metal-oxide-semifield-effect electric crystal (PMOS) or N-type metal-oxide-semifield-effect electric crystal according to target transistor
(NMOS), the one kenel code (step S240) of target transistor is assigned.For example, kenel code can indicate (P 1 with (P, N)
Represent PMOS, N is 1 to represent NMOS), then kenel code (P, N)=(1,0) of M1, kenel code (P, N)=(0,1) of M2.Target electricity
A plurality of endpoint values of crystal and the set of kenel code are the transistor condition code (step S250) of target transistor.Such as Fig. 3 B
Shown, a set includes six elements (element) such as D, G, S, B, P, N, the transistor condition code { D, G, S, B, P, N } of M1
={ 2,4,11,9,1,0 }, M2's is then { D, G, S, B, P, N }={ 2,4,9,7,0,1 }.Because the transistor group of Fig. 3 A by
M1 and M2 is constituted, so the corresponding endpoint value of a plurality of transistors and kenel code are added (step S260), you can with those
Transistor group characteristics code (step S270) of the set of endpoint value and kenel code after totalling as transistor group.Such as Fig. 3 B
Shown, transistor group characteristics code { D, G, S, B, P, N }={ 4,8,20,16,1,1 } are the phase of the transistor condition code of M1 and M2
Result after corresponding element totalling.
In another embodiment, transistor condition code and transistor group characteristics code are only the set of endpoint value, without wrapping
Code containing kenel, that is, ignore kenel code in step S240~S270, then the transistor condition code of this embodiment and transistor group
Condition code is as shown in Figure 3 C.
Above-mentioned " electric connection " represents two-end-point and is directly electrical connected, or intermediate includes one or more quilt
Dynamic element (such as resistance, inductance or capacitance etc.).For example, as shown in figure 8, the drain of transistor M1 and M2 electrically connect each other
It connects, and although the drain of transistor M3 and M4 are resistance R connections, but in an embodiment of the present invention, the drain of M3 and M4 are still
Belong to and is electrically connected to each other.Note that the source electrode of same transistor, drain and gate appoint therebetween all non-category electrically connect
It connects.
The flow of Fig. 1 is continued to explain by taking embodiment shown in corresponding diagram 3B as an example below.After the completion of step S105 (that is,
Obtain the transistor condition code of all transistors in circuit), confirm in component connection wire relationship description shelves whether there is the son indicated
Circuit (step S110).Since the frequency of occurrences of certain sub-circuit frameworks in circuit is high, so circuit designers are in design circuit
When would generally directly apply mechanically the ready-made model (model) of those corresponding sub-circuit frameworks to save the time.Those ready-made models exist
It can be denoted as sub-circuit in component connection wire relationship description shelves, this step is whether to have in judgment component line relationship description shelves
The sub-circuit being labeled.Whether for example found in component connection wire relationship description shelves when judging has for representing the specific of sub-circuit
(such as in circuit meshwork list, sub-circuit framework will independently be declared label with " subckt ".When finding the sub-circuit indicated, then
The condition code of sub-circuit is compared (step S120) with the data in sub-circuit cell library (cell library).Before similar
The transistor group characteristics code stated, the condition code of sub-circuit are the opposite of the transistor condition code of a plurality of transistors of sub-circuit
Set after the element totalling answered.Component library stores a plurality of default sub-circuit units and its condition code.Default sub-circuit unit
E.g. logic gate (such as and lock or lock, phase inverter etc.) and/or circuit (such as phase-locked loop, analogy with specific function
Digital converter, numerical digit analogy converter etc.).Similar, the condition code of default sub-circuit unit is default sub-circuit unit
Set after the corresponding element totalling of the transistor condition code of a plurality of transistors.
Fig. 4 is the flow chart of the detailed step of the step S120 of Fig. 1.First by the son in sub-circuit and sub-circuit cell library
Circuit unit carries out condition code comparison (step S410) in circuit layer grade.In detail, this step be by the condition code of sub-circuit with
The condition code of default sub-circuit unit compares.If can not find condition code and the condition code of sub-circuit in sub-circuit cell library
Identical default sub-circuit unit (step S420 is judged as NO), then end step S120 (step S460);If step S420
It is judged as YES, then the characteristic value that sub-circuit is carried out to transistor level with the default sub-circuit unit in sub-circuit cell library compares
(step S430).In detail, step S430 is to compare the transistor number of sub-circuit and default sub-circuit unit, and all electricity is brilliant
The transistor condition code of body it is whether identical.As an example it is assumed that the condition code of default sub-circuit unit is as shown in table 3, although
Transistor group characteristics code shown in table 2 is identical as Fig. 3 B's (i.e. the condition code of circuit level is coincide), but M1 ' and M2 ' are extremely
It is few one of them transistor condition code it is all different from M1's and M2, so step S440 will be deemed as it is no.If default element
Condition code it is as shown in table 3, then step S440 will be deemed as be (because M1 " transistor condition code it is identical as M1, M2 " with
M2 is identical).When step S440 is no, then end step S120 (step S460);When step S440 is yes, then sub-circuit is marked
(step S450) is completed to compare, that is, determines and sub-circuit is recognized as default sub-circuit unit.
Table 2
D | G | S | B | P | N | |
M1’ | 2 | 4 | 9 | 7 | 1 | 0 |
M2’ | 2 | 4 | 11 | 9 | 0 | 1 |
Transistor group | 4 | 8 | 20 | 16 | 1 | 1 |
Table 3
D | G | S | B | P | N | |
M1” | 2 | 4 | 11 | 9 | 1 | 0 |
M2” | 2 | 4 | 9 | 7 | 0 | 1 |
Transistor group | 4 | 8 | 20 | 16 | 1 | 1 |
Return to Fig. 1, after step S120, flow enters step S130 to have been marked in judgment component line relationship description shelves
Whether the sub-circuit shown, which all compares, finishes.When the judging result of step S130 is no, then returns to step S120 and continue to compare it
The sub-circuit that he has indicated;When the judging result of step S130 is yes, S140 is entered step.
Step S140 is handled for the part for not being denoted as sub-circuit in component connection wire relationship description shelves, it is therefore an objective to
The circuit of the part is divided into a plurality of sub-circuits, that is, a plurality of transistors of the circuit of the part are divided into plural number
A transistor group.It is that the circuit is divided into a plurality of electricity according to drain or the source electrode electrical lines of those transistors when division
Crystal group.The detailed step of Fig. 5 division operations thus, Fig. 6 show an example of this division operation.Division operation is from circuit
Voltage source or ground terminal set out (this embodiment is by taking voltage source as an example), find be electrically connected voltage source transistor as reference
Transistor (step S510).As shown in the subgraph on the left sides Fig. 6, step S510 finds transistor M1, M2 and M3.Next electricity is found out
Property connection with reference to transistor M1, M2 and M3 target transistor (step S520), that is, find transistor M4, M2 and M3 (M2 and
The target transistor of M3 other side each other).Whether the drain or source electrode for then judging target transistor are electrically connected with reference to transistor
Drain or source electrode (step S530).Because the result of step S530 is yes for transistor M1 and M4, to transistor M2 and
Also it is yes for M3, so being divided into identical transistor group (step next with reference to transistor and target transistor
S540), that is to say, that M1 and M4 is same group, and M2 and M3 are same group.Then judge whether to reach ground terminal (step
S560).Because M2, M3 and M4 are all not electrically coupled to ground, step S560 is judged as NO at this time.Then in step S570
It is middle to be set as target transistor to refer to transistor, also transistor M2, M3 and M4 are set as to refer to transistor, are then return to
Step S520.
For M4, the target transistor that current step S520 is found is M5 and M6, for M2 and M3, current step
The target transistor that rapid S520 is found is M6.In following step S530, judging result is yes for M4 and M5, to M4
And judging result is no for M6, so M4 and M5 are divided into same group (step S540), M4 and M6 are divided into difference
Group (step S550), and M6 is then divided into and the same groups of M2 and M3 (as shown in the subgraph among Fig. 6).Continue Fig. 5's
Flow, last transistor M1, M4, M5 and M7 are same group (that is, transistor M1, M4, M5 and M7 constitute a sub-circuit), electricity
Crystal M2, M3, M6 and M8 are same group (that is, transistor M2, M3, M6 and M8 constitute a sub-circuit), though two groups electrically connect
It connects, but is divided and comes at the gate of transistor M6.Because transistor M7 and M8 are electrically connected to ground, work as transistor M7
Or M8 as target transistor when step S560 will be deemed as being that division operation returns to step S510 with not yet by group and electrically
Other transistors for connecting voltage source are used as with reference to transistor.
Fig. 7 is the transistor group characteristics code of transistor group to be obtained according to the coding rule of table 1, and individual electricity are brilliant
Another example of the transistor condition code of body.As shown, group 1 and group 2 are using the gate of transistor M5 and M6 as separating.
Group 1 is anti-and lock (NAND), and group 2 is phase inverter.
It returns to Fig. 1, after step S140, then carries out the comparison (step S150) of transistor group characteristics code.Step
The detailed step of S150 is similar to step S120, is all first to be compared in circuit layer grade (that is, to compare transistor group characteristics
Code), it is compared (that is, comparing transistor condition code) (step S410~S440) then at transistor level.If both kissed
It closes, then by transistor group labeled as completion (variation of step S450) is compared, then terminates to compare (step S460).
Next, ought still there is the transistor group (step S160 is judged as NO) not compared, step S150 is returned to;When electric brilliant
Body group, which all compares, finishes (step S160 is judged as YES), then continues to compare all not by the transistor of the fragmentary transistor of group
Condition code (step S170~S180).When all transistors all compare completion, then terminate the flow (step of identification circuit framework
S190)。
After the completion of circuit framework identification, you can learn that circuit is made of the default element of which known behavior.Identification knot
Fruit contributes to the exploitation of other design cycles, such as the behavior model of circuit to create (behavior model creation).This
The circuit framework identification algorithm of case is boundary with the drain of transistor or the electrical line of source electrode, and circuit is divided into multiple groups, is had
Help rapidly find out the sub-circuit (i.e. transistor group) with specific behavior model from circuit, thus compared to it is known with
The method that the mode pulled over searches stratum tree can faster complete the identification of circuit framework.In addition, the coding algorithm letter of this case
It is single, other than helping the time for shortening identification circuit framework, comparison step is more allowed to be able in circuit level and transistor level
It is compared, to increase the accuracy compared.Furthermore because the condition code of this case can be presented in digital form, make comparison
The action of condition code is more easy, therefore this case can faster complete distinguishing for circuit compared to known search tree of pulling over
Know.
The algorithm of this case can be implemented as one comprising a plurality of programmings computer program product (such as software,
Firmware or combinations thereof), computer program product, which can be stored in computer-readable recording medium, (such as volatility and non-volatile to be deposited
Reservoir etc.).Including having the computing unit (such as central processing unit, microprocessor, microcontroller etc.) of formula executive capability
Computer be loaded into those programmings and execute after, it can be achieved that the present invention method.
It is taken off in diagram before note that, the shape of element, size, the sequence etc. of ratio and step are only to illustrate, and are for this
Technical field tool usually intellectual understands the present invention and is used, non-limiting the present invention.Although the embodiment of the present invention is as above
It is described, however those embodiments are not used for limiting the present invention, what the art tool usually intellectual can be according to the present invention
The content expressed or implied imposes variation to the technical characteristic of the present invention, all this kind variation may belong to sought by the present invention
Patent protection scope, in other words, scope of patent protection of the invention must regard this specification claim institute defender
Subject to.
Claims (10)
1. a kind of discrimination method of circuit framework is applied to a component connection wire relationship description shelves, the component connection wire relationship description shelves
It corresponds to a circuit and records the connection relation of a plurality of transistors of the circuit, this method includes:
One transistor condition code is generated to each transistor, the transistor condition code is related with the connection relation of each transistor;
The circuit is divided into a plurality of transistor groups by the electrical line of drain or source electrode according to those transistors;
The transistor condition code of a plurality of transistors according to each transistor group generates a transistor group to each transistor group
Group condition code;
Those transistor group characteristics codes and a default group characteristics code are compared;And
Group characteristics code is preset when a target transistor group characteristics code of those transistor group characteristics codes is equal to this, will be corresponded to
It is recognized as corresponding to the one pre- of the default group characteristics code in a target transistor group of the target transistor group characteristics code
If sub-circuit unit.
2. according to the method described in claim 1, wherein, which is coupled to a voltage source and a reference voltage, this is to each electricity
Crystal generates the step of transistor condition code and includes:
When the end point of the target transistor in those transistors be electrically connected the voltage source and the reference voltage wherein it
One, one end point value of the endpoint is added into one first numerical value;And
When the endpoint of the target transistor is electrically connected the endpoint other than the voltage source and the reference voltage, by the endpoint should
Endpoint value adds a second value;
The transistor condition code of the wherein target transistor is the set of a plurality of endpoint values of the target transistor.
3. according to the method described in claim 2, wherein the one of which of first numerical value and the second value be odd number, it is another
Person is even number.
4. according to the method described in claim 2, wherein, the step of this generates the transistor condition code to each transistor, more wraps
Contain:
It is a N-type metal-oxide-semifield-effect electric crystal or a p-type metal-oxide-semifield-effect electric crystal according to the target transistor, assigns the target
One kenel code of transistor;
Wherein, the transistor condition code of the target transistor is the collection of those endpoint values and the kenel code of the target transistor
It closes.
5. according to the method described in claim 1, wherein, which is divided into the circuit
The step of a plurality of transistor groups includes:
Find out one first transistor;
Find out one second transistor for being electrically connected first transistor;
When the drain or source electrode of second transistor are electrically connected the drain or source electrode of first transistor, by first transistor
And second transistor is divided into identical transistor group;And
When the gate of second transistor is electrically connected the drain or source electrode of first transistor, by first transistor and this
Two transistors are divided into different transistor groups.
6. a kind of circuit code method, the circuit framework for being applied to a circuit recognizes flow, the circuit be coupled to a voltage source and
One reference voltage, this method include:
A target transistor is chosen from the circuit;
When the end point of the target transistor is electrically connected one of the voltage source and the reference voltage, by the one of the endpoint
Endpoint value adds one first numerical value;
When the endpoint of the target transistor is electrically connected the endpoint other than the voltage source and the reference voltage, by the endpoint should
Endpoint value adds a second value;And
Using the set of a plurality of endpoint values of the target transistor as a transistor condition code of the target transistor.
7. according to the method described in claim 6, further including:
Add up the endpoint value of the correspondence endpoint of a plurality of transistors in the circuit;And
Using the set of the endpoint value after those totallings as a transistor group characteristics code of a transistor group;
Wherein the transistor group includes those transistors.
8. according to the method described in claim 6, wherein, the endpoint value of the endpoint is wrapped plus the step of first numerical value
Contain:
When the endpoint of the target transistor is electrically connected the voltage source or the reference voltage, the endpoint value of the endpoint is to add
Upper different first numerical value.
9. according to the method described in claim 6, wherein, the endpoint value of the endpoint is wrapped plus the step of second value
Contain:
When the endpoint of the target transistor is electrically connected gate, source electrode, drain or the matrix of any transistor, the endpoint
The endpoint value is to add the different second values.
10. according to the method described in claim 6, further including:
It is a N-type metal-oxide-semifield-effect electric crystal or a p-type metal-oxide-semifield-effect electric crystal according to the target transistor, assigns the target
One kenel code of transistor;
Wherein, the transistor condition code of the target transistor is the collection of those endpoint values and the kenel code of the target transistor
It closes.
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