CN108711565B - Display substrate, manufacturing method thereof and display panel - Google Patents
Display substrate, manufacturing method thereof and display panel Download PDFInfo
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- CN108711565B CN108711565B CN201810286429.XA CN201810286429A CN108711565B CN 108711565 B CN108711565 B CN 108711565B CN 201810286429 A CN201810286429 A CN 201810286429A CN 108711565 B CN108711565 B CN 108711565B
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- lead
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
Abstract
The invention provides a display substrate, a manufacturing method thereof and a display panel, wherein the display substrate comprises: the display area with be located the lead wire district outside the display area, be provided with many signal line leads in the lead wire district, each signal line lead includes the sub-lead of two sections at least disconnections, and two sections adjacent sub-leads prevent the structure electricity through static and connect, static prevents the structure and includes: the bridging line is arranged in a different layer with the sub-lead, and the connecting through holes are used for communicating the bridging line with the sub-lead, and the resistivity of the bridging line is greater than that of the signal line lead. In the invention, the static electricity preventing structure is arranged on the signal wire lead of the lead area, and static electricity can be prevented from entering the display area of the display substrate from the signal wire lead.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display substrate, a manufacturing method of the display substrate and a display panel.
Background
In order to input a signal into the display panel, a Lead area (Lead area) is provided outside the display area of the display panel, and a signal is input into the display panel through a signal line Lead provided in the Lead area. In the production process, before the display panel is bound with a Chip On Film (COF), the lead regions are in an exposed state, and static electricity easily enters the display panel from signal line leads in the lead regions, so that the internal structure (such as via holes, Thin Film Transistors (TFTs) and the like) of the display panel is damaged, and the display panel is poor.
Disclosure of Invention
In view of the above, the present invention provides a display substrate, a manufacturing method thereof, and a display panel, which are used to solve the problem that before the conventional display panel is bonded to a COF, static electricity easily enters the display panel from signal line leads disposed in a lead region, resulting in a poor display panel.
In order to solve the above technical problem, the present invention provides a display substrate, including a display area and a lead area located outside the display area, wherein a plurality of signal line leads are disposed in the lead area, each signal line lead includes at least two disconnected sub-leads, two adjacent sub-leads are electrically connected through an electrostatic prevention structure, and the electrostatic prevention structure includes: the bridging line is arranged in a different layer with the sub-lead, and the connecting through holes are used for communicating the bridging line with the sub-lead, and the resistivity of the bridging line is greater than that of the signal line lead.
Preferably, each of the signal line leads corresponds to at least two of the static-electricity-blocking structures.
Preferably, the lead pad includes: a binding region and a non-binding region, the binding region being disposed between the non-binding region and the display region, the static-electricity-blocking structure being disposed within the non-binding region.
Preferably, the unbound region includes: the cutting reserved area is positioned between the cutting removed area and the binding area, and the statically determinate stopping structure is arranged in at least one area of the cutting reserved area and the cutting removed area.
Preferably, a short-circuit bar for testing is further arranged in the lead, the short-circuit bar is connected with the signal line lead, the short-circuit bar and the signal line lead are arranged in a crossed mode, and the static electricity prevention structure is arranged on at least one side of the short-circuit bar.
Preferably, the signal line lead is formed by a metal material, and the bridging line is formed by a transparent oxide conductive material.
Preferably, a transparent electrode is further disposed in the display area, and the bridging line and the transparent electrode are disposed in the same layer and the same material.
Preferably, the signal line lead includes: and at least one of the lead wires of the data lines, the lead wires of the gate lines and the lead wires of the touch electrode lines.
The invention also provides a display panel comprising the display substrate.
The invention also provides a manufacturing method of the display substrate, which is used for manufacturing the display substrate; the manufacturing method comprises the following steps:
forming a plurality of signal wire leads, wherein the signal wire leads are positioned in a lead area of the display substrate, and each signal wire lead comprises at least two sections of unconnected sub-leads;
forming an insulating layer on the signal line leads, wherein the insulating layer is provided with connecting through holes, and each sub-lead corresponds to at least one connecting through hole;
and forming a bridging line on the insulating layer, wherein the bridging line is connected with two adjacent sub-leads of each signal line lead through the connecting via holes, and the resistivity of the bridging line is greater than that of the signal line lead.
The technical scheme of the invention has the following beneficial effects:
in the embodiment of the invention, each signal wire lead in the lead area of the display substrate is divided into at least two unconnected sub-leads, and the two adjacent sub-leads are electrically connected in a bridging mode of connecting the via hole and the bridging wire.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a schematic structural diagram of a display substrate according to a first embodiment of the invention;
FIG. 2 is a schematic structural diagram of a display substrate according to a second embodiment of the present invention;
fig. 3 is a schematic structural diagram of a display substrate after being cut according to an embodiment of the invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention, are within the scope of the invention.
Referring to fig. 1, an embodiment of the present invention provides a display substrate, including a display area 10 and a lead area 20 located outside the display area 10, a plurality of signal line leads 31 are disposed in the lead area 20, each signal line lead 31 includes at least two disconnected sub-leads, two adjacent sub-leads are electrically connected through an electrostatic prevention structure 32, the electrostatic prevention structure 32 includes: the bridge wire 321 is arranged in a different layer with the sub-lead, and the connection via hole 322 is used for communicating the bridge wire 321 with the sub-lead, and the resistivity of the bridge wire 321 is greater than that of the signal wire lead 31.
In the embodiment of the invention, each signal line lead in the lead area 20 is divided into at least two unconnected sub-leads, and the two adjacent sub-leads are electrically connected in a bridging mode of connecting the via hole 322 and the bridging line 321, because the resistivity of the bridging line 321 is greater than that of the signal line lead 31, namely the resistance of the bridging line 321 at the via hole 322 is greater, when static electricity passes through, the static electricity is firstly fused, the energy of the static electricity is consumed, and the static electricity is prevented from entering the display area 10 of the display substrate along the signal line lead 31, so that the defect caused by the static electricity is avoided.
It is understood that, in the embodiment of the present invention, at least one insulating layer is required to be disposed between the signal line lead 31 and the bridging line 321, the connecting via 322 penetrates through the at least one insulating layer, and the bridging line 321 is partially filled in the connecting via 322, so as to be electrically connected to the signal line lead 31.
In an embodiment of the present invention, the signal line lead 31 may include: and at least one of the lead wires of the data lines, the lead wires of the gate lines and the lead wires of the touch electrode lines.
In the embodiment shown in fig. 1, each signal line lead 31 includes four disconnected sub-leads connected by three static electricity preventing structures 32. Of course, in other embodiments of the present invention, the number of the sub-leads included in each signal line lead 31 is not limited to four, and includes at least two, and the number of the static electricity preventing structures 32 is not limited to three, which is determined according to the number of the sub-leads included in each signal line lead 31.
In the embodiment shown in fig. 1, an electrostatic preventing structure 32 for connecting two adjacent sub-leads includes four connecting vias 322, wherein two connecting vias 322 are located above one of the two adjacent sub-leads, and the other two connecting vias 322 are located above the other sub-lead. Of course, in other embodiments of the present invention, one electrostatic stopping structure 32 may include only two connecting vias 322, so that the connection of the two connected sub-leads can be completed. It is understood that the larger the number of the connection vias 322, the better the blocking capability against static electricity.
In the embodiment of the present invention, the resistivity of the bridge line 321 refers to the resistivity of the material forming the bridge line 321, and similarly, the resistivity of the signal line lead 31 refers to the resistivity of the material forming the signal line lead 31. In the embodiment of the present invention, preferably, the signal line lead 31 may be formed by a metal material to increase the signal transmission speed of the signal line lead 31, and the bridging line 321 may be formed by a transparent oxide conductive material, such as ITO or IZO, which has a generally large resistivity and is relatively weak, and is easily melted when passing static electricity, so as to consume the energy of the static electricity and prevent the static electricity from entering the display region 10 of the display substrate along the signal line lead 31.
The display substrate in the embodiment of the present invention may be an array substrate, and when the display substrate is an array substrate, the display substrate generally further includes a transparent electrode (not shown), for example, a common electrode and a pixel electrode, and preferably, the bridging line 321 may be disposed on the same layer as the transparent electrode and made of the same material, so that the bridging line 321 and the transparent electrode may be formed through a one-step patterning process, thereby reducing the number of masks used for forming the display substrate and reducing the production cost.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a display substrate according to a second embodiment of the present invention, which is different from the embodiment shown in fig. 1 in that: the lead area is further provided with a short-circuit bar 33 for testing, the short-circuit bar 33 is connected with the signal line lead 31 (specifically connected through a via hole), meanwhile, the short-circuit bar 33 is also connected with a test point (pad) (not shown) on the display substrate, when a subsequent test process of the display panel is performed, a test signal can be input to the test point, and the test signal enters the signal line lead 31 through the short-circuit bar 33 and enters a signal line in the display substrate through the signal line lead 31. In the embodiment shown in fig. 2, the display substrate includes two shorting bars 33, one of the two shorting bars 33 is connected to the odd-numbered signal line lead 31, and the other shorting bar 33 is connected to the even-numbered signal line lead 31, which is particularly suitable for the case where the signal line lead 31 is a lead of a data line, because it is preferable that the adjacent data lines input electrical signals with opposite polarities in order to improve the display effect. Of course, in other embodiments of the present invention, the number of the shorting bars 33 is not limited to two. When the signal line lead 31 is a lead of a data line, it is preferable that the number of the shorting bars 33 is an even number, for example, 2, 4, 6 … …, etc. As can be seen from fig. 2, the shorting bar 33 is disposed to intersect with the signal line lead 31, and the static electricity preventing structures 32 are disposed on both sides of the shorting bar 33, so as to improve the static electricity preventing effect. Of course, in other embodiments of the present invention, the static electricity preventing structure 32 may be disposed on only one side of the shorting bar 33.
Referring to fig. 1 and fig. 2, in the embodiment of the invention, the lead pad 20 includes: a binding region 21 and a non-binding region 22, the binding region 21 being disposed between the non-binding region 22 and the display region 10, the binding region 21 being for subsequent binding with a COF, the static electricity preventing structure 32 being disposed within the non-binding region 22 so as not to affect a subsequent binding process.
Referring to fig. 1 and fig. 2, in the embodiment of the present invention, the unbounded area 22 includes: a cut reservation region 221 and a cut removal region 222, the cut reservation region 221 being located between the cut removal region 222 and the binding region 21. The cutting-removed region refers to a region to be cut and removed in a subsequent cutting process of cutting the display panel including the display substrate in the embodiment of the present invention into a plurality of sub-panels, and the cutting-reserved region is a region reserved in the cutting process. In the embodiment shown in fig. 1 and 2, the static electricity preventing structures 32 are disposed in both the cut reserving section 221 and the cut removing section 222, which has an advantage that the static electricity preventing structures 32 in the cut reserving section 221 and the cut removing section 222 can simultaneously prevent static electricity before the cutting process is performed, and the static electricity preventing structures 32 disposed in the cut reserving section 221 can continue to protect the display substrate after the cutting process is performed. Of course, in other embodiments of the present invention, the static electricity preventing structure 32 may be disposed only in the cutting-remaining region 221, or only in the cutting-removing region 222.
Referring to fig. 2, the shorting bar 33 in the embodiment of the invention is disposed in the cutting-removed region 222, and will be cut off in the subsequent cutting process. In the embodiment shown in fig. 2, the static electricity preventing structures 23 are disposed on both sides of the shorting bar 33, and when static electricity occurs on the edge of the display panel before the cutting-off region 222 is cut off, the static electricity preventing structures 32 on the outer side of the shorting bar 33 (i.e., the side away from the display region 10) can effectively prevent the static electricity from flowing into the display panel, and protect the shorting bar 33, the via holes of the signal line leads 31, and the interior of the display panel. When the static electricity preventing structure 32 outside the shorting bar 33 cannot completely prevent static electricity, the static electricity preventing structure 32 inside the shorting bar 33 (i.e., the side close to the display region 10) may continue to block static electricity. After the cutting-off region 222 is cut off, referring to fig. 3, the static electricity preventing structure 32 inside the shorting bar 33 will continue to protect the lead region and the inside of the display surface.
An embodiment of the present invention further provides a display panel, including the display substrate in any of the above embodiments.
The display panel in the embodiment of the invention can be a TFT-LCD or OLED display panel and the like.
The embodiment of the invention also provides a manufacturing method of the display substrate, which is used for manufacturing the display substrate in any embodiment; the manufacturing method comprises the following steps:
forming a plurality of signal wire leads, wherein the signal wire leads are positioned in a lead area of the display substrate, and each signal wire lead comprises at least two sections of unconnected sub-leads;
forming an insulating layer on the signal line leads, wherein the insulating layer is provided with connecting through holes, and each sub-lead corresponds to at least one connecting through hole;
and forming a bridging line on the insulating layer, wherein the bridging line is connected with two adjacent sub-leads of each signal line lead through the connecting via holes, and the resistivity of the bridging line is greater than that of the signal line lead.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in the present application do not denote any order, quantity, or importance, but rather the terms are used to distinguish one element from another. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships are changed accordingly.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined by the appended claims
Such modifications and refinements are also considered to be within the scope of the present invention.
Claims (9)
1. The utility model provides a display substrate, includes the display area and is located the lead wire district outside the display area, be provided with many signal line leads in the lead wire district, its characterized in that, each signal line lead includes the sub-lead of two sections at least disconnections, and two sections adjacent sub-leads pass through static and prevent that the structure is connected, static prevents that the structure includes: the bridging line is arranged in a different layer with the sub-lead, and the connecting through hole is used for communicating the bridging line with the sub-lead, and the resistivity of the bridging line is greater than that of the signal line lead;
the lead region includes: a binding region and a non-binding region, the binding region being disposed between the non-binding region and the display region, the static-electricity-blocking structure being disposed within the non-binding region;
the unbound region includes: the static electricity preventing device comprises a cutting reserved area and a cutting removing area, wherein the cutting reserved area is located between the cutting removing area and the binding area, and the static electricity preventing structure is arranged in the cutting removing area.
2. The display substrate of claim 1, wherein each signal line lead corresponds to at least two of the static electricity blocking structures.
3. The display substrate of claim 1, wherein the static electricity preventing structure is disposed in the cutting reserved area.
4. The display substrate according to claim 1, wherein a shorting bar for testing is further disposed in the lead wires, the shorting bar is connected to the signal wire lead wires, the shorting bar is disposed to cross the signal wire lead wires, and at least one side of the shorting bar is provided with the static electricity blocking structure.
5. The display substrate according to claim 1, wherein the signal line lead is formed using a metal material, and the bridge line is formed using a transparent oxide conductive material.
6. The display substrate according to claim 5, wherein a transparent electrode is further disposed in the display region, and the bridging line and the transparent electrode are disposed in the same layer and the same material.
7. The display substrate according to any one of claims 1 to 6, wherein the signal line lead comprises: and at least one of the lead wires of the data lines, the lead wires of the gate lines and the lead wires of the touch electrode lines.
8. A display panel comprising the display substrate according to any one of claims 1 to 7.
9. A method for manufacturing a display substrate, for manufacturing the display substrate according to any one of claims 1 to 7; the manufacturing method comprises the following steps:
forming a plurality of signal wire leads, wherein the signal wire leads are positioned in a lead area of the display substrate, and each signal wire lead comprises at least two sections of unconnected sub-leads;
forming an insulating layer on the signal line leads, wherein the insulating layer is provided with connecting through holes, and each sub-lead corresponds to at least one connecting through hole;
forming a bridging line on the insulating layer, wherein the bridging line is connected with two adjacent sub-leads of each signal line lead through the connecting via hole, and the resistivity of the bridging line is greater than that of the signal line lead;
the lead region includes: a binding region and a non-binding region, the binding region being disposed between the non-binding region and the display region, the static-electricity-blocking structure being disposed within the non-binding region;
the unbound region includes: the static electricity preventing device comprises a cutting reserved area and a cutting removing area, wherein the cutting reserved area is located between the cutting removing area and the binding area, and the static electricity preventing structure is arranged in the cutting removing area.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201810286429.XA CN108711565B (en) | 2018-03-30 | 2018-03-30 | Display substrate, manufacturing method thereof and display panel |
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| CN201810286429.XA CN108711565B (en) | 2018-03-30 | 2018-03-30 | Display substrate, manufacturing method thereof and display panel |
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| CN108711565A CN108711565A (en) | 2018-10-26 |
| CN108711565B true CN108711565B (en) | 2020-05-12 |
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Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111179743B (en) * | 2020-02-19 | 2022-01-25 | 京东方科技集团股份有限公司 | Display substrate and display device |
| CN111900174A (en) * | 2020-07-27 | 2020-11-06 | 滁州惠科光电科技有限公司 | Array substrate, manufacturing method thereof and display device |
| CN112018087B (en) * | 2020-08-13 | 2022-05-31 | 深圳市华星光电半导体显示技术有限公司 | Display panel and preparation method thereof |
| CN112687191A (en) * | 2020-12-30 | 2021-04-20 | 厦门天马微电子有限公司 | Display panel and display device |
| CN113066803B (en) * | 2021-03-22 | 2023-04-28 | 合肥鑫晟光电科技有限公司 | Display panel manufacturing method, display panel and display panel to be cut |
| CN113192989B (en) * | 2021-04-30 | 2022-10-28 | 昆山国显光电有限公司 | Array substrate, array substrate manufacturing method and display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105789184A (en) * | 2016-04-14 | 2016-07-20 | 北京京东方显示技术有限公司 | Substrate, manufacturing method thereof, and display device |
| CN205452280U (en) * | 2016-03-30 | 2016-08-10 | 京东方科技集团股份有限公司 | Electrostatic protection structure, array substrate and display device |
| CN106597713A (en) * | 2017-01-22 | 2017-04-26 | 厦门天马微电子有限公司 | Array substrate and display panel |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN205452280U (en) * | 2016-03-30 | 2016-08-10 | 京东方科技集团股份有限公司 | Electrostatic protection structure, array substrate and display device |
| CN105789184A (en) * | 2016-04-14 | 2016-07-20 | 北京京东方显示技术有限公司 | Substrate, manufacturing method thereof, and display device |
| CN106597713A (en) * | 2017-01-22 | 2017-04-26 | 厦门天马微电子有限公司 | Array substrate and display panel |
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