CN108711399B - Emission control drive circuit, emission control driver, and organic light emitting display device - Google Patents
Emission control drive circuit, emission control driver, and organic light emitting display device Download PDFInfo
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- CN108711399B CN108711399B CN201810535429.9A CN201810535429A CN108711399B CN 108711399 B CN108711399 B CN 108711399B CN 201810535429 A CN201810535429 A CN 201810535429A CN 108711399 B CN108711399 B CN 108711399B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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Abstract
The invention provides an emission control drive circuit, an emission control driver and an organic light-emitting display device, wherein each emission control drive circuit forms a stage, a plurality of stages are connected in sequence, the emission control drive circuit comprises an input unit, a first gate control circuit, a second gate control circuit, an output unit and an initial drive controller, wherein: the input unit transmits any one of a first signal and a second signal in response to a first clock signal, a second clock signal, and a start signal; the first grid control circuit controls the initial driving controller to output an initial driving signal of a next-stage emission control driving circuit through a first signal or a second signal; the second gate control circuit controls the output unit to output an emission control signal through the first signal or the second signal.
Description
Technical Field
The present invention relates to the field of optoelectronic technologies, and in particular, to an emission control driving circuit, an emission control driver, and an organic light emitting display device.
Background
In recent years, many types of display devices, such as liquid crystal display devices, plasma display devices, electrowetting display devices, electrophoretic display devices, organic light emitting display devices, and the like, have been developed at home and abroad. The organic light-emitting display device utilizes the recombination of electron hole pairs in a specific material to emit light with a specific wavelength to display images, and has the advantages of quick response, low power consumption, light weight, thinness, wide color gamut and the like.
As shown in fig. 1, the organic light emitting display device includes: a pixel circuit 100 formed of a plurality of pixels (PX11, PX12, …, PXn1, PXn2) for displaying an image; a data driver 300 applying a data voltage to the pixels; a scan driver 200 sequentially applying scan signals to the pixels; an emission control driver 400 applying emission control signals to the pixels; the pixels receive the data voltages in response to the scan signals, and the pixels generate light having a predetermined luminance corresponding to the data voltages to display an image. The emission period of the pixels is controlled by the emission control signal. The emission control driver 400 is initialized in response to the initial control signal and generates an emission control signal.
Generally, different pixel circuits require different driving timing signals. For example, 2T1C pixel circuit requires only one scan driving signal, while 6T2C pixel circuit requires two scan signals and one emission control signal, and the design circuit and control method are very complicated.
Disclosure of Invention
The invention aims to provide an emission control drive circuit, an emission control driver and an organic light-emitting display device, which aim to solve the problem that an emission control circuit and a control mode of the conventional pixel circuit are complicated.
In order to solve the above technical problem, the present invention provides an emission control driving circuit, each emission control driving circuit constitutes one stage, a plurality of stages are connected in sequence, the emission control driving circuit includes an input unit, a first gate control circuit, a second gate control circuit, an output unit, and an initial driving controller, wherein:
the input unit transmits any one of a first signal and a second signal in response to a first clock signal, a second clock signal, and a start signal;
the first grid control circuit controls the initial driving controller to output an initial driving signal of a next-stage emission control driving circuit through a first signal or a second signal;
the second gate control circuit controls the output unit to output an emission control signal through the first signal or the second signal.
Optionally, in the emission control driving circuit, the input unit includes a first transistor, a second transistor, and a first capacitor, wherein:
the first transistor and the second transistor are P-type thin film transistors;
the grid of the first transistor responds to the first clock signal, the source of the first transistor responds to the starting signal, and the drain of the first transistor is connected with the grid of the second transistor;
the source electrode of the second transistor responds to the second clock signal, and the drain electrode of the second transistor is connected with the first grid control circuit;
one end of the first capacitor is connected with the grid electrode of the second transistor, and the other end of the first capacitor is connected with the drain electrode of the second transistor.
Optionally, in the emission control driving circuit, the first gate control circuit includes a third transistor, a fourth transistor and a fifth transistor, wherein:
the third transistor, the fourth transistor and the fifth transistor are P-type thin film transistors;
a gate of the third transistor is connected to a drain of the second transistor, a source of the third transistor is connected to a first power supply, and a drain of the third transistor is connected to a source of the fourth transistor;
a gate of the fourth transistor is responsive to the first clock signal, and a drain of the fourth transistor is connected to a second power supply;
the grid electrode of the fifth transistor is connected with the drain electrode of the third transistor, and the source electrode of the fifth transistor is connected with a first power supply; and the drain electrode of the fifth transistor is connected with the drain electrode of the second transistor.
Optionally, in the emission control driving circuit, the second gate control circuit includes a seventh transistor, wherein:
the seventh transistor is a P-type thin film transistor;
a gate of the seventh transistor is responsive to the first clock signal, and a drain of the seventh transistor is connected to a second power supply.
Optionally, in the emission control driving circuit, the output unit includes a ninth transistor, a tenth transistor, and a twelfth transistor, wherein:
the ninth transistor, the tenth transistor, and the twelfth transistor are P-type thin film transistors;
a gate of the ninth transistor is connected to a source of the seventh transistor, and a drain of the ninth transistor is connected to the second power supply;
a gate of the tenth transistor is connected to a source of the ninth transistor, a source of the tenth transistor is connected to a gate of the twelfth transistor, and a drain of the tenth transistor is connected to the second power supply;
and the source electrode of the twelfth transistor outputs the emission control signal, and the drain electrode of the twelfth transistor is connected with the second power supply.
Optionally, in the emission control driving circuit, the output unit further includes a second capacitor and a third capacitor, wherein:
one end of the second capacitor is connected with the grid electrode of the ninth transistor, and the other end of the second capacitor is connected with the source electrode of the ninth transistor;
one end of the third capacitor is connected with the grid electrode of the twelfth transistor, and the other end of the third capacitor is connected with the source electrode of the twelfth transistor.
Optionally, in the emission control driving circuit, the initial driving controller includes a sixth transistor, an eighth transistor, and an eleventh transistor, wherein:
the sixth transistor, the eighth transistor, and the eleventh transistor are P-type thin film transistors;
the grid electrode of the sixth transistor is connected with the drain electrode of the fifth transistor and outputs the initial driving signal; a source electrode of the sixth transistor is connected with a drain electrode of the eighth transistor, and a drain electrode of the sixth transistor is connected with a source electrode of the seventh transistor;
a gate of the eighth transistor is connected to a drain of the fifth transistor, a source of the eighth transistor is connected to the first power supply, and a drain of the eighth transistor is connected to a source of the ninth transistor;
a source of the eleventh transistor is connected to the first power supply, and a drain of the eleventh transistor outputs the emission control signal.
Optionally, in the emission control driving circuit, the first clock signal and the second clock signal have the same time period and have non-overlapping phases, and the start signal outputs a falling edge voltage temporarily at a first falling edge voltage of the first clock signal and continues until the first falling edge voltage of the second clock signal comes.
The present invention also provides an emission control driver including a plurality of emission control driving circuits as described in any one of the above, an initial driving signal of each of the emission control driving circuits being supplied to a start signal terminal of a next-stage emission control driving circuit.
The present invention also provides an organic light emitting display device including a plurality of emission control drivers as described above.
In the emission control drive circuit, the emission control driver and the organic light-emitting display device provided by the invention, the output of the emission control signal and the operation of each stage of circuits of the whole emission control driver can be realized only by the first clock signal, the second clock signal, the initial signal and twelve transistors, and the circuit design and the control mode are simple.
Drawings
FIG. 1 is a schematic view of a prior art organic light emitting display device;
FIG. 2 is a schematic diagram of a plurality of emission control driving circuits according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of an emission control driving circuit according to an embodiment of the present invention;
FIG. 4 is a signal waveform diagram of an emission control driving circuit according to an embodiment of the present invention;
shown in the figure: 1-first emission control drive circuit (odd emission control drive circuit); 2-a second emission control drive circuit (even emission control drive circuit); 10-an input unit; 20-a first gate control circuit; 30-a second gating circuit; 40-an output unit; 50-initial drive control; 100-pixel circuit; 200-a scan driver; 300-a data driver; 400-emission control drive circuit.
Detailed Description
The emission control driving circuit, the emission control driver, and the organic light emitting display device according to the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
The core idea of the present invention is to provide an emission control driving circuit, an emission control driver and an organic light emitting display device, so as to solve the problem that the emission control circuit and the control method of the existing pixel circuit are complicated.
In order to achieve the above-mentioned idea, the present invention provides an emission control driving circuit, an emission control driver and an organic light emitting display device, each emission control driving circuit constitutes one stage, a plurality of stages are sequentially connected, as shown in fig. 2, an output terminal of a first emission control driving circuit 1 is connected to a second emission control driving circuit 2, and is sequentially connected to subsequent emission control driving circuits according to the structure, and finally forms an emission control driver 400 in fig. 1, the first emission control driving circuit 1 is an odd emission control driving circuit, the second emission control driving circuit 2 is an even emission control driving circuit, a detailed circuit structure diagram of each of the emission control driving circuits in fig. 2 is shown in fig. 3, the emission control driving circuit includes an input unit 10, a first gate control circuit 20, a second gate control circuit 30, an output unit 40 and an initial driving controller 50, wherein: the input unit 10 transmits any one of a first signal and a second signal IN response to a first clock signal CLK1, a second clock signal CLK2, and a start signal IN; the first gate control circuit 20 controls the initial driving controller 50 to output an initial driving signal OUT of a next stage emission control driving circuit through a first signal or a second signal; the second gate control circuit 30 controls the output unit 40 to output the emission control signal EM through the first signal or the second signal.
Specifically, in the emission control driving circuit, the input unit 10 includes a first transistor M1, a second transistor M2, and a first capacitor C1, wherein: the first transistor M1 and the second transistor M2 are P-type thin film transistors; the gate of the first transistor M1 is responsive to the first clock signal CLK1, the source of the first transistor M1 is responsive to the start signal IN, the drain of the first transistor M1 is connected to the gate of the second transistor M2; the source of the second transistor M2 is responsive to the second clock signal CLK2, and the drain of the second transistor M2 is connected to the first gate control circuit 20; one end of the first capacitor C1 is connected to the gate of the second transistor M2, and the other end is connected to the drain of the second transistor M2.
Further, in the emission control driving circuit, the first gate control circuit 20 includes a third transistor M3, a fourth transistor M4, and a fifth transistor M5, wherein: the third transistor M3, the fourth transistor M4 and the fifth transistor M5 are P-type thin film transistors; the gate of the third transistor M3 is connected to the drain of the second transistor M2, the source of the third transistor M3 is connected to the first power source VGH, and the drain of the third transistor M3 is connected to the source of the fourth transistor M4; a gate of the fourth transistor M4 is responsive to the first clock signal CLK1, and a drain of the fourth transistor M4 is connected to a second power source VGL; the gate of the fifth transistor M5 is connected to the drain of the third transistor M3, and the source of the fifth transistor M5 is connected to the first power source VGH; the drain of the fifth transistor M5 is connected to the drain of the second transistor M2. The second gate control circuit 30 includes a seventh transistor M7, wherein: the seventh transistor M7 is a P-type thin film transistor; a gate of the seventh transistor M7 is responsive to the first clock signal CLK1, a drain of the seventh transistor M7 is connected to the second power source VGL, and a source of the seventh transistor M7 is connected to the sixth transistor in the output unit 40. The level of the first power VGH is higher than that of the second power VGL.
As shown in fig. 3, in the emission control driving circuit, the output unit 40 includes a ninth transistor M9, a tenth transistor M10, and a twelfth transistor M12, wherein: the ninth transistor M9, the tenth transistor M10, and the twelfth transistor M12 are P-type thin film transistors; the gate of the ninth transistor M9 is connected to the source of the seventh transistor M7, the source of the ninth transistor M9 is connected to the eighth transistor in the initial driving controller 50, and the drain of the ninth transistor M9 is connected to the second power source VGL; a gate of the tenth transistor M10 is connected to the source of the ninth transistor M9, a source of the tenth transistor M10 is connected to the gate of the twelfth transistor M12, and a drain of the tenth transistor M10 is connected to the second power source VGL; a source of the twelfth transistor M12 outputs the emission control signal EM, and a drain of the twelfth transistor M12 is connected to the second power source VGL; the output unit 40 further includes a second capacitor C2 and a third capacitor C3, wherein: one end of the second capacitor C2 is connected to the gate of the ninth transistor M9, and the other end is connected to the source of the ninth transistor M9; one end of the third capacitor C3 is connected to the gate of the twelfth transistor M12, and the other end is connected to the source of the twelfth transistor M12.
In addition, in the emission control driving circuit, the initial driving controller 50 includes a sixth transistor M6, an eighth transistor M8, and an eleventh transistor M11, wherein: the sixth transistor M6, the eighth transistor M8, and the eleventh transistor M11 are P-type thin film transistors; the gate of the sixth transistor M6 is connected to the drain of the fifth transistor M5 and outputs the initial driving signal OUT; the source of the sixth transistor M6 is connected to the drain of the eighth transistor M8, and the drain of the sixth transistor M6 is connected to the source of the seventh transistor M7; the gate of the eighth transistor M8 is connected to the drain of the fifth transistor M5, the source of the eighth transistor M8 is connected to the first power source VGH, and the drain of the eighth transistor M8 is connected to the source of the ninth transistor M9; a source of the eleventh transistor M11 is connected to the first power source VGH, and a drain of the eleventh transistor M11 outputs the emission control signal EM.
As shown IN fig. 2 to 4, IN the emission control driving circuit, the source of the first transistor receives the output signal of the previous emission control driving circuit, the source of the first transistor of the second emission control driving circuit 2 is connected to the initial driving signal OUT1 terminal of the first emission control driving circuit 1, and receives the initial driving signal OUT1 of the first emission control driving circuit 1, the waveform of the initial driving signal OUT1 is shown IN fig. 4, the source of the first transistor of the first emission control driving circuit 1 receives the start signal IN, the waveform of the start signal IN is shown IN fig. 4, the odd emission control driving circuits, for example, the gate of the first transistor of the first emission control drive circuit 1 receives the first clock signal CLK1, the odd emission control drive circuit, for example, the source of the second transistor of the first emission control driving circuit 1 receives the second clock signal CLK 2; the gate of the first transistor of the even-numbered emission control driving circuit, e.g., the second emission control driving circuit 2, receives the second clock signal CLK2, and the source of the second transistor of the even-numbered emission control driving circuit, e.g., the second emission control driving circuit 2, receives the first clock signal CLK1, and the waveforms of the first clock signal CLK1 and the second clock signal CLK2 are shown in fig. 4.
As shown IN fig. 4, IN the emission control driving circuit, the first clock signal CLK1 and the second clock signal CLK2 have the same period and have non-overlapping phases, and the start signal IN outputs a falling edge voltage temporarily at the first falling edge voltage of the first clock signal CLK1 and continues until the first falling edge voltage of the second clock signal CLK2 comes.
The present embodiment analyzes the timing waveforms of the first emission control driving circuit, and as shown IN fig. 4, the start signal IN and the first clock signal CLK1 have a high level at the first time point t1, and the second clock signal CLK2 has a low level at the first time period t 1. Since the first transistor M1, the second transistor M2, the fourth transistor M4, and the seventh transistor M7 are all P-type thin film transistors, the first transistor, the second transistor, the fourth transistor, and the seventh transistor are turned off.
At a second time point t2, the start signal IN and the first clock signal CLK1 have a low level, and the second clock signal CLK2 has a high level. The first transistor, the second transistor, the fourth transistor and the seventh transistor are conducted, voltage between a grid electrode and a drain electrode of the second transistor is kept stable due to voltage maintaining effect of the first capacitor, the grid electrode of the fifth transistor is connected with a second power supply through conduction of the fourth transistor, the fifth transistor is conducted, an initial driving signal end is connected with the first power supply to output high level, the grid electrode of the ninth transistor is connected with the second power supply through conduction of the seventh transistor, the ninth transistor is conducted, the tenth transistor and the twelfth transistor are further conducted, and the emission control signal outputs low level.
At the third time point t3, the start signal IN and the first clock signal CLK1 have a high level, and the second clock signal CLK2 has a low level. Since the second transistor is kept on, at this time, the gate of the third transistor is turned on in response to the second clock signal, the third transistor is turned on, the fifth transistor is turned off, the initial driving signal is directly coupled to the second clock signal, a low level is output, and the fourth, seventh, ninth, tenth and twelfth transistors are turned off, the sixth, eighth and eleventh transistors are turned on, and the emission control signal is at a high level.
At the fourth time point t4, the start signal IN and the second clock signal CLK2 have a high level, and the first clock signal CLK1 has a low level. Since the second transistor is kept on, at this time, the gate of the third transistor is turned off in response to the second clock signal, the third transistor is turned off, the initial driving signal is directly coupled to the second clock signal, and a high level is output, while the fourth transistor (the fifth transistor is turned on), the seventh transistor, the ninth transistor, the tenth transistor, and the twelfth transistor are turned on, the sixth transistor, the eighth transistor, and the eleventh transistor are turned off, and the emission control signal is at a low level.
The present embodiment further provides an emission control driver, as shown IN fig. 2, the emission control driver includes a plurality of emission control driving circuits as described IN any one of the above, and an initial driving signal OUT of each of the emission control driving circuits is provided to a start signal terminal IN of a next-stage emission control driving circuit. The present embodiment also provides an organic light emitting display device including a plurality of emission control drivers as described above.
IN the emission control drive circuit, the emission control driver and the organic light emitting display device provided by the invention, the output of the emission control signal EM and the operation of each stage circuit of the whole emission control driver can be realized only by the first clock signal CLK1, the second clock signal CLK2, the start signal IN and twelve transistors, and the design circuit and the control mode are simple.
In summary, the foregoing embodiments have described in detail different configurations of the emission control driving circuit, the emission control driver and the organic light emitting display device, but it is understood that the present invention includes but is not limited to the configurations illustrated in the foregoing embodiments, and any modifications based on the configurations provided in the foregoing embodiments are within the scope of the present invention. One skilled in the art can take the contents of the above embodiments to take a counter-measure.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (10)
1. The utility model provides an emission control drive circuit, every emission control drive circuit constitutes a stage, and a plurality of stages link to each other in proper order, its characterized in that, emission control drive circuit includes input unit, first gate-controlled circuit, second gate-controlled circuit, output unit and initial drive controller, wherein:
the input unit transmits any one of a first signal and a second signal in response to a first clock signal, a second clock signal, and a start signal;
the first grid control circuit controls the initial driving controller to output an initial driving signal of a next-stage emission control driving circuit through a first signal or a second signal;
the second grid control circuit controls the output unit to output an emission control signal through a first signal or a second signal;
the output unit comprises a ninth transistor, a tenth transistor and a twelfth transistor, wherein the drain electrode of the ninth transistor, the drain electrode of the tenth transistor and the drain electrode of the twelfth transistor are all connected with a second power supply; a gate of the tenth transistor is connected to a source of the ninth transistor, a source of the tenth transistor is connected to a gate of the twelfth transistor, and a source of the twelfth transistor outputs the emission control signal;
the initial driving controller comprises a sixth transistor, an eighth transistor and an eleventh transistor, wherein the source electrode of the sixth transistor is connected with the drain electrode of the eighth transistor, the source electrode of the eighth transistor is connected with the first power supply, and the drain electrode of the eighth transistor is connected with the source electrode of the ninth transistor; a source of the eleventh transistor is connected to the first power supply, and a drain of the eleventh transistor outputs the emission control signal;
the grid electrode of the ninth transistor is connected with the drain electrode of the sixth transistor and the second grid control circuit; the grid electrode of the sixth transistor, the grid electrode of the eighth transistor and the grid electrode of the eleventh transistor are all connected with the first grid control circuit.
2. The emission control drive circuit according to claim 1, wherein the input unit includes a first transistor, a second transistor, and a first capacitor, wherein:
the first transistor and the second transistor are P-type thin film transistors;
the grid of the first transistor responds to the first clock signal, the source of the first transistor responds to the starting signal, and the drain of the first transistor is connected with the grid of the second transistor;
the source electrode of the second transistor responds to the second clock signal, and the drain electrode of the second transistor is connected with the first grid control circuit;
one end of the first capacitor is connected with the grid electrode of the second transistor, and the other end of the first capacitor is connected with the drain electrode of the second transistor.
3. The emission control driving circuit according to claim 2, wherein the first gate control circuit includes a third transistor, a fourth transistor, and a fifth transistor, wherein:
the third transistor, the fourth transistor and the fifth transistor are P-type thin film transistors;
a gate of the third transistor is connected to a drain of the second transistor, a source of the third transistor is connected to a first power supply, and a drain of the third transistor is connected to a source of the fourth transistor;
a gate of the fourth transistor is responsive to the first clock signal, and a drain of the fourth transistor is connected to a second power supply;
the grid electrode of the fifth transistor is connected with the drain electrode of the third transistor, and the source electrode of the fifth transistor is connected with a first power supply; and the drain electrode of the fifth transistor is connected with the drain electrode of the second transistor.
4. The emission control driving circuit according to claim 3, wherein the second gate control circuit includes a seventh transistor, wherein:
the seventh transistor is a P-type thin film transistor;
a gate of the seventh transistor is responsive to the first clock signal, and a drain of the seventh transistor is connected to a second power supply; a source of the seventh transistor is connected to a drain of the sixth transistor and a gate of the ninth transistor.
5. The emission control driver circuit according to claim 4, wherein the ninth transistor, the tenth transistor, and the twelfth transistor are P-type thin film transistors;
and the grid electrode of the ninth transistor is connected with the source electrode of the seventh transistor.
6. The emission control drive circuit according to claim 5, wherein the output unit further includes a second capacitor and a third capacitor, wherein:
one end of the second capacitor is connected with the grid electrode of the ninth transistor, and the other end of the second capacitor is connected with the source electrode of the ninth transistor;
one end of the third capacitor is connected with the grid electrode of the twelfth transistor, and the other end of the third capacitor is connected with the source electrode of the twelfth transistor.
7. The emission control drive circuit according to claim 6,
the sixth transistor, the eighth transistor, and the eleventh transistor are P-type thin film transistors;
the grid electrode of the sixth transistor is connected with the drain electrode of the fifth transistor and outputs the initial driving signal; the drain electrode of the sixth transistor is connected with the source electrode of the seventh transistor;
and the grid electrode of the eighth transistor is connected with the drain electrode of the fifth transistor.
8. The transmission control driver circuit according to claim 1, wherein the first clock signal and the second clock signal have the same period of time and have non-overlapping phases, and the start signal outputs a falling edge voltage temporarily at a first falling edge voltage of the first clock signal and continues until the first falling edge voltage of the second clock signal comes.
9. An emission control driver, comprising a plurality of emission control driving circuits according to any one of claims 1 to 8, wherein an initial driving signal of each of the emission control driving circuits is supplied to a start signal terminal of a next-stage emission control driving circuit.
10. An organic light emitting display device characterized by comprising a plurality of emission control drivers according to claim 9.
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| KR100666637B1 (en) * | 2005-08-26 | 2007-01-10 | 삼성에스디아이 주식회사 | Emission driver of organic electroluminescence display device |
| KR100969784B1 (en) * | 2008-07-16 | 2010-07-13 | 삼성모바일디스플레이주식회사 | Organic light emitting display and driving method for the same |
| CN203644373U (en) * | 2013-12-05 | 2014-06-11 | 华南理工大学 | Grid driving unit and grid scanning driver |
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| CN108711399A (en) | 2018-10-26 |
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