CN108710245B

CN108710245B - Display substrate, repairing method thereof and display panel

Info

Publication number: CN108710245B
Application number: CN201810494691.3A
Authority: CN
Inventors: 李立雄; 陈平; 王贺卫; 吴松
Original assignee: BOE Technology Group Co Ltd; Hefei BOE Display Lighting Co Ltd
Current assignee: BOE Technology Group Co Ltd; Hefei BOE Display Lighting Co Ltd
Priority date: 2018-05-22
Filing date: 2018-05-22
Publication date: 2021-01-26
Anticipated expiration: 2038-05-22
Also published as: CN108710245A

Abstract

A display substrate, a repairing method thereof and a display panel are disclosed. The display substrate includes a substrate and a plurality of main signal lines and sub signal lines disposed thereon. The main signal lines and the sub signal lines intersect to define a plurality of pixel units. Each pixel cell includes a primary electrode and a secondary electrode that are insulated from each other. The display substrate further includes a plurality of repair lines. Each repair line is arranged to surround each crossing position of the primary signal line and the secondary signal line. The orthographic projection of each repair line on the substrate and the orthographic projection of three adjacent pixel units around the crossing position are overlapped. Each repair line includes first, second, and third repair regions at overlapping positions with three adjacent pixel units, respectively, and overlaps the primary signal line and the secondary signal line to form fourth and fifth repair regions, respectively. In the first, second and third repair regions, an orthographic projection of the repair line on the substrate does not overlap with an orthographic projection of the sub-electrode.

Description

Display substrate, repairing method thereof and display panel

Technical Field

The disclosure relates to the technical field of display, and in particular relates to a display substrate, a repair method thereof and a display panel.

Background

Thin Film Transistor Liquid Crystal displays (TFT-LCDs) have the characteristics of small size, low power consumption, no radiation and the like, and occupy a leading position in the current flat panel Display market. By means of Advanced-Super-Dimensional Switching (AD-SDS), an edge electric field is generated between pixel electrodes in the same plane, so that oriented liquid crystal molecules between the electrodes and above the electrodes can deflect in the plane direction, the viewing angle is increased, and meanwhile the light transmission efficiency of a liquid crystal layer can be improved.

In the manufacturing process, due to influences of uneven substrate surface, heat treatment, etching process and the like, Data Open (DO) and Gate Open (GO) may occur to the Data lines. The data line has a small width, so that the possibility of the data line being broken is high. When the data line or the gate is disconnected, the signal cannot be transmitted to the corresponding pixel unit, which may cause abnormal display of the pixel unit and thus abnormal display of the liquid crystal panel. In addition, in the manufacturing process, due to influences of uneven metal deposition, substrate cleaning degree, etching process and the like, pattern residues are easily caused, and finally, Data Gate Short (DGS) is caused, so that the yield of the display is seriously influenced.

Disclosure of Invention

The disclosed embodiments provide a display substrate including a substrate, and a plurality of main signal lines and a plurality of sub signal lines disposed on the substrate in parallel with each other, wherein the main signal lines and the sub signal lines are insulated from each other and cross to define a plurality of pixel units, each pixel unit including a main electrode and a sub electrode insulated from each other,

wherein the display substrate further comprises a plurality of repair lines, each of which is arranged to surround each crossing position of the primary signal line and the secondary signal line, an orthographic projection of each of the repair lines on the substrate overlaps with an orthographic projection of three adjacent pixel units around the crossing position on the substrate,

wherein each of the repair lines includes a first repair region, a second repair region, and a third repair region at overlapping positions with the three adjacent pixel units, respectively, and each of the repair lines overlaps the primary signal line and the secondary signal line to form a fourth repair region and a fifth repair region, respectively, an

Wherein in the first repair region, the second repair region and the third repair region, an orthographic projection of the repair line on the substrate does not overlap with an orthographic projection of the secondary electrode on the substrate.

In one or more embodiments, each pixel unit further includes a thin film transistor, a source of the thin film transistor is electrically connected to the main signal line, a drain of the thin film transistor is electrically connected to the main electrode, and each repair line overlaps a connection line between the main signal line and the source to form a sixth repair region.

In one or more embodiments, a connection line between the primary signal line and the source electrode extends parallel to the secondary signal line.

In one or more embodiments, the primary signal line is a data line, the secondary signal line is a gate line, the primary electrode is a pixel electrode, and the secondary electrode is a common electrode.

In one or more embodiments, each repair line is formed of metal.

In one or more embodiments, each repair line is L-shaped, a portion of each repair line between the first repair region and the second repair region extends parallel to the secondary signal line, and a portion of each repair line between the second repair region and the third repair region extends parallel to the primary signal line.

The embodiment of the present disclosure also provides a display panel including the display substrate as described above.

The embodiment of the present disclosure also provides a method for repairing a broken main signal line in a display substrate, including the steps of:

determining the open circuit position of the main signal wire;

determining a first repairing line, a second repairing line and a first main electrode for repairing the broken circuit according to the broken circuit position, wherein the first repairing line is the repairing line which is positioned at one side of the broken circuit in the extension direction of the main signal line and is closest to the broken circuit position, the second repairing line is the repairing line which is positioned at the other side of the broken circuit in the extension direction of the main signal line and is closest to the broken circuit position, and the first main electrode is the main electrode which is partially overlapped with the first repairing line and the second repairing line; and

and repairing the main signal wire with the broken circuit by using the first repairing wire, the second repairing wire and the first main electrode.

In one or more embodiments, the repairing the disconnected main signal line using the first repair line, the second repair line, and the first main electrode includes:

the first repair line is electrically connected to the main signal line at a fourth repair region and the first main electrode at a third repair region, and the second repair line is electrically connected to the first main electrode at a second repair region and the main signal line at a fourth repair region

the first repair line is electrically connected to the main signal line at a fourth repair region and to the first main electrode at a third repair region, and the second repair line is electrically connected to the first main electrode at a second repair region and to a connection line between the main signal line and the source electrode of the thin film transistor at a sixth repair region.

The embodiment of the present disclosure also provides a method for repairing a sub-signal line open circuit in a display substrate, including the steps of:

determining the open circuit position of the secondary signal line;

determining a first repair line, a second repair line, a first main electrode, and a first connection line for repairing the open circuit according to the open circuit position, wherein the first repair line is a repair line located at one side of the open circuit in a secondary signal line extending direction and closest to the open circuit position, the second repair line is a repair line located at the other side of the open circuit in the secondary signal line extending direction and closest to the open circuit position, the first main electrode is a main electrode partially overlapping both the first repair line and the second repair line, and the first connection line is a connection line between the main signal line and a source electrode of a thin film transistor located between the first repair line and the second repair line; and

and repairing the secondary signal line with the broken circuit by using the first repairing line, the second repairing line, the first main electrode and the first connecting line.

In one or more embodiments, the repairing the secondary signal line in which the disconnection occurs using the first repair line, the second repair line, the first main electrode, and the first connection line includes:

cutting off the first connection line at a position between a sixth repair region of the first repair line and a main signal line connected to the first connection line, cutting off a connection line between a drain of a thin film transistor located between the first repair line and the second repair line and the first main electrode, electrically connecting the first repair line to the sub signal line at a fifth repair region and the first connection line at a sixth repair region, and electrically connecting a source to which the first connection line is connected to the sub signal line

and cutting off the first connecting line, electrically connecting the first repairing line with the secondary signal line in a fifth repairing area and electrically connecting the first repairing line with the first main electrode in a second repairing area, and electrically connecting the drain electrode of the thin film transistor between the first repairing line and the second repairing line with the secondary signal line.

and cutting off the first connecting wire, electrically connecting the first repairing wire with the secondary signal wire in a fifth repairing area and electrically connecting the first repairing wire with the first main electrode in a second repairing area, and electrically connecting the second repairing wire with the first main electrode in the first repairing area and electrically connecting the second repairing wire with the secondary signal wire in the fifth repairing area.

The embodiment of the present disclosure also provides a method for repairing a short circuit of a primary signal line and a secondary signal line in a display substrate, including the steps of:

determining the position of the short circuit of the main signal wire and the secondary signal wire and the related main signal wire and secondary signal wire;

at the position where the main signal wire and the secondary signal wire are short-circuited, the main signal wire is cut off by clinging to two sides of the secondary signal wire to form a first main signal wire open circuit and a second main signal wire open circuit;

determining a first repairing wire which is nearest to the short circuit of the primary signal wire and the secondary signal wire, a second repairing wire which is nearest to the side, far away from the first repairing wire, of the broken circuit of the second primary signal wire, and a first main electrode which is partially overlapped with the first repairing wire and the second repairing wire; and

the first repair line is electrically connected to the main signal line at a fourth repair region and to the first main electrode at a third repair region, and the second repair line is electrically connected to the first main electrode at a second repair region and to the main signal line at a fourth repair region.

determining a first repair line which is nearest to the short circuit of the primary signal line and the secondary signal line, and a first connecting line between the primary signal line and the source electrode which is partially overlapped with the first repair line; and

the first repair line is electrically connected to the main signal line at a fourth repair region and to the first connection line at a sixth repair region.

at the position where the main signal wire and the secondary signal wire are short-circuited, the secondary signal wire is cut off by clinging to two sides of the main signal wire to form a first secondary signal wire open circuit and a second secondary signal wire open circuit;

determining a second connection line between a nearest neighbor first repair line located at one side of the short circuit of the primary signal line and the secondary signal line, a nearest neighbor third repair line located at the other side of the short circuit of the secondary signal line, a second main electrode partially overlapping both the first repair line and the third repair line, and a primary signal line and a source electrode partially overlapping the third repair line in the extension direction of the secondary signal line; and

and cutting off the second connecting line, electrically connecting the third repairing line with the secondary signal line in a fifth repairing region and electrically connecting the third repairing line with the second main electrode in a second repairing region, and electrically connecting the first repairing line with the second main electrode in a first repairing region and electrically connecting the first repairing line with the secondary signal line in a fifth repairing region.

In one or more embodiments, the electrical connection and disconnection is by laser welding.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is apparent that the drawings in the following description are only some embodiments of the present disclosure.

FIG. 1 is a schematic diagram of a conventional method for repairing an open circuit of a data line;

FIG. 2A is a schematic top view of a display substrate according to an embodiment of the present disclosure;

FIG. 2B is a schematic cross-sectional view of the display substrate shown in FIG. 2A taken along line AB;

FIG. 3A is a schematic top view of repairing a data line break according to one embodiment of the present disclosure;

FIG. 3B is a schematic top view of repairing a data line break according to one embodiment of the present disclosure;

fig. 4A is a schematic top view of repairing a grid line break according to an embodiment of the present disclosure;

fig. 4B is a schematic top view of repairing a grid line break according to an embodiment of the present disclosure;

fig. 4C is a schematic top view of repairing a grid line break according to an embodiment of the present disclosure;

fig. 5A is a schematic top view of repairing a gate line data line short according to an embodiment of the present disclosure;

fig. 5B is a schematic top view of repairing a gate line data line short according to an embodiment of the present disclosure; and

fig. 5C is a schematic top view of repairing a gate line data line short according to an embodiment of the present disclosure.

Detailed Description

To make the objects, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be described in further detail below with reference to the accompanying drawings.

When the array substrate is found to have open data lines or open grid lines before the box forming process, the open areas can be bridged by a Chemical Vapor Deposition (CVD) method so as to realize repair. Because Array substrate Test (Array Test) has a certain missing detection rate and the box forming process can cause new open circuit, the method for repairing the open circuit detected after box forming by chemical vapor deposition is obviously not applicable any more.

For the data line open circuit detected after the box forming, the current repairing method is to repair by means of a repairing line method. Referring to fig. 1, the data line DL 'may be disconnected as shown by DO'. At this time, the head and tail ends of the data line DL ' with the broken circuit are respectively connected with the repair line RL ' by laser welding, as shown by the solid dots in the figure, so as to achieve the purpose of repairing the broken circuit DO ' of the data line.

With the increasing of the panel size, a longer repair line needs to be arranged on the array substrate, which causes the resistance of the repair line to be larger and larger, thereby causing larger signal attenuation and seriously affecting the display effect. Since the number of repair lines is usually not more than 2, this limits the number of open-circuited data lines that can be repaired. The extra repair line not only increases the production cost, but also is not beneficial to the design requirement of the current narrow frame.

The disclosure provides a display substrate, a repairing method thereof and a display panel. By providing repair lines around each crossing position of the data lines and the gate lines, each repair line overlaps corner positions of three adjacent pixel cells around each crossing position to form a first repair region, a second repair region, and a third repair region, respectively, and each repair line overlaps the data lines and the gate lines associated with the crossing position to form a fourth repair region and a fifth repair region, respectively. According to the embodiment of the present disclosure, the repair data line open circuit, the gate line open circuit, and the data line gate line short circuit in the display substrate can be repaired. In addition, there is no limitation on the number of repairable signal lines, and even if the number of data lines or gate lines in which a disconnection occurs is large, the signal lines can be repaired one by the embodiments of the present disclosure. This is favorable to improving the repair efficiency and the yield of the display substrate.

The following describes embodiments of a display substrate, a repairing method thereof, and a display panel provided in an embodiment of the present disclosure with reference to the drawings.

The embodiment of the disclosure provides a display substrate. As shown in fig. 2A and 2B, the display substrate includes a base substrate SUB, and a plurality of main signal lines DL and a plurality of SUB signal lines GL disposed on the base substrate SUB in parallel to each other. The main signal line DL and the sub signal line GL are insulated from each other and cross to define a plurality of pixel units. Each pixel cell comprises a main electrode PE and a sub-electrode CE insulated from each other.

In an exemplary embodiment, the primary signal line DL is a data line, the secondary signal line GL is a gate line, the primary electrode PE is a pixel electrode, and the secondary electrode CE is a common electrode.

As shown, each pixel cell also includes a thin film transistor. A source S of the thin film transistor is electrically connected to the main signal line DL, and a drain D of the thin film transistor is electrically connected to the main electrode PE.

As shown in fig. 2A-2B, the display substrate further includes a plurality of repair lines RL. Each repair line RL is arranged to surround each crossing position of the primary signal line DL and the secondary signal line GL. The orthographic projection of each repair line RL on the substrate SUB overlaps with the orthographic projection of three adjacent pixel units around the intersection position on the substrate SUB. Each repair line RL includes a first repair region R1, a second repair region R2, and a third repair region R3, respectively, at overlapping positions with three adjacent pixel cells. Each repair line RL overlaps the main signal line DL and the sub signal line GL, and a fourth repair region R4 and a fifth repair region R5 are formed at the overlapping positions, respectively.

As shown in fig. 2B, in the first repair region R1, the second repair region R2, and the third repair region R3, an orthogonal projection of each repair line RL on the substrate SUB does not overlap an orthogonal projection of the SUB-electrode CE on the substrate.

In an exemplary embodiment, each repair line RL overlaps a connection line DLs between the main signal line DL and the source electrode S of the thin film transistor, and a sixth repair region R6 is formed at the overlapping region. For example, a connection line DLs between the main signal line DL and the source S of the thin film transistor extends parallel to the sub signal line GL.

In an exemplary embodiment, each repair line is formed of metal. The repair line formed of metal has a good conductive line, which is advantageous for reducing the resistance of the data line or the gate line repaired by the repair line, preventing signal attenuation and preventing the display effect from being adversely affected. In addition, the metal repair wire is reflective and is easily positioned during the repair process to facilitate repair.

As shown in fig. 2A, each repair line RL is L-shaped as a whole. For example, a portion of each repair line RL between the first repair region R1 and the second repair region R2 extends parallel to the secondary signal line GL, and a portion of each repair line RL between the second repair region R2 and the third repair region R3 extends parallel to the primary signal line DL. It should be understood, however, that the present disclosure is not intended to limit in any way the overall shape of the repair line RL.

Fig. 2B illustrates a display substrate according to an embodiment of the present disclosure. As shown, the display substrate includes a substrate SUB. The SUB-electrode CE (i.e., common electrode), the SUB-signal line GL (i.e., gate line), and the gate electrode of the thin film transistor are disposed on the substrate SUB at the same layer. The first insulating layer IL21 covers the sub-electrode CE, the sub-signal line GL and the gate electrode. A drain electrode D of the thin film transistor, a source electrode S of the thin film transistor, a main signal line DL (i.e., a data line), and a connection line DLs for electrically connecting the main signal line DL and the source electrode S are disposed on the first insulating layer IL21 at the same layer. The second insulating layer IL22 covers the drain electrode D, the source electrode S, the main signal line DL and the connection line DLs. The main electrode PE (i.e., the pixel electrode) and the repair line RL are sequentially disposed on the second insulating layer IL22, and are insulated from each other by a third insulating layer IL 23.

In an exemplary embodiment, the first insulating layer IL21, the second insulating layer IL22, and the third insulating layer IL23 include an organic or inorganic insulating material. For example, the first insulating layer IL21 is a gate insulating layer and the third insulating layer IL23 is an interlayer insulating layer, and both include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. For example, the second insulating layer IL22 is a planarization layer, and includes an organic resin material.

Exemplary embodiments of display substrates of embodiments of the present disclosure are described above in connection with fig. 2A-2B. For example, in the above-described embodiments, the thin film transistors in the array substrate are bottom gate type thin film transistors, but top gate type thin film transistors are also feasible in the context of the present disclosure. For example, in the above-described embodiment, repair line RL is shown as being arranged over main electrode PE and insulated from main electrode PE by a via in third insulating layer IL 23. In the context of the present disclosure, the repair line RL may be arranged in any one layer in the display substrate. In general, the repair line RL is not disposed in the same layer as the gate electrode, the drain electrode (and the source electrode), and the main electrode PE (i.e., the pixel electrode) in the display substrate.

In the context of the present disclosure, the expressions "primary" and "secondary" in "primary signal line", "secondary signal line", "primary electrode", "secondary electrode" do not mean that there is a difference in the importance or ordering of these components, but merely serve to distinguish the respective components.

Hereinafter, a repairing method when a signal line failure occurs in the display substrate as described above will be described in detail with reference to the accompanying drawings.

A method of repairing a data line open (DO) in a display substrate is described with reference to fig. 3A-3B.

When a data line open circuit occurs in the display substrate of fig. 2A-2B, the repair method is as shown in fig. 3A-3B. For example, data line DL31 is open at the location shown by DO, and the method includes:

determining the open circuit position of the data line DL 31;

determining a first repair line RL31, a second repair line RL32 and a first pixel electrode PE31 for repairing the open circuit according to the open circuit position, wherein the first repair line RL31 is a repair line located at one side of the open circuit in the data line extending direction and closest to the open circuit position, the second repair line RL32 is a repair line located at the other side of the open circuit in the data line extending direction and closest to the open circuit position, and the first pixel electrode PE31 is a pixel electrode PE31 partially overlapping with both the first repair line and the second repair line; and

the data line DL31, in which the open circuit occurs, is repaired using the first repair line, the second repair line, and the first pixel electrode.

The repair method is described in detail below in conjunction with fig. 3A-3B, respectively.

In an exemplary embodiment, as shown in fig. 3A, a method for repairing a broken data line includes the steps of:

A1. determining a breaking position in the data line DL31, as shown in DO of fig. 3A, and determining a first repair line RL31 nearest to one side of the data line breaking DO and a second repair line RL32 nearest to the other side, and a pixel electrode PE31 partially overlapping both the first and second repair lines, respectively; and

A2. the first repair line RL31 is electrically connected to the data line DL31 in the fourth repair region R4 (as indicated by the solid dots at R4) and the pixel electrode PE31 in the third repair region R3, and the second repair line RL32 is electrically connected to the pixel electrode PE31 in the second repair region R2 and the data line DL31 in the fourth repair region R4.

Through the above repair method, the data line DL31, in which the disconnection occurs, is electrically connected through the portion between the fourth repair region R4 and the third repair region R3 of the first repair line RL31, the pixel electrode PE31, and the portion between the second repair region R2 and the fourth repair region R4 of the second repair line RL 32. Thereby, the data line DL31 with the open circuit is repaired.

In the above embodiments, the electrical connection between the two components is achieved by laser welding. That is, the two components are melted and electrically connected to each other at a designated area by laser light. In fig. 3A and the other figures, the locations or areas where electrical connections are made between two components during the repair process are indicated by solid dots throughout.

In an exemplary embodiment, as shown in fig. 3B, a method for repairing a broken data line includes the steps of:

B1. determining a breaking position in the data line DL31, as shown in DO of fig. 3B, and determining a first repair line RL31 nearest to one side of the data line breaking DO and a second repair line RL32 nearest to the other side, and a pixel electrode PE31 partially overlapping both the first and second repair lines, respectively; and

B2. the first repair line RL31 is electrically connected to the data line DL31 in the fourth repair region R4 and the pixel electrode PE31 in the third repair region R3, and the second repair line RL32 is electrically connected to the pixel electrode PE31 in the second repair region R2 and the connection line DLs31 between the sixth repair region R6 and the data line DL31 and the source electrode S31 of the thin film transistor.

In this embodiment, step B1 is the same as step a1 described above.

Through the above repair method, the data line DL31, in which the disconnection occurs, is electrically connected through the portion between the fourth repair region R4 and the third repair region R3 of the first repair line RL31, the pixel electrode PE31, the portion between the second repair region R2 and the sixth repair region R6 of the second repair line RL32, and the connection line DLs 31. Thereby, the data line DL31 with the open circuit is repaired.

A method of repairing a Gate Open (GO) in a display substrate is described with reference to fig. 4A, 4B, and 4C.

When a gate line open occurs in the display substrate of fig. 2A-2B, the repair method is as shown in fig. 4A-4C. For example, the gate line GL41 is open at the location indicated at GO, and the method includes:

determining the open position GL41 of the grid line;

determining a first repair line RL41, a second repair line RL42, a first pixel electrode PE41 and a first connection line DLS41 for repairing the open circuit according to the open circuit position, wherein the first repair line RL41 is a repair line located at one side of the open circuit in the gate line extending direction and closest to the open circuit position, the second repair line RL42 is a repair line located at the other side of the open circuit in the gate line extending direction and closest to the open circuit position, the first pixel electrode PE41 is a pixel electrode partially overlapping with both the first repair line and the second repair line, and the first connection line DLS41 is a connection line between the data line DL and a source electrode S41 of a thin film transistor located between the first repair line RL41 and the second repair line RL 42; and

and repairing the gate line GL41 which is open-circuited by using the first repair line, the second repair line, the first pixel electrode and the first connection line.

The repair method is described in detail below in conjunction with fig. 4A-4C, respectively.

In an exemplary embodiment, as shown in fig. 4A, a method for repairing a broken gate line includes the steps of:

C1. determining a breaking location in the gate line GL41, as shown at GO in fig. 4A, and determining a nearest neighboring connecting line DLS41 extending across the breaking location, a first repair line RL41 partially overlapping the connecting line DLS41, and a data line DL41 partially overlapping the first repair line RL 41; and

C2. at a position between the sixth repair region R6 of the first repair line RL41 and the data line DL41 connected to the first connection line DLS41, the first connection line DLS41 is cut, the connection line PED41 between the drain electrode D41 of the thin film transistor and the pixel electrode PE41 between the first repair line RL41 and the second repair line RL42 is cut, the first repair line RL41 is electrically connected to the gate line GL41 at the fifth repair region R5 and the first connection line DLS41 at the sixth repair region R6, and the source electrode S41 to which the first connection line DLS41 is connected is electrically connected to the gate line GL 41.

Through the above repair method, the gate line GL41, on which the open circuit has occurred, is electrically connected through a portion between the fifth repair region R5 and the sixth repair region R6 of the first repair line RL41, the connection line DLS41, and the source electrode S41 of the thin film transistor. Thereby, the gate line GL41 with the open circuit is repaired.

In the above embodiments, the cutting of a certain component is achieved by laser welding. That is, the part is melted and electrically disconnected at a designated area by the laser.

In an exemplary embodiment, as shown in fig. 4B, a method for repairing a gate line open circuit includes the steps of:

D1. determining a breaking location in the gate line GL41, as shown at GO in fig. 4B, and determining a nearest neighboring connecting line DLS41 extending across the breaking location, a first repair line RL41 partially overlapping the connecting line DLS41, and a data line DL41 partially overlapping the first repair line RL 41; and

D2. the first connection line DLS41 is cut, the first repair line RL41 is electrically connected to the gate line GL41 in the fifth repair region R5 and the pixel electrode PE41 in the second repair region R2, and the drain electrode D41 of the thin film transistor between the first repair line RL41 and the second repair line RL42 is electrically connected to the gate line GL 41.

In this embodiment, step D1 is the same as step C1 described above.

Through the above repair method, the gate line GL41, on which the open circuit has occurred, is electrically connected through a portion between the fifth repair region R5 and the second repair region R2 of the first repair line RL41, the pixel electrode PE41, and the drain electrode D41 of the thin film transistor. Thereby, the gate line GL41 with the open circuit is repaired.

In the above-described embodiment shown in fig. 4A and 4B, the gate line GL41 is disconnected at a position near the center corresponding to a certain side of the pixel unit. In the embodiment described below in conjunction with fig. 4C, the gate line GL41 is open at a position corresponding to a corner of the pixel cell.

In an exemplary embodiment, as shown in fig. 4C, a method for repairing a gate line open circuit includes the steps of:

E1. determining a broken location in the gate line GL41, as shown by GO of fig. 4C (e.g., near the intersection of the gate and data lines), and determining a nearest neighbor connection line DLS41 extending across the broken location, a first repair line RL41 partially overlapping the connection line DLS41, a nearest neighbor second repair line RL42 on a side of the broken location away from the first repair line RL41, and a pixel electrode PE41 partially overlapping both the first repair line RL41 and the second repair line RL42, and

E2. the connection line DLS41 is cut, the first repair line RL41 is electrically connected to the gate line GL41 in the fifth repair region R5 and the pixel electrode PE41 in the second repair region R2, and the second repair line RL42 is electrically connected to the pixel electrode PE41 in the first repair region R1 and the gate line GL41 in the fifth repair region R5.

Through the above repair method, the gate line GL41, on which the open circuit has occurred, is electrically connected through a portion between the fifth repair region R5 and the sixth repair region R2 of the first repair line RL41, and a portion between the pixel electrode PE41 and the first repair region R1 and the fifth repair region R5 of the second repair line RL 42. Thereby, the gate line GL41 with the open circuit is repaired.

A method of repairing the data line gate line short DGS in the display substrate is described with reference to fig. 5A, 5B and 5C.

When a data line grid short occurs in the display substrate of fig. 2A-2B, the repair method is as shown in fig. 5A-5C. For example, the data line DL51 and the gate line GL51 are short-circuited at a position shown by DGS. The associated data line and gate line, such as the data line DL51 and gate line GL51 shown in fig. 5A-5C, are determined according to the data line and gate line short circuit position. The data line short DGS is converted into a data line open circuit by cutting off the data line DL51, such as DO51 and DO52 shown in fig. 5A and 5B, and is repaired using the method of repairing the data line open circuit described in fig. 3A-3B. Alternatively, the data line gate short DGS is converted to a gate line open by cutting off the gate lines GL51, such as GO51 and GO52 shown in fig. 5C, and repaired using the method of repairing the gate line open described in fig. 4A-4C. The repair method is described in detail below in conjunction with fig. 5A-5C, respectively.

In an exemplary embodiment, as shown in fig. 5A, a method for repairing a short circuit of a gate line of a data line includes the steps of:

F1. determining the position of the data wire grid line short circuit DGS and the associated data wire DL51 and grid wire GL 51;

F2. at the position of the data line and the grid line short circuit DGS, the data line DL51 is cut off closely to two sides of the grid line GL51 to form a first data line open circuit DO51 and a second data line open circuit DO 52;

F3. determining a first repair line RL51 nearest to the data line short DGS, a second repair line RL52 nearest to the second data line open DO52 on the side away from the first repair line RL51, and a first pixel electrode PE51 partially overlapping both the first repair line RL51 and the second repair line RL 52; and

F4. the first repair line RL51 is electrically connected to the data line DL51 in the fourth repair region R4 and the first pixel electrode PE51 in the third repair region R3, and the second repair line RL51 is electrically connected to the first pixel electrode PE51 in the second repair region R2 and the data line DL51 in the fourth repair region R4.

In this embodiment, step F4 is similar to step a2 described above.

By the above repair method, the data line gate line short DGS between the data line DL51 and the gate line GL51 is converted into the first data line open circuit DO51 and the second data line open circuit DO52 of the data line DL51 on both sides of the data line gate line short DGS. The data line DL51 in which the open circuit occurs is electrically connected through a portion between the fourth repair region R4 and the third repair region R3 of the first repair line RL51, the first pixel electrode PE51, and a portion between the second repair region R2 and the fourth repair region R4 of the second repair line RL 52. Thereby, the data line DL51 with the open circuit is repaired, and the data line and gate line short circuit DGS between the data line DL51 and the gate line GL51 is repaired.

In an exemplary embodiment, as shown in fig. 5B, a method for repairing a short circuit of a gate line of a data line includes the steps of:

G1. determining the position of the data wire grid line short circuit DGS and the associated data wire DL51 and grid wire GL 51;

G2. at the position of the data line and the grid line short circuit DGS, the data line DL51 is cut off closely to two sides of the grid line GL51 to form a first data line open circuit DO51 and a second data line open circuit DO 52;

G3. determining a first repair line RL51 nearest to the data line gate short DGS and a first connection line DLS51 between the data line partially overlapping the first repair line RL51 and the source S51; and

G4. the first repair line RL51 is electrically connected to the data line DL51 in the fourth repair region R4 and to the first connection line DLs51 in the sixth repair region R6.

In the present embodiment, steps G1-G2 are the same as steps F1-F2 described above.

By the above repair method, the data line gate line short DGS between the data line DL51 and the gate line GL51 is converted into the first data line open circuit DO51 and the second data line open circuit DO52 of the data line DL51 on both sides of the data line gate line short DGS. The data line DL51, in which the disconnection occurs, is electrically connected through a first connection line DLs51 between the portion of the first repair line RL51 between the fourth repair region R4 and the sixth repair region R6 and between the data line DL51 and the source electrode S51 of the thin film transistor. Thereby, the data line DL51 with the open circuit is repaired, and the data line and gate line short circuit DGS between the data line DL51 and the gate line GL51 is repaired.

In an exemplary embodiment, as shown in fig. 5C, a method of repairing a data line gate line short circuit includes the steps of:

H1. determining the position of the data wire grid line short circuit DGS and the associated data wire DL51 and grid wire GL 51;

H2. at the position of the data line and the grid line short circuit DGS, the grid line GL51 is tightly attached to two sides of the data line DL51 to be cut off so as to form a first grid line open circuit GO51 and a second grid line open circuit GO 52;

H3. determining a nearest neighbor first repair line RL51 located at one side of the data wire grid line short DGS in an extending direction of the gate line GL51, a nearest neighbor third repair line RL53 at the other side, a second pixel electrode PE52 partially overlapping both the first repair line RL51 and the third repair line RL53, and a second connection line DLS52 partially overlapping the third repair line RL 53; and

H4. the second connection line DLS52 is cut, the third repair line RL53 is electrically connected to the gate line GL51 in the fifth repair region R5 and the second pixel electrode PE52 in the second repair region R2, and the first repair line RL51 is electrically connected to the second pixel electrode PE52 in the first repair region R1 and the gate line GL51 in the fifth repair region R5.

In this embodiment, step H4 is similar to step E2 described above.

Through the above repair method, the data line gate line short DGS between the data line DL51 and the gate line GL51 is converted into the first gate line open GO51 and the second gate line open GO52 of the gate line GL51 at both sides of the data line gate line short DGS. The gate line GL51, on which the open circuit has occurred, is electrically connected through a portion between the fifth repair region R5 and the second repair region R2 of the third repair line RL53, the second pixel electrode PE52, and a portion between the first repair region R1 and the fifth repair region R5 of the first repair line RL 51. Thereby, the gate line GL51 with the open circuit is repaired, and the data line gate line short circuit DGS between the data line DL51 and the gate line GL51 is repaired.

The embodiment of the disclosure discloses a display substrate, a repairing method thereof and a display panel. The display substrate includes a substrate, and a plurality of main signal lines and a plurality of sub signal lines arranged on the substrate in parallel with each other, wherein the main signal lines and the sub signal lines are insulated from each other and cross to define a plurality of pixel units, each pixel unit including a main electrode and a sub electrode insulated from each other. The display substrate further includes a plurality of repair lines. Each repair line is arranged to surround each crossing position of a primary signal line and a secondary signal line, an orthographic projection of each repair line on the substrate and orthographic projections of three adjacent pixel units around the crossing position on the substrate overlap with each other, each repair line includes a first repair region, a second repair region, and a third repair region at overlapping positions with the three adjacent pixel units, respectively, and each repair line overlaps the primary signal line and the secondary signal line to form a fourth repair region and a fifth repair region, respectively. In the first repair area, the second repair area and the third repair area, an orthographic projection of the repair line on the substrate base plate is not overlapped with an orthographic projection of the secondary electrode on the substrate base plate. The scheme of the embodiment of the disclosure can repair the broken circuit of the data wire, the broken circuit of the grid wire and the short circuit of the data wire grid wire. In addition, the scheme of the embodiment of the disclosure has no limitation on the number of repairable signal lines, and even if the number of data lines or gate lines with open circuits or the number of short circuits of the data lines is large, the data lines or the gate lines can be repaired one by one through the scheme of the embodiment of the disclosure. This is favorable to improving the repair efficiency and the yield of display substrate and display panel.

The above description is only for the specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto, and any changes or substitutions that can be easily conceived by a person having ordinary skill in the art within the technical scope of the present disclosure should be covered within the scope of the present disclosure. Therefore, the protection scope of the present disclosure should be subject to the protection scope of the claims.

Claims

1. A display substrate includes a substrate, and a plurality of main signal lines and a plurality of sub signal lines arranged on the substrate in parallel with each other, wherein the main signal lines and the sub signal lines are insulated from each other and cross to define a plurality of pixel units, each pixel unit includes a main electrode and a sub electrode insulated from each other,

2. The display substrate according to claim 1, wherein each pixel unit further comprises a thin film transistor, a source of the thin film transistor is electrically connected to the main signal line, a drain of the thin film transistor is electrically connected to the main electrode, and each repair line overlaps a connection line between the main signal line and the source to form a sixth repair region.

3. The display substrate according to claim 2, wherein a connection line between the primary signal line and the source electrode extends parallel to the secondary signal line.

4. The display substrate according to claim 1, wherein the primary signal line is a data line, the secondary signal line is a gate line, the primary electrode is a pixel electrode, and the secondary electrode is a common electrode.

5. The display substrate of claim 1, wherein each repair line is formed of metal.

6. The display substrate of claim 1, wherein each repair line is L-shaped, a portion of each repair line between the first repair region and the second repair region extends parallel to the secondary signal line, and a portion of each repair line between the second repair region and the third repair region extends parallel to the primary signal line.

7. A display panel comprising the display substrate according to any one of claims 1 to 6.

8. A method for repairing a main signal line disconnection in a display substrate according to any one of claims 2 to 6, comprising the steps of:

determining the open circuit position of the main signal wire;

9. The method of claim 8, wherein repairing the disconnected primary signal line using the first repair line, the second repair line, and the first primary electrode comprises:

10. The method of claim 8, wherein repairing the disconnected primary signal line using the first repair line, the second repair line, and the first primary electrode comprises:

11. A method for repairing a secondary signal line open in a display substrate according to any one of claims 2 to 6, comprising the steps of:

determining the open circuit position of the secondary signal line;

12. The method of claim 11, wherein the repairing the broken sub signal line using the first repair line, the second repair line, the first main electrode, and the first connection line comprises:

the first connection line is cut at a position between a sixth repair region of the first repair line and a primary signal line connected to the first connection line, a connection line between a drain of a thin film transistor located between the first repair line and the second repair line and the first primary electrode is cut, the first repair line is electrically connected to the secondary signal line at a fifth repair region and electrically connected to the first connection line at a sixth repair region, and a source to which the first connection line is connected is electrically connected to the secondary signal line.

13. The method of claim 11, wherein the repairing the broken sub signal line using the first repair line, the second repair line, the first main electrode, and the first connection line comprises:

14. The method of claim 11, wherein the repairing the broken sub signal line using the first repair line, the second repair line, the first main electrode, and the first connection line comprises:

15. A method for repairing a short circuit of a primary signal line and a secondary signal line in a display substrate according to any one of claims 1 to 6, comprising the steps of:

16. A method for repairing a short circuit of a primary signal line and a secondary signal line in a display substrate according to any one of claims 2 to 6, comprising the steps of:

17. A method for repairing a short circuit of a primary signal line and a secondary signal line in a display substrate according to any one of claims 2 to 6, comprising the steps of:

18. The method of claim 17, wherein the electrically connecting and disconnecting are performed by laser welding.