CN108701673B - Variable solder ball height via solder paste transfer on ball grid array package - Google Patents

Variable solder ball height via solder paste transfer on ball grid array package Download PDF

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CN108701673B
CN108701673B CN201780013901.6A CN201780013901A CN108701673B CN 108701673 B CN108701673 B CN 108701673B CN 201780013901 A CN201780013901 A CN 201780013901A CN 108701673 B CN108701673 B CN 108701673B
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solder
package
mold
solder paste
height
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CN108701673A (en
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E·J·李
姚计敏
S·M·利夫
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Intel Corp
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Intel Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867—Applying pastes or inks, e.g. screen printing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/11001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
    • H01L2224/11003—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for holding or transferring the bump preform
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/1401—Structure
    • H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H01L2224/141—Disposition
    • H01L2224/1412—Layout
    • H01L2224/1413—Square or rectangular array
    • H01L2224/14132—Square or rectangular array being non uniform, i.e. having a non uniform pitch across the array
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0133—Ternary Alloys

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Geometry (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

Described herein are BGA packages having spatially varying solder ball heights, and techniques for forming such packages. A stencil or mold having cavities may be pre-fabricated to hold solder paste material applied to the mold, for example, using a solder paste printing process. The depth and/or diameter of the cavity may be predetermined according to the spatial location within the working surface area of the die. The mold cavity dimensions may be specified to correspond to package locations to account for one or more pre-existing or anticipated spatial variations in the package, such as a warpage metric at the package level. Any number of different solder ball heights may be provided. The mold may be employed in a standardized process that does not require modification with each change of the mold.

Description

Variable solder ball height via solder paste transfer on ball grid array package
Cross Reference to Related Applications
The present application claims priority to U.S. patent application No.15/083,089, entitled "variant BALL valve heat ON BALL GRID ARRAY PACKAGES BY laser PASTE TRANSFER," filed ON 28.3.2016, which is incorporated herein BY reference in its entirety.
Technical Field
The invention relates to variable solder ball height by solder paste transfer on a ball grid array package.
Background
A Ball Grid Array (BGA) package is a package for an Integrated Circuit (IC), such as a microprocessor or an array of memory cells. BGA packages are permanently mounted to a board or other package with solder balls disposed over the entire surface area of one or more sides of the package in a grid layout. Although BGA technology is common for achieving high connection density, high thermal conductivity, and short, low inductance connections, various problems limit the benefits of surface mounting.
One problem is package warpage, where the package becomes strained and one or more connections are left open. While variable ball height (volume) may be able to compensate for package warpage, e.g., higher (larger) solder balls at package edges and shorter (smaller) solder balls near package center, changing solder ball size within a package is a costly solution for standard solder ball pick and place techniques that rely on all solder balls having the same nominal size. Multiple rounds of processing may be employed, for example, where smaller solder balls are placed first, followed by larger solder balls. However, even if only a few different solder ball sizes are used, the multiple pass process is not only costly, but also minimal with respect to yield, as solder balls placed in a previous pass may be displaced in a subsequent pass.
Another problem is the need to avoid applying flux or solder paste in the area of the capture pad side components (LSCs) of the package, which are used to hold the solder balls in place during pick and place operations. LSCs such as capacitors and the like are typically accommodated by providing pockets in a screen employed during the flux or solder paste printing process. The presence of these pockets can limit the minimum pitch between the BGA solder balls and the LSCs, and requires scaling this pitch down as the package form factor continues to shrink.
Disclosure of Invention
According to a first aspect of the present invention, there is provided a Ball Grid Array (BGA) package comprising: one or more integrated circuit chips disposed within the package; a plurality of solder features disposed over a side of the package, wherein the solder features include a first solder feature having a first height and a second solder feature having a second height, the second height exceeding the first height by more than 10% of the first height, and wherein the first and second solder features have an aperture that occupies at least 5% of a solder area; a plurality of pad side components disposed over the side of the package, wherein the plurality of pad side components are disposed within an interior portion of the pad side of the package and are surrounded by a periphery having a first solder feature that does not exceed the first height, and the first solder feature is further surrounded by a periphery of a second solder feature of at least the second height.
According to a second aspect of the present invention, there is provided a method of assembling a Ball Grid Array (BGA) package, the method comprising: applying solder paste to the mold; bonding the mold to a package; transferring the solder paste from the mold to the package; and separating the mold from the package, wherein the mold includes a first cavity having a first lateral dimension that is less than a lateral dimension of a Solder Resist Opening (SRO) disposed on the package around a first ball grid array pad for receiving solder paste transferred from the first cavity, and wherein the mold includes a second cavity having a depth that is greater than a depth of the first cavity; and the solder paste transferred from the first cavity to the first ball-grid array pad has a first height that is less than a height of the solder paste transferred from the second cavity to the second ball-grid array pad after separating the package from the mold.
According to a third aspect of the present invention, there is provided a solder paste mold comprising: a grid array of first cavities having a pitch of no more than 600 μm, the grid array of first cavities aligned with ball grid array pads disposed on a package, wherein the first cavities include cavities of a first depth and cavities of a second depth, the second depth being greater than the first depth; and a second cavity aligned with a pad-side component disposed on a package substrate, wherein at least the first cavity includes a surface that is non-wettable by solder.
Drawings
In the drawings, the materials described herein are illustrated by way of example and not by way of limitation. For simplicity and clarity of illustration, elements illustrated in the figures have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Further, where considered appropriate, reference numerals have been repeated among the figures to indicate corresponding or analogous elements. In the drawings:
fig. 1A illustrates a cross-sectional view of a BGA package 101 including solder balls of different heights, in accordance with some embodiments;
fig. 1B illustrates a plan view of BGA package 102 including solder balls of different heights in accordance with some embodiments;
FIG. 2 is a flow diagram of a solder paste molding process for a BGA package, according to some embodiments;
fig. 3 illustrates a cross-sectional view of a solder paste die according to some embodiments;
fig. 4, 5, 6 illustrate cross-sectional views of a loaded solder paste die according to some embodiments;
7A, 7B illustrate cross-sectional views of a loaded solder paste die engaged with a package substrate, in accordance with some embodiments;
8A, 8B illustrate cross-sectional views of transferring solder paste from a solder paste die to a package substrate, in accordance with some embodiments;
9A, 9B illustrate cross-sectional views of a loaded package substrate separated from an empty solder paste die, in accordance with an embodiment;
fig. 10 illustrates a cross-sectional view of a package substrate loaded with a solder mold prior to final reflow in accordance with some alternative embodiments;
FIG. 11 illustrates a BGA package after a final reflow in accordance with some alternative embodiments;
FIG. 12 illustrates a mobile computing platform and data server machine employing a BGA package microprocessor and/or memory with different solder connection heights, in accordance with an embodiment; and
FIG. 13 is a functional block diagram of an electronic computing device according to some embodiments.
Detailed Description
One or more embodiments are described with reference to the drawings. While specific configurations and arrangements are shown and discussed in detail, it should be understood that this is done for illustrative purposes only. A person skilled in the relevant art will recognize that other configurations and arrangements are possible without departing from the spirit and scope of the description. It will be apparent to those skilled in the relevant art that the techniques and/or arrangements described herein may be employed in a variety of other systems and applications other than those detailed herein.
In the following detailed description, reference is made to the accompanying drawings, which form a part hereof and illustrate exemplary embodiments. Moreover, it is to be understood that other embodiments may be utilized and structural and/or logical changes may be made without departing from the scope of the claimed subject matter. It should also be noted that directions and references, such as up, down, top, bottom, etc., may be used merely to facilitate the description of the features in the figures. The following detailed description is, therefore, not to be taken in a limiting sense, and the scope of the claimed subject matter is defined only by the appended claims and equivalents thereof.
In the following description, numerous details are set forth. It will be apparent, however, to one skilled in the art that the embodiments may be practiced without these specific details. In some instances, well-known methods and apparatus are shown in block diagram form, rather than in detail, in order to avoid obscuring the embodiments. Reference throughout this specification to "an embodiment" or "one embodiment" or "some embodiments" means that a particular feature, structure, function, or characteristic described in connection with the embodiments is included in at least one embodiment. Thus, the appearances of the phrase "in an embodiment" or "in one embodiment" or "some embodiments" in various places throughout this specification are not necessarily referring to the same embodiment of the invention. Furthermore, the particular features, structures, functions, or characteristics may be combined in any suitable manner in one or more embodiments. For example, a first embodiment may be combined with a second embodiment as long as the particular features, structures, functions, or characteristics associated with the two embodiments are not mutually exclusive.
As used in the specification and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
The terms "coupled" and "connected," along with their derivatives, may be used herein to describe functional or structural relationships between components. It should be understood that these terms are not intended as synonyms for each other. Rather, in particular embodiments, "connected" may be used to indicate that two or more elements are in direct physical, optical, or electrical contact with each other. "coupled" may be used to indicate that two or more elements are in direct or indirect (with other intervening elements between them) physical or electrical contact with each other and/or that two or more elements co-operate or interact with each other (e.g., as in a cause and effect relationship).
The terms "over," "under," "between," and "on" as used herein refer to the relative position of one element or material with respect to another element or material, where such a physical relationship is required. For example, in a material environment, one material disposed above or below another material may be in direct contact or may have one or more intervening materials. Further, one material disposed between two materials may be in direct contact with the two layers or may have one or more intervening layers. Instead, the first material "on" the second material is in direct contact with the second material/material. Similar distinctions are made in the context of component assemblies.
As used throughout this specification and claims, a list of items joined by the term "at least one" or "one or more" may represent any combination of the listed items. For example, the phrase "A, B or at least one of C" may represent a; b; c; a and B; a and C; b and C or A, B and C.
Described herein are packages having spatially varying solder ball heights, and molds and techniques for forming such packages. In some embodiments, a stencil or mold having a cavity is preformed to hold the solder paste material applied to the mold, for example, using a solder paste printing process. The depth and/or diameter of the cavity may be predetermined according to the spatial position within the working surface area of the mould. The mold cavity dimensions may be specified to correspond to spatial locations within the package region to account for one or more pre-existing or anticipated spatial variations in the package, such as package-level warpage metrics, for example, to improve SMT revenue. Cavities with greater depths, resulting in greater height features, can be positioned within the mold corresponding to locations where the package flexes most from the ideal plane. Any number of different solder ball heights may be provided, and indeed, each solder ball may have a unique height, if desired, depending on the embodiment. Further, since the solder paste is applied to the mold, there is no need to perform a printing process of flux or solder paste directly on the package. Therefore, the size of the dedicated area associated with the pad-side components present on the package can be significantly reduced. Embodiments herein also advantageously provide low die cost and lead time during process development. In solder ball pick and place technology, for example, a complete mold set must be designed and built for each new test carrier or product, resulting in high cost and often lead time. Changes during process development may further authorize the second set of tools. For embodiments herein, the mold can be easily manufactured at low cost and/or lead time. The mold is then employed in a standardized solder paste transfer process that does not require modification with each change of the mold.
Fig. 1A illustrates a cross-sectional view of a BGA package 101 including solder balls of different heights in accordance with some embodiments. Fig. 1B illustrates a plan view of BGA package 102 including solder balls of different heights in accordance with some embodiments. Referring first to fig. 1A, an Integrated Circuit (IC) chip 105 is attached on a chip side of a package 102, e.g., to a package substrate 110. The package substrate 110 has a land side opposite the chip side and also includes BGA pads 336 exposed within openings in solder resist 755. The package substrate 110 may be any substrate known to be suitable for flip chip packaging (FCBGA), package on package (PoP), package level System (SiP), embedded wafer level solder balls (eWLB), Wafer Level Chip Scale Package (WLCSP), and the like. In some embodiments, the substrate 110 is compatible with Surface Mount Technology (SMT). In some embodiments, substrate 110 comprises a laminate of circuitry metalized embedded within a dielectric build-up layer. In some alternative embodiments, the substrate 110 comprises plastic or ceramic. IC chip 105 may include one or more ICs such as, but not limited to, a microprocessor, memory, system on chip (SoC), radio frequency IC (rfic), Field Programmable Gate Array (FPGA), or power management IC (pmic). BGA pad 336 may include a surface of any conductive material that may be wetted by solder. In some embodiments, BGA pad 336 includes a surface finish that can be wetted by solder, such as NiPdAu or a copper organic solderability preservative (Cu OSP). Solder resist 755 can be any material known to be suitable for constraining solder. The solder resist 755 can be any material that is not wettable by solder. In some embodiments, the solder resist 755 comprises a polymer. In some embodiments, the polymer is an epoxy resin, such as, but not limited to, an acrylate of phenolic aldehyde.
As further shown in fig. 1A, BGA package 101 includes a plurality of solder features 130 disposed over the BGA pad side. In some advantageous embodiments, the solder features 130 are solder spheres having a spherical form representing a free surface solder reflow. Solder features 130 may be any solder composition known to be suitable for BGA packages. In some embodiments, the solder characteristics 130 include a metal. In some exemplary embodiments, the solder features 130 are Sn-Ag-Cu (SAC) alloys, such as, but not limited to, SAC 305 or SAC 405.
In some embodiments, solder features 130 include a first solder feature having a first feature height H1 and a second solder feature having a second feature height H2 that is substantially different (e.g., more than 10% different) from height H1. In some advantageous embodiments, feature height H2 exceeds height H1 by more than 10% of H1. For example, in some embodiments, H1 is approximately 240 μm, and H2 exceeds 260 μm. In some further embodiments, height H2 exceeds height H1 by more than 25% of H1. For example, in some embodiments, H1 is approximately 240 μm and H2 exceeds 300 μm. Although some variation in height of solder features fabricated from solder balls picked and placed onto a package substrate can be expected, manufacturing tolerances make it possible to control solder ball diameter variations well below 10%, in practice the pick and place operation typically cannot accommodate more than 10% solder ball variations without incurring significant process marginalities and concomitant yield reductions. Thus, variations in solder feature height greater than 10% represent BGA technology beyond a single round of pick and place.
In some embodiments, multiple solder features on a package substrate are associated with multiple sets of solder feature heights, the sets each having a different nominal height. For example, a first subset of solder features may be associated with a nominal first height, e.g., H1, while a second subset of solder features may be associated with a nominal second height, e.g., H2. It is expected that each of the subsets of solder features will have some height distribution relative to its target, e.g., H1+/- σ 1 and H2+/- σ 2, with the two populations being significantly different from each other. In some further embodiments, there are more than two nominal solder feature heights. Any number of different nominal solder feature heights are possible, ranging from a minimum of two heights to as many height distributions as solder features.
In some embodiments, the solder feature height varies spatially in a non-random manner over the package substrate area. Although the solder feature height variation caused only by process variations tends to be independent of location within the package substrate area, the solder feature height according to some embodiments may vary according to a predetermined spatial distribution function. In some embodiments, solder features of greater feature heights are disposed closer to (near) the peripheral edge of the package than those of lesser heights. For example, as shown in fig. 1A, solder feature 130 having height H2 is disposed closest to the peripheral edge, while solder feature 130 having height H1 is disposed closest to pad-side component 120 disposed at the center of package substrate 110 (lateral distance S1).
In further embodiments, there are more than two solder feature heights, and the heights may increase monotonically as a function of increasing distance from the center of the package substrate. For example, the plan view of fig. 1B further illustrates a BGA package 102 with a solder feature arrangement adapted to accommodate package warpage, wherein corners of the package substrate 110 are flexed from a constant height plane (e.g., z-dimension). In fig. 1B, solder features 130A, 130B, and 130C are associated with three different solder feature heights. Solder feature 130B, which is disposed closer to the substrate peripheral edge than solder feature 130A, has a second feature height that is at least 10% greater than solder feature 130A. A third solder feature 130C disposed closer to the substrate peripheral edge than solder feature 130B has a third feature height that is at least 10% greater than solder feature 130B. In the illustrated example, the pad-side components 120 are disposed within an interior region of the package substrate 110, surrounded by a periphery of the solder feature 130A, e.g., having a minimum nominal height. Solder feature 130A is further surrounded by the periphery of solder features 130B and/or 130C having a greater nominal height. Such a monotonically increasing solder feature height may be advantageous where package warpage causes the peripheral portion of the package substrate 110 to flex more from the reference z-height than the central portion of the package substrate 110. Of course, the solder feature height may be spatially varied to account for issues other than package substrate warpage, e.g., to account for predetermined non-planarity associated with a circuit board to be mounted to the package substrate.
The solder feature diameter, as well as the feature pitch, may vary as a matter of package design and may further respect the spatial grid array of BGA pads on package substrate 110. The grid spacing of the solder features 130 may vary. Exemplary grid pitches for a given BGA pad array pitch include: about 600 μm (e.g., 635 μm), about 500 μm, about 400 μm (e.g., 406 μm), about 300 μm (e.g., 305 μm), and about 150 μm. The lateral solder feature widths L1 and L2 may be a function of the pad 336 pitch, which may have, for example, a lateral width of about 60% of the pad pitch (e.g., 381 μm for a 635 μm pitch, and about 203 μm for a 305 μm pitch). In some further embodiments, the solder feature height varies independently of the solder resist opening diameter. For example, the solder features 130 may be disposed within openings having one or more diameters L3 and/or L4 in the solder resist 775, which may also be a function of the pitch and/or lateral width of the pads 336. The difference between solder feature heights H1 or H2 may be independent of solder resist opening diameters L3 and L4. For example, solder features having a greater height may be provided within a smaller diameter solder opening.
In some embodiments, the solder features 130 have voids 135 that comprise at least 5% of the solder area. The aperture 135 may be present at the interface of the pad 336 or may be located in the bulk of the solder feature 130. In some embodiments, the solder features 130 have voids 135 in the solder bulk that occupy at least 5% of the solder area, where the void area may be larger at the interface with the pads 336. In some embodiments, the solder features 130 have voids 135 that comprise at least 15% of the solder area. The presence of apertures 135, particularly those within the solder feature volume, is indicative of a solder paste process. The voids are typically the result of Volatile Organic Compounds (VOCs) within the solder paste and are formed when the solder paste reflows into the solder features 130. The void area is typically targeted to well characterized quality control parameters based on solder paste BGA process monitoring. The voids do not represent a solder ball pick and place process because the solder balls that are picked and placed onto the package substrate are typically pure metallic, without any significant VOC content. Thus, a void area of more than 5%, especially more than 15%, represents a solder paste based BGA process.
Fig. 2 is a flow diagram of a solder paste molding method for a BGA package according to some embodiments. The method 201 begins with receiving a solder paste mold at operation 210. The solder paste die is to act as a stencil that defines both the spatial location of the solder paste and the volume of solder paste to be transferred at a particular spatial location. The spatial location and volume of the solder paste is defined by the location and size of the cavities or recesses formed in the working surface of the die. The working surface of the die is to be machined (e.g., by a laser) to include a cavity of a predetermined designated volume so that when the cavity is completely filled by the meterless solder paste screen printing operation 220, the die can then be attached to the package substrate at operation 230 and a metered amount of solder paste is transferred to a specific location of the package during the reflow operation 240. Thus, the mold cavities are positioned relative to the pads on the package. Thus, the cavities are spatially mapped to a predetermined BGA grid array layout. In operation 250, the mold is separated from the package substrate. The transferred solder paste may then be reflowed again, if necessary, in operation 260 to allow the solder paste features to flow into the ball-shaped solder features due to free surface energy. Because the amount of solder paste transferred from the mold to the substrate can be customized for each BGA pad location, the final solder feature size (e.g., height) can vary widely across the entire area of the package substrate, e.g., larger features that allow for the greatest amount of package warpage to occur.
Fig. 3 illustrates a cross-sectional view of a solder paste die 305 according to some embodiments. Fig. 4 shows a cross-sectional view of the solder paste die 305 after applying the solder paste print screen 440 to the work surface. The solder paste die 305 may be a single material or a composite including a material that is not wettable by solder. Advantageously, the Coefficient of Thermal Expansion (CTE) of the solder paste die 305 matches well with the effective CTE of the package substrate with which it is to be mated. Exemplary single materials include Liquid Crystal Polymers (LCP) and graphite. Examples of composite materials include stainless steel blocks with a suitable coating, such as an organic polymer or graphite coating, disposed on at least the working surface. In order to make a prototype quickly, a mold preform material or a 3D printing mold may be used. Notably, a single mold can accommodate the concurrent processing of many packages simultaneously. Thus, only a portion of the mold 305 corresponding to a single package is shown in fig. 3. However, the mold 305 may be sized to accommodate many such packages, for example, to match a certain number of packages (e.g., strips) on a given carrier medium.
The solder paste die 305 has a working surface that includes a plurality of cavities of the type to receive solder paste. In an exemplary embodiment, at least one of the lateral width or diameter (e.g., x-dimension) and the depth (e.g., z-dimension) varies among the plurality of cavities. For the illustrated example, the first cavity 310 has a first lateral width and depth and the second cavity 315 has a second lateral width and depth. At least the depth of cavity 315 is greater than cavity 310 to provide a greater height for the solder features. The actual depth of the mold cavity required to ensure a predetermined solder feature height may vary depending on package warpage at a given location. In some exemplary embodiments, the depth of cavity 315 is greater than cavity 310 by at least 10% of the depth of cavity 310. In some advantageous embodiments, the depth of cavity 315 is greater than cavity 310 by at least 25% of the depth of cavity 310. Although the spatial relationship of cavities 310 through 315 may vary, in the illustrated embodiment, deeper cavities 315 are disposed closer to or closer to the area of the mold corresponding to the BGA sites on the peripheral edge of the package substrate that mold 305 is to mate with. The shallower cavity 310 is closer to the area of the mold that is to be mapped to the center BGA location of the package substrate. Such spatial relationships indicate the use of package warpage based on solder feature size.
In addition to changing the cavity dimensions based on the warp estimate, the nominal mold cavity dimensions may be based on other factors such as BGA pitch, solder resist opening size, solder resist thickness, screen plate thickness, and metal loading of the solder paste. For example, the solder volume V may be estimated as:
Figure GDA0003651473040000101
where d is the estimated solder ball diameter. Solder balls of this diameter may be provided from the solder paste mass defined by the mold cavity of diameter a and depth b for the screen plate thickness c and the metal loading L of the solder paste, as shown in fig. 4. For solder volume V, then:
Figure GDA0003651473040000102
in an exemplary embodiment, L is 50%, c is 0, and d is 60% of the pitch, the saved solder volume F results in an estimated cavity depth b of-80% of the pitch. Such cavities have aspect ratios (b: a) to 1.33:1, which are within the capabilities of vacuum solder paste printing, and may also be achieved by other techniques, such as multiple rounds of solder paste printing processes. In further embodiments, the cavity depth (aspect ratio) is even smaller (e.g., -1.25: 1) due to the non-zero (c >0) screen plate thickness, squeezing solder paste over the die surface. Assuming a nominal cavity (e.g., cavity 310 in FIG. 4) has an aspect ratio of 1.25:1, a larger cavity (e.g., cavity 315 in FIG. 4) may have an aspect ratio of 1.3-1.5: 1. Or neglecting the thickness of the sieve plate, and the height-width ratio is 1.5-1.7: 1.
The mold 305 may be machined using any known technique, such as, but not limited to, laser ablation, to form cavities in the work surface. The spatial positioning of the cavities for receiving solder paste may vary by design, but may generally respect the typical spatial area grid array of BGA pads on a package substrate. The grid spacing of the cavities may vary. Exemplary grid pitches for a given BGA pad array pitch include: about 600 μm, about 500 μm, about 400 μm, about 300 μm and about 150 μm. The lateral width of the cavity is typically a function of its spacing. Typically, the lateral width of a BGA pad is approximately 60% of the pitch (e.g., 381 μm for a 635 μm pitch and 203 μm for a 305 μm pitch). In an advantageous embodiment, the lateral width of the mold cavity for receiving solder paste is slightly smaller than the solder resist opening on the package substrate around the pad. Thus, for some embodiments in which the grid array of cavities for receiving solder paste has a pitch of no more than 400 μm, the lateral width of the mold cavities is no more than 250 μm. For the above exemplary aspect ratios, the depth of the cavity can then be expected to range between about 325 μm and about 425 μm. Although illustrated as having vertical sidewalls, the cavity shape may be optimized for solder paste loading and/or solder paste transfer, e.g., having a smaller diameter at the bottom than at the top of the cavity.
In some further embodiments, the solder paste die further comprises one or more cavities or reliefs of a second type that accommodate one or more pad side members on the package substrate. In the exemplary embodiment shown in fig. 3, cavity 320 is an exemplary pad-side component relief. Rather than being sized to define a predetermined solder paste volume, the cavity 320 is sized based on the maximum pad side member height to be positioned within the cavity 320 when the die 305 is engaged into contact with the pad side of the package substrate. The lateral dimension of the cavity 320 is associated with a predetermined pad-side member exclusion area (e.g., a keep down area). The cavity 320 may have a surface that may be wetted or not wetted by the solder paste because the paste is not applied to the cavity 320 during the solder paste molding process. The size of the exclusion zone is only a function of the pad-side component placement tolerance (typically constant for all solder ball attachment techniques) and the mold tooling accuracy and/or precision. In contrast, for standard solder ball attachment processes with pad side components, a printing step is required to provide flux or solder paste to the BGA pads prior to solder ball placement. Such printing processes require a line exclusion area, typically on the order of millimeters. In some embodiments, described further below, such a printing step is not required prior to transferring solder paste from the mold.
The printing screen may be applied to the mold using any technique known to be suitable for application to a package substrate. The sieve opening will aim at with mould cavity, and mould cavity will receive the soldering paste, and the sieve will shelter from the mould cavity that does not receive the soldering paste originally. As further shown in fig. 4, the print screen 440 completely encapsulates the mold cavity 320, eliminating the subsequent application of solder paste. The solder paste printing screen plate 440 has an opening with a diameter e that is aligned with the mold cavities 310 and 315. In some embodiments, the screen plate opening diameter e is less than the mold cavity diameter a. Note that the screen 440 is flat (e.g., foil), having some nominal thickness c. Screen thickness c may be selected to ensure that the squeeze-out of solder paste over the mold surface after printing is sufficient to ensure direct contact between solder paste 530 and the package BGA pads. The thickness requirement can be determined experimentally for a given application, as its contribution to the solder's characteristic volume is expected to be minimal. In some exemplary embodiments, the screen plate thickness c is 2-3 mils (50-75 μm).
Fig. 5 illustrates a cross-sectional view of a solder paste die 305 that has been loaded with solder paste 530, such as in accordance with some embodiments of operation 220 (fig. 2). In an exemplary embodiment, the mold cavity level is loaded or completely backfilled with the top surface of the screen plate 4400 using a conventional solder paste printing process (represented by the wipe 335 in fig. 5). In alternative embodiments, the mold is loaded using a vacuum and/or injection assisted solder paste printing process. Fig. 6 illustrates a cross-sectional view of a solder paste die 305 that has been loaded with solder paste 530 after the stencil has been removed, in accordance with some embodiments. As shown, solder paste 530 extends beyond the portion of the mold work surface protected by the screen plate. Solder paste 530 can be of any known composition, having any conventional metal content. In some exemplary embodiments, solder paste 530 has 40-60% metal, including SAC alloys, such as, but not limited to SAC 305 or 405.
After the screen plate is removed, the solder paste loaded mold is engaged with the land side of the package, for example, in operation 230 (fig. 2). To make the joint, the solder paste features are aligned with the BGA pads on the package substrate. The loaded mold is placed on the package or the package is placed on the loaded mold. Fig. 7A illustrates a cross-sectional view of a solder paste loaded die 305 engaged with a package substrate 110 according to some pick and place package embodiments. Fig. 7B illustrates a cross-sectional view of the solder paste loaded die 305 engaged with the package substrate 110 according to some pick and place die embodiments. For either embodiment, solder paste 530 is in direct contact with BGA pad 336. In the illustrated exemplary embodiment, the package substrate 110 is separated from the die 305 by a gap space 752 created by a solder paste extrusion height associated with a solder paste print screen deck thickness. This paste squeeze-out height may support the package during subsequent processing steps, e.g., allowing volatile substances to escape through the interstitial spaces 752 during solder paste reflow. In an alternative embodiment, spacers or "standoffs" (not shown) may be provided on the die working surface adjacent to the various solder paste features to prevent the package from completely collapsing onto the die. For such embodiments, appropriate apertures are provided in the solder paste printing screen plate to accommodate these spacers while maintaining a flat top surface. As further shown in fig. 7A, 7B, because the diameter of the solder paste 530 is smaller than the diameter of the solder resist opening, there is a lateral gap 751 between the solder resist 755 and the solder paste 530. This gap may be asymmetrical with respect to solder paste 530 as a misalignment between package substrate 110 and mold 305.
Once bonded, the solder paste is transferred from the mold to the pads on the package substrate. The package pads may be any conventional surface finish that may be wetted by solder. In some advantageous embodiments, the solder paste flows onto the wettable BGA pad, migrating from the non-wettable surface of the mold during the initial solder reflow process at operation 240 (fig. 2). For the embodiment of the package on mold shown in fig. 8A, complete collapse due to the mis-wetting force of the BGA pad 336 is expected, which is the only wettable surface exposed to each feature of the solder paste 530 loaded in the mold. This wettable surface advantageously directly contacts the solder paste 530 before reflow due to the paste squeeze out height. During reflow, voids 860 are formed at the non-wettable surfaces of the mold 305. For the package-on-mold embodiment shown in fig. 8B, gravity may help the solder paste 530 collapse onto the BGA pad 336 during reflow, forming an aperture 860 at the non-wettable surface of the mold 305. Upon collapse, the gap space 752 is reduced to the gap space 852 and may even be eliminated with the working surface of the mold 305 in contact with the solder resist 755. The lateral gap 751 may also be reduced by the flow of solder paste 530.
After the initial solder paste reflow, the package may be removed from the mold. Fig. 9A, 9B show cross-sectional views of a package loaded with solder paste separately from an empty solder paste die, according to an on-die package and an on-package-die embodiment, respectively. Complete transfer of solder paste 530 upon separation of the mold from the package is facilitated by the non-wettable surface of the mold. After separation, the mold 305 may be preloaded for subsequent service, e.g., after any suitable cleaning, to remove any residue left over from the previous solder paste loading.
Fig. 10 illustrates a cross-sectional view of a package loaded prior to a second reflow in accordance with some alternative embodiments. As shown, the solder paste 530 forms various sized and shaped features associated with transfer from the mold cavity. Depending on the transfer process, the mold may be pushed open by the molten solder and the strong surface tension that does not wet the surface of the mold plate. For such embodiments, no additional reflow process may be required after separating the mold and package, as the solder paste transfer, mold separation, and solder paste reflow may all occur as a series of events that are continuous in time rather than discrete operations. In alternative embodiments where the auxiliary reflow is performed after mold separation, any known fluxless reflow process or any known flux reflow-defluxing process may be performed.
Fig. 11 illustrates BGA package 101 introduced above in the context of fig. 1A, according to some embodiments, which may result from reflow of a molded solder paste feature having a free surface beyond an opening in solder resist 755. As shown, the solder paste 530 has transformed into spherical solder features 130. There are apertures 135 in the solder features 130 associated with the solder paste 530 and the reflow operation. Along with varying solder feature sizes (e.g., heights), the apertures 135 represent a molding paste transfer process according to the above-described embodiments. For example, the voids 135 that occupy at least 5% of the solder area represent solder features that originate from solder paste features.
Fig. 12 illustrates a mobile computing platform and data server machine employing a package including different height BGA solder connections, such as described elsewhere herein. The server machine 1206 can be any commercially available server, for example, including any number of high performance computing platforms disposed within a rack and networked together for electronic data processing, which in the exemplary embodiment includes a packaged monolithic SoC 1250. The mobile computing platform 1205 may be any portable device configured for electronic data display, electronic data processing, wireless electronic data transmission, and the like. For example, the mobile computing platform 1205 may be any of a tablet computer, a smartphone, a laptop computer, and the like, and may include a display screen (e.g., a capacitive, inductive, resistive, or optical touch screen), an on-chip or package-level integrated system 1210, and a battery 1215.
Whether provided within an integrated system 1210 as shown in expanded view 1220, or as a separately packaged chip within a server machine 1206, the monolithic SoC1250 includes memory blocks (e.g., RAM), processor blocks (e.g., microprocessor, multi-core microprocessor, graphics processor, etc.). The packaged chip includes BGA solder connections of different heights, e.g., as described elsewhere herein. The monolithic SoC1250 may be further coupled to a circuit board, substrate, or interposer 1260 along with a Power Management Integrated Circuit (PMIC)1230, an RF (wireless) integrated circuit (RFIC)1225 (e.g., including digital baseband and analog front end modules, and also including power amplifiers in the transmit path and low noise amplifiers in the receive path) including a wideband RF transmitter and/or receiver (TX/RX), and a controller 1235.
Functionally, PMIC 1230 may perform battery power conditioning, DC-to-DC conversion, etc., and thus has an input coupled to battery 1215 and an output that provides a current supply to other functional modules. As further shown, in the exemplary embodiment, RFIC 1225 has an output coupled to an antenna (not shown) to implement any of several wireless standards or protocols, including, but not limited to, Wi-Fi (IEEE 802.11 series), WiMAX (IEEE 802.16 series), IEEE 802.20, Long Term Evolution (LTE), Ev-DO, HSPA +, HSDPA +, HSUPA +, EDGE, GSM, GPRS, CDMA, TDMA, EDCT, bluetooth, derivatives thereof, and any other wireless protocol designated as 3G, 4G, 5G, and higher generation. In alternative embodiments, each of these board-level modules may be integrated onto a separate IC or integrated into the monolithic SoC 1250.
FIG. 13 is a functional block diagram of an electronic computing device according to some embodiments. Computing device 1300 may reside within a platform 1205 or server machine 1206, for example. Device 1300 also includes a motherboard 1302 hosting several components, such as, but not limited to, a processor 1304 (e.g., an application processor), which may be in a package coupled to motherboard 1302 by BGA connections of different heights (volumes), for example, as described elsewhere herein. Processor 1304 may be physically and/or electrically coupled to motherboard 1302. In some examples, processor 1304 includes an integrated circuit packaged within processor 1304, with connections between the IC die and processor 1304 further provided by BGA solder connections of different heights, as described elsewhere herein. In general, the term "processor" or "microprocessor" may refer to any device or portion of a device that processes electronic data from registers and/or memory to transform that electronic data into other electronic data that may be further stored in registers and/or memory.
In various examples, one or more communication chips 1306 may also be physically and/or electrically coupled to motherboard 1302. In further implementations, the communication chip 1306 may be part of the processor 1304. Depending on its application, computing device 1300 may include other components that may or may not be physically and electrically coupled to motherboard 1302. These other components include, but are not limited to, volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), flash memory, a graphics processor, a digital signal processor, a crypto processor, a chipset, an antenna, a touchscreen display, a touchscreen controller, a battery, an audio codec, a video codec, a power amplifier, a Global Positioning System (GPS) device, a compass, an accelerometer, a gyroscope, a speaker, a camera, and a mass storage device (e.g., hard disk drive, Solid State Drive (SSD), Compact Disc (CD), Digital Versatile Disc (DVD), etc.), among others. Any of these other components may also be coupled to motherboard 1302 by BGA solder connections of different heights, as described elsewhere herein.
The communication chip 1306 may enable wireless communications for transferring data to and from the computing device 1300. The term "wireless" and its derivatives may be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that may communicate data by using modulated electromagnetic radiation through a non-solid medium. The term does not imply that the associated devices do not contain any wires, although in some embodiments they may not. The communication chip 1306 may implement any of a number of wireless standards or protocols, including, but not limited to those described elsewhere herein. As described above, the computing device 1300 may include a plurality of communication chips 1306. For example, a first communication chip may be dedicated to short-range wireless communications such as Wi-Fi and Bluetooth, and a second communication chip may be dedicated to long-range wireless communications such as GPS, EDGE, GPRS, CDMA, WiMAX, LTE, EV-DO, or others.
While the specific features set forth herein have been described with reference to various embodiments, this description is not intended to be construed in a limiting sense. Accordingly, various modifications of the embodiments described herein, as well as other embodiments that are apparent to persons skilled in the art to which the disclosure pertains, are deemed to lie within the spirit and scope of the disclosure.
It will be recognized that the principles of the present disclosure are not limited to the embodiments so described, but may be practiced with modification and alteration without departing from the scope of the appended claims. For example, the above embodiments may include particular combinations of features as further provided below.
In one or more first embodiments, a Ball Grid Array (BGA) package includes one or more integrated circuit chips disposed within the package, and a plurality of solder features disposed over sides of the package. The solder features include a first solder feature having a first height and a second solder feature having a second height, the second height exceeding the first height by more than 10% of the first height, and wherein the first and second solder features have an aperture that occupies at least 5% of the solder area.
In further illustration of the first embodiment, each of the solder features is a solder ball. The solder balls comprise a SnAgCu alloy. The second solder ball is disposed closer to a peripheral edge of the package than the first solder ball. The first and second solder balls have voids that comprise at least 15% of the solder area.
In further illustration of the first embodiment, the plurality of solder features further includes a third solder feature having a third height, the third height exceeding the second height by more than 10% of the second height. The second solder feature is disposed closer to the peripheral edge of the package than the first solder feature, and the third solder feature is disposed closer to the peripheral edge of the package than the second solder feature.
In further illustration of the first embodiment, a plurality of pad-side components are disposed over the side of the package, the plurality of components being spaced apart from the first solder feature by a first distance and spaced apart from the second solder feature by a second distance, the second distance being greater than the first distance.
In a further description of the first embodiment immediately above, a plurality of components are disposed within the package pad side interior portion and surrounded by a periphery having a first solder feature that does not exceed a first height. The first solder feature is also surrounded by a periphery of a second solder feature of at least a second height.
In one or more second embodiments, a method of assembling a Ball Grid Array (BGA) package includes applying solder paste to a mold, bonding the mold to the package, transferring the solder paste from the mold to the package, and separating the mold from the package.
In further illustration of the second embodiment, applying solder paste to the die further comprises applying a screen to a surface of the die comprising one or more cavities, extruding the solder paste through one or more openings in the screen to fill the one or more cavities, and removing the screen from the surface of the die.
In a further description of the second embodiment immediately above, the opening has a smaller lateral dimension than the cavity.
In further illustration of the second embodiment above, the thickness of the screen plate is sufficient to provide a height for the solder paste that is sufficient to ensure that the solder paste contacts one or more BGA pads disposed on the package when the die and package are engaged.
In further illustration of the second embodiment, bonding the mold to the package further comprises facing a surface of the mold comprising one or more cavities filled with solder paste against a surface of the package comprising one or more BGA pads, aligning the cavities with the pads, and contacting the solder paste to the pads.
In a further description of the second embodiment immediately above, bonding the mold to the package further includes releasing a first one of the mold and the package onto a second one of the mold and the package.
In further illustration of the second embodiment, transferring the solder paste from the mold to the package further comprises reflowing the solder paste sufficiently to collapse the solder paste on the pads.
In further illustration of the second embodiment, the mold includes one or more cavities of a surface that is not wettable by solder.
In further illustration of the second embodiment immediately above, the mold includes a first cavity having a first lateral dimension that is smaller than a Solder Resist Opening (SRO) disposed on a periphery of a first BGA pad on the package for receiving solder paste transferred from the first cavity.
In a further description of the second embodiment immediately above, the mold includes a second cavity having a depth greater than the first cavity, and the solder paste transferred from the first cavity to the first BGA pad has a first height less than the solder paste transferred from the second cavity to the second BGA pad after separating the substrate from the mold.
In one or more third embodiments, a solder paste die includes a grid array of first cavities having a pitch of no more than 600 μm aligned with BGA pads disposed on a package, wherein the first cavities include cavities of a first depth and cavities of a second depth greater than the first depth. The mold includes a second cavity aligned with a side portion of a pad disposed on the package substrate, wherein at least the first cavity includes a surface that is not wettable by solder.
In a further elaboration of the third embodiment, the first cavity has a lateral diameter of not more than 250 μm, the first depth being less than twice the lateral diameter.
In further illustration of the third embodiment, at least the non-wettable surface comprises graphite.
In a further description of the third embodiment immediately above, the mold is monolithic graphite.
In further illustration of the third embodiment, the mold comprises a stainless steel block coated with a material that is not wettable by solder.
However, the above embodiments are not limited in this regard and, in various implementations, the above embodiments may include employing only a subset of such features, employing a different order of such features, employing a different combination of such features and/or employing additional features in addition to those explicitly listed. The scope of the invention should, therefore, be determined with reference to the appended claims, along with the full scope of equivalents to which such claims are entitled.

Claims (17)

1. A Ball Grid Array (BGA) package comprising:
one or more integrated circuit chips disposed within the package;
a plurality of solder features disposed over a side of the package, wherein the solder features include a first solder feature having a first height and a second solder feature having a second height, the second height exceeding the first height by more than 10% of the first height, and wherein the first and second solder features have an aperture that occupies at least 5% of a solder area;
a plurality of pad side components disposed over the side of the package, wherein the plurality of pad side components are disposed within an interior portion of the pad side of the package and are surrounded by a periphery having a first solder feature that does not exceed the first height, and the first solder feature is further surrounded by a periphery of a second solder feature of at least the second height.
2. The ball grid array package of claim 1, wherein:
each of the solder features is a solder sphere;
the solder sphere comprises SnAgCu alloy;
the second solder ball is disposed closer to a peripheral edge of the package than the first solder ball; and is provided with
The first and second solder spheres have voids that comprise at least 15% of the solder area.
3. The ball grid array package of claim 1, wherein:
the plurality of solder features further includes a third solder feature having a third height, the third height exceeding the second height by a height greater than 10% of the second height;
the second solder feature is disposed closer to a peripheral edge of the package than the first solder feature, and the third solder feature is disposed closer to the peripheral edge of the package than the second solder feature.
4. The ball grid array package of claim 1, wherein the plurality of pad side members are spaced apart from the first solder features by a first distance and the plurality of pad side members are spaced apart from the second solder features by a second distance, the second distance being greater than the first distance.
5. A method of assembling a Ball Grid Array (BGA) package, the method comprising:
applying solder paste to the mold;
bonding the mold to a package;
transferring the solder paste from the mold to the package; and
separating the mold from the package and,
wherein the mold includes a first cavity having a first lateral dimension that is less than a lateral dimension of a Solder Resist Opening (SRO) disposed on the package surrounding a first ball grid array pad for receiving solder paste transferred from the first cavity,
and wherein the mold includes a second cavity having a depth greater than a depth of the first cavity, and the solder paste transferred from the first cavity to the first ball grid array pad has a first height less than a height of the solder paste transferred from the second cavity to the second ball grid array pad after separating the package from the mold.
6. The method of claim 5, wherein applying solder paste to the mold further comprises:
applying a screen to a surface of the mold comprising one or more cavities;
extruding the solder paste through one or more openings in the screen plate to fill the one or more cavities; and
removing the screen panel from the surface of the mold.
7. The method of claim 6, wherein a lateral dimension of the opening is less than a lateral dimension of the cavity.
8. The method of claim 6, wherein the screen has a thickness sufficient to provide the solder paste with a height that ensures that the solder paste contacts one or more ball grid array pads disposed on the package when the mold and the package are engaged.
9. The method of claim 5, wherein bonding the mold to the package further comprises:
facing a surface of the mold comprising one or more cavities filled with solder paste against a surface of the package comprising one or more ball grid array pads;
aligning the cavity with the pad; and
the solder paste is brought into contact with the pad.
10. The method of claim 9, wherein bonding the mold to the package further comprises: picking and placing a first one of the mold and the package onto a second one of the mold and the package.
11. The method of claim 9, wherein transferring the solder paste from the mold to the package further comprises: the solder paste is reflowed sufficiently to collapse the solder paste on the pad.
12. The method of claim 5, wherein the mold comprises a cavity having one or more surfaces that are not wettable by solder.
13. A solder paste die comprising:
a grid array of first cavities having a pitch of no more than 600 μm, the grid array of first cavities aligned with ball grid array pads disposed on a package, wherein the first cavities include cavities of a first depth and cavities of a second depth, the second depth being greater than the first depth; and
a second cavity aligned with a pad-side component disposed on a package substrate, wherein at least the first cavity includes a surface that is not wettable by solder.
14. The mold of claim 13, wherein the first cavity has a lateral diameter of no more than 250 μ ι η, and the first depth is less than twice the lateral diameter.
15. A solder paste mold according to claim 13, wherein at least the non-solder-wettable surface comprises graphite.
16. A solder paste mold according to claim 15, wherein the mold is a graphite monolith.
17. A solder paste mold according to claim 13, wherein the mold comprises a stainless steel block coated with a material that is non-wettable by solder.
CN201780013901.6A 2016-03-28 2017-02-23 Variable solder ball height via solder paste transfer on ball grid array package Active CN108701673B (en)

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