CN108666327B - X-ray image sensor, manufacturing method thereof and flat panel detector - Google Patents
X-ray image sensor, manufacturing method thereof and flat panel detector Download PDFInfo
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
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- H01L27/144—Devices controlled by radiation
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- H01L27/144—Devices controlled by radiation
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Abstract
The invention provides an X-ray image sensor, a manufacturing method thereof and a flat panel detector, wherein the X-ray image sensor at least comprises the following components: a sensor panel; the gate driving layer is positioned on the sensor panel and at least comprises m row scanning lines and n first column reading lines which are respectively vertical to the m row scanning lines, and each first column reading line is divided into m-1 reading line segments by the m row scanning lines; a gate isolation layer having a plurality of via holes on the gate driving layer; and the source and drain layers are positioned on the grid isolation layer and at least comprise n second column readout lines which are in one-to-one correspondence with the positions of the n first column readout lines, and each second column readout line is connected with m-1 readout line segments of the first column readout lines corresponding to the second column readout line in parallel through via holes. The invention effectively reduces the parasitic resistance of the data reading line by connecting two column reading lines in parallel, shortens RC time and shortens row scanning time, thereby reducing the reading time of the integrating circuit.
Description
Technical Field
The invention relates to the technical field of detectors, in particular to an X-ray image sensor, a manufacturing method thereof and a flat panel detector.
Background
Digital Radiography (DR) is a new X-ray Radiography technology developed in the last 90 th century, and has the obvious advantages of higher imaging speed, more convenient operation, higher imaging resolution and the like, so that the Digital Radiography technology becomes the leading direction of the Digital Radiography technology and is approved by clinical institutions and imaging experts of all countries in the world. The technical core of DR is a flat panel detector, which is a precise and expensive device that plays a decisive role in the imaging quality. The flat panel detector is a receiving device for X-rays in a DR system. In a DR system, a high-voltage generator and a bulb tube control the output of X-rays, the X-rays pass through an object and are attenuated, the attenuated X-rays are converted into visible light through a flat panel detector and are converted into electric signals through photoelectric conversion, the electric signals are converted into Digital signals through an Analog/Digital Converter (ADC), and the Digital signals are input into a computer for processing.
The main structure of the amorphous silicon X-ray flat panel detector comprises: an X-ray incidence surface (usually made of a carbon plate), a scintillator, an X-ray image sensor, a peripheral signal integration reading circuit, a structural shell and the like. The imaging process of the X-ray flat panel detector needs to go through the conversion process from "X-ray" to "visible light" and then to "electron". In the process of image shooting, X rays firstly enter a photoelectric conversion layer, namely a scintillator layer, on the upper surface of an X-ray image sensor, the scintillator is generally made of cesium iodide or gadolinium oxysulfide, under the irradiation of the X rays, the incident X rays can be converted into visible light by the scintillator layer, the visible light excites a PD photodiode on the X-ray image sensor to generate photo-generated electrons, then the photo-generated electrons are subjected to integral reading by a peripheral integral amplifying circuit and converted into voltage signals which are easy to process on the circuit, the voltage signals are converted into quantized digital signals by an analog-to-digital converter and transmitted to an upper computer by a data interface, and the whole photoelectric signal conversion and reading work is completed. The digital image with the diagnosis information and subjected to digital quantization is obtained on the upper computer, and various digital image processing can be easily carried out due to the digital image.
The conventional X-ray image sensor design, as shown in fig. 1, is composed of an array of pixels with equal size, and each pixel element of the imaging area is composed of an amorphous silicon photodiode 1 with photosensitive property and a TFT switch tube 2. The row scanning line 3 controls the on and off of the TFT switch tube 2, and the data reading line 4 (located in the column direction perpendicular to the row scanning line 3) cooperates with the row scanning line 3 to complete the transfer of the stored photocharge of the amorphous silicon photodiode 1. The row scanning lines 3 of all pixel elements in the same row share one, when the row scanning line 3 is opened, all the TFT switching tubes 2 in the row are opened, at this time, all the data readout lines 4 integrally read out the photocharges stored in all the photodiodes 1 in the row, so as to complete the transfer of a photoelectric signal, all the row scanning lines 3 are sequentially opened in sequence through a time-sharing gating function, and when each row scanning line 3 is opened, the peripheral signal integral reading circuit cooperates with all the column signals corresponding to the currently opened row scanning line 3 to read out, thereby forming a complete image.
The peripheral circuit of the amorphous silicon flat panel detector mainly comprises a time schedule controller, a line driving circuit, a reading circuit, an A/D conversion circuit and a communication and control circuit, as shown in figure 2 (not all shown in the figure). The method comprises the steps that a downlink driving circuit is uniformly commanded by a time schedule controller to detect charges of pixel elements line by line, then integration is carried out on the charges of the pixel elements and the charges are converted into voltage signals, the voltage signals are converted into corresponding digital signals through an A/D conversion circuit, the digital signals correspond to gray scale values of corresponding acquisition pixel points in an image matrix of an amorphous silicon panel, and after acquisition of a digital image is completed, the acquired digital gray scale image is transmitted to an upper computer to be displayed.
In the working process of the amorphous silicon flat panel detector, the line scanning and reading time of the collected image is mainly limited to the RC value of a data reading line, namely the resistance-capacitance time constant. Conventional timing designs require setting the integral readout time to 5 times or more RC time to ensure that the photo-generated charge in the photodiode can be read out by most of the integral. However, in the current X-ray image sensor design, the data readout lines are interlaced with the row scan readout lines in the fan-out direction of the data readout lines, so that parasitic capacitance is generated, and meanwhile, since the layer film thickness where the data readout lines are located is relatively thin, a parasitic resistor with a relatively large resistance value also exists on the data readout lines. Therefore, the following disadvantages exist: 1. the line scanning time is limited to RC time of parasitic resistance and parasitic capacitance of the data reading line, and the parasitic resistance and the parasitic capacitance of the data reading line are large, so that the RC time is long, and the line scanning time is long, so that the reading time of the integrating circuit is long, and the image acquisition frequency of the flat panel detector is reduced. 2. Due to the large RC value, the amount of charge in the photodiode read for the same integration time is relatively small, resulting in poor quality of the captured image. 3. The parasitic resistance of the data readout lines is large, which also increases the local noise of the flat panel detector.
Therefore, it is an urgent problem to improve the X-ray image sensor and the flat panel detector in the prior art to overcome the above-mentioned drawbacks.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide an X-ray image sensor, a method for manufacturing the same, and a flat panel detector, which are used to solve the problems in the prior art that the reading time of an integrating circuit is lengthened and the image acquisition frequency is reduced due to the influence of RC time of a data reading line on the X-ray image sensor and the detector, and the problems that the quality of the acquired image is poor due to relatively less charge amount in a photodiode read in the same integrating time, and the parasitic resistance of the data reading line is large and the local noise of the flat panel detector is increased, so as to achieve the purposes of reducing the parasitic resistance of the data reading line and increasing the image frame acquisition rate of the detector.
To achieve the above and other related objects, the present invention provides an X-ray image sensor, wherein the X-ray image sensor includes at least:
a sensor panel;
the gate driving layer is positioned on the sensor panel and at least comprises m row scanning lines and n first column reading lines which are perpendicular to the m row scanning lines respectively, each first column reading line is divided into m-1 reading line segments by the m row scanning lines, each reading line segment is not connected with any row scanning line, and m and n are natural numbers which are larger than 1;
a gate isolation layer having a plurality of via holes on the gate driving layer;
and the source and drain layers are positioned on the grid isolation layer, wherein the source and drain layers at least comprise n second row readout lines which are in one-to-one correspondence with the positions of the n first row readout lines, and each second row readout line and m-1 readout line segments of the first row readout lines corresponding to the second row readout line are respectively connected in parallel through the through holes.
Preferably, the position of each via corresponds to the position of both ends of each readout line segment to expose both ends of each readout line segment.
Preferably, the via holes are filled with metal connection lines for electrically connecting the second column readout lines and the readout line segments.
Preferably, a region surrounded by every two row scanning lines, two readout line segments and two second column readout lines is a pixel element region;
the grid driving layer further comprises control grids positioned in each pixel element region, wherein all the control grids positioned in the jth row of pixel element regions are connected with the jth row of scanning lines together, and j is a natural number which is larger than 1 and smaller than or equal to m;
the source drain layer also comprises a source metal area and a drain metal area which are positioned in each pixel element area and a pixel area which is connected with the source metal area and the drain metal area, wherein all the source metal areas and the drain metal areas which are positioned in the kth column of pixel element areas are commonly connected with a kth column of second column readout lines, and k is a natural number which is more than 1 and less than or equal to n;
the pixel area region in each pixel element region is used for forming the photodiode.
Preferably, the material of the gate isolation layer is insulating dielectric silicon nitride.
To achieve the above and other related objects, the present invention provides a flat panel detector, wherein the flat panel detector comprises at least:
an X-ray image sensor as described above;
in order to achieve the above and other related objects, the present invention provides a method for manufacturing an X-ray image sensor, wherein the method for manufacturing an X-ray image sensor at least comprises the following steps:
providing a sensor panel;
manufacturing a gate driving layer on the sensor panel, wherein the gate driving layer at least comprises m row scanning lines and n first column readout lines perpendicular to the m row scanning lines respectively, each first column readout line is partitioned into m-1 readout line segments by the m row scanning lines, each readout line segment is not connected with any row scanning line, and m and n are natural numbers larger than 1;
manufacturing a gate isolation layer with a plurality of through holes on the gate driving layer;
and manufacturing a source drain layer on the grid isolation layer, wherein the source drain layer at least comprises n second row readout lines in one-to-one correspondence with the positions of the n first row readout lines, and each second row readout line and m-1 readout line segments of the first row readout lines in the positions corresponding to the second row readout line are respectively connected in parallel through the through holes.
Preferably, a gate isolation layer having a plurality of via holes is formed on the gate driving layer, and the specific method includes:
forming a gate isolation layer on the gate driving layer;
punching holes on the grid isolation layer to form a plurality of through holes; wherein the position of each via hole corresponds to the position of the two ends of each readout line segment to expose the two ends of each readout line segment.
Preferably, the source and drain layers are fabricated on the gate isolation layer by a specific method comprising:
forming a metal film on the gate isolation layer, and filling the via hole, so that a metal connecting line for electrically connecting the second row of readout lines and the readout line segment is filled in the via hole;
and etching the metal film to form the source drain layer.
Preferably, the material of the gate isolation layer is insulating dielectric silicon nitride.
As described above, the X-ray image sensor, the manufacturing method thereof, and the flat panel detector according to the present invention have the following advantageous effects: the X-ray image sensor and the manufacturing method thereof mainly improve the problem of parasitic resistance of the column reading lines, reduce the parasitic resistance of the data reading lines by half, shorten RC time and shorten line scanning time in a mode of connecting two column reading lines in parallel, thereby reducing the reading time of an integrating circuit and further improving the image acquisition frequency of a flat panel detector. Meanwhile, the RC time constant is small, the quantity of electric charges in the photodiode is relatively large when the same integration time is used for reading, and the quality of the collected image is improved. In addition, when the grid driving layer is designed, the first reading line and the row scanning line are designed simultaneously, the layout is reasonable, the layout area is not required to be increased, an additional production process is not required to be added, and the cost is not required to be increased. In addition, the flat panel detector of the invention adopts the X-ray image sensor of the invention, so that the parasitic resistance of the data reading line is effectively reduced, and the local noise of the flat panel detector is reduced.
Drawings
Fig. 1 shows a layout of an X-ray image sensor in the prior art of the present invention.
Fig. 2 is a circuit diagram of a flat panel detector according to the prior art.
Fig. 3 shows a layout of an X-ray image sensor according to a first embodiment of the present invention.
Fig. 4 is a schematic structural diagram of a single pixel element region in an X-ray image sensor according to a first embodiment of the present invention.
Fig. 5 is a sectional view taken along a line a-a in fig. 4.
Fig. 6 shows an equivalent circuit of a single data readout in a flat panel detector according to a second embodiment of the present invention.
Fig. 7 is a schematic flow chart illustrating a method for fabricating a flat panel detector according to a third embodiment of the present invention.
Fig. 8 is a side cross-sectional view illustrating the step S2 of forming a gate driving layer in the method for manufacturing a flat panel detector according to the third embodiment of the present invention.
Fig. 9 is a top view of the gate driving layer formed in step S2 in the method for manufacturing the flat panel detector according to the third embodiment of the present invention.
Fig. 10 and 11 are side cross-sectional views illustrating a step S3 of forming a gate isolation layer having a plurality of vias in the method for fabricating a flat panel detector according to the third embodiment of the present invention.
Fig. 12 is a side cross-sectional view illustrating the source/drain layer formed in step S4 in the method for fabricating a flat panel detector according to the third embodiment of the present invention.
Fig. 13 is a top view of the source/drain layer formed in step S4 in the method for manufacturing a flat panel detector according to the third embodiment of the present invention.
Description of the element reference numerals
1 amorphous silicon photodiode
2 TFT switch tube
3 lines of scanning lines
4 data readout line
100X-ray image sensor
110 sensor panel
120 gate drive layer
121 rows of scanning lines
122 first column readout line
1221 reading line segments
123 control gate
130 grid isolation layer
131 through hole
132 metal connecting line
140 source and drain layers
141 second column readout line
142 source and drain metal regions
143 pixel area region
S1-S4 steps
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Referring to fig. 3-5, a first embodiment of the present invention relates to an X-ray image sensor 100. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
As shown in fig. 3, 4, and 5, the X-ray image sensor 100 of the present embodiment includes at least:
1. a sensor panel 110. In the present embodiment, a glass panel, a sapphire panel, or the like can be used as the sensor panel 110. Of course, in other embodiments, panels of other materials may be selected as desired.
2. A gate driving layer 120 on the sensor panel 110. The gate driving layer 120 at least includes m row scan lines 121 and n first column readout lines 122 perpendicular to the m row scan lines 121, each first column readout line 122 is partitioned by the m row scan lines 121 into m-1 readout line segments 1221, each readout line segment 1221 is not connected to any row scan line 121, and m and n are natural numbers greater than 1. Furthermore, m row scan lines 121 are uniformly distributed on the sensor panel 110, and n first column readout lines 122 perpendicular to the m row scan lines 121 are also uniformly distributed on the sensor panel 110, wherein each first column readout line 122 is divided into m-1 segments by the row scan line 121, and each segment is not connected to each other.
3. A gate isolation layer 130 having a plurality of vias 131 is positioned on the gate driving layer 120. In this embodiment, the gate isolation layer 130 is made of insulating silicon nitride SiNx.
4. And the source-drain layers 140 are located on the gate isolation layer 130, wherein the source-drain layers 140 at least include n second column readout lines 141 corresponding to the positions of the n first column readout lines 122 one to one, and each second column readout line is connected in parallel with m-1 readout line segments of the first column readout line corresponding to the second column readout line through a via hole. In this embodiment, the n second column readout lines 141 are distributed over the n first column readout lines 122 in a one-to-one correspondence, so that the first column readout line 122 located in the gate driving layer 120 and the second column readout line 141 located in the source drain layer 140 have the same potential, and therefore, no charge/discharge operation occurs due to the parasitic capacitance generated between the two column readout lines; meanwhile, the distance of each via 131 is made the shortest, and thus the parasitic resistance caused by the via 131 is also small. The m-1 readout line segments 1221 may be the same length or different lengths. Preferably, the m-1 sense line segments 1221 are all the same length, so that the parasitic resistance of each sense line segment 1221 and the second column sense line 141 after being connected in parallel is the same.
As a preferred scheme, the position of each via hole 131 corresponds to the position of both ends of each readout line segment 1221 to expose both ends of each readout line segment 1221, so that the whole area of each readout line segment is connected in parallel with the second column readout line 141, thereby maximally reducing the parasitic resistance of the data readout lines after connecting two column readout lines in parallel, and the parasitic resistance of the data readout lines as a whole is approximately reduced to half of that of the prior art.
In the present embodiment, the via hole 131 is filled with a metal connection line 132 for electrically connecting the second column readout line 141 and the readout line segment 1221.
In the present embodiment, a pixel area is defined by every two row scanning lines 121, two readout line segments 1221, and two second column readout lines 141, and a pixel array including a plurality of pixel areas having the same size is formed on the sensor panel 110. As shown in fig. 3, although only a pixel element array composed of 3 rows and 3 columns of pixel element regions is drawn in fig. 3, those skilled in the art will appreciate that the pixel element regions on the actual sensor panel 110 are far more than these, and the illustration of the present embodiment does not constitute a limitation on the number of pixel element regions in the pixel element array.
The gate driving layer 120 further includes a control gate 123 located in each pixel region, where all the control gates 123 located in the jth row of pixel regions are commonly connected to the jth row of scan lines 121, and j is a natural number greater than 1 and less than or equal to m; the source-drain layer 140 further includes a source-drain metal region 142 located in each pixel element region, and a pixel area region 143 connected to the source-drain metal region 142, where all the source-drain metal regions 142 located in the kth column of pixel element regions are commonly connected to the kth column of second column readout lines 141, and k is a natural number greater than 1 and less than or equal to n.
Wherein, each pixel area at least comprises a TFT switch tube and a photodiode, the control gate 123, the gate isolation layer 130 and the source and drain metal area 142 in each pixel area are used for forming the TFT switch tube, and the pixel area 143 in each pixel area is used for forming the photodiode.
In addition, the X-ray image sensor 100 of the present embodiment further includes an amorphous silicon layer (not shown in the figure) located between the gate isolation layer 130 and the source/drain layer 140, and the position of the amorphous silicon layer is located between the source/drain metal regions 142 of the gate isolation layer 130 and the source/drain layer 140, that is, the amorphous silicon layer is located at the channel position of the TFT switch tube.
In this embodiment, the photodiode and the TFT switch tube both have the conventional structure, for example, the TFT switch tube may be a bottom gate TFT, and the structure thereof at least includes, from bottom to top, a bottom control gate, a gate isolation layer, an amorphous silicon layer, a source and drain metal region, a protective film layer, and the like, and the photodiode structure at least includes, from bottom to top, a gate isolation layer, a pixel area region, a protective film layer, and the like, which are shared with the TFT switch tube. Of course, the amorphous silicon photodiode and the TFT switching tube may have other structures, and this embodiment mode is not limited to this.
The X-ray image sensor is optimized and improved, parasitic resistance of the data reading lines is reduced by half by connecting the two reading lines in parallel, RC time is shortened, and line scanning time is shortened, so that the reading time of an integrating circuit is shortened, and the image acquisition frequency of the flat panel detector is improved. Meanwhile, the RC time constant is small, the quantity of electric charges in the photodiode is relatively large when the same integration time is used for reading, and the quality of the collected image is improved.
A second embodiment of the invention relates to a flat panel detector comprising at least: such as the X-ray image sensor 100 according to the first embodiment of the present invention.
In addition, the flat panel detector of the present embodiment may further include: a row driving circuit connected to the m row scanning lines 121 at the same time for driving each row scanning line 121 one by one at a time; a data readout circuit connected to n data readout lines obtained by connecting the first column readout line 122 and the second column readout line 141 in parallel, for reading out photoelectric signals in all pixel element regions corresponding to each row scanning line 121 to be driven; a timing controller connected to the row driving circuit for controlling a driving timing of the row driving circuit, and the like. The equivalent circuit for one-way data reading is shown in fig. 6.
The flat panel detector of the present embodiment adopts the X-ray image sensor 100 according to the first embodiment of the present invention, and effectively reduces the parasitic resistance of the data readout line by connecting two column readout lines in parallel, so that the readout time of the integrating circuit is reduced, and the image acquisition frequency of the flat panel detector is further improved.
Since the flat panel detector of the present embodiment employs the X-ray image sensor 100 according to the first embodiment of the present invention, the present embodiment needs to be implemented in addition to the first embodiment. The related technical details mentioned in the first embodiment are still valid in this embodiment, and are not described herein again in order to reduce repetition. In addition, in order to highlight the innovative part of the present invention, elements that are not so closely related to solving the technical problems proposed by the present invention are not introduced in the present embodiment, but this does not indicate that other elements are not present in the present embodiment.
Referring to fig. 7-13, a third embodiment of the invention relates to a method for manufacturing an X-ray image sensor. As shown in fig. 7, the method for manufacturing an X-ray image sensor according to the present embodiment includes at least the steps of:
in step S1, a sensor panel 110 is provided. In the present embodiment, a glass panel, a sapphire panel, or the like can be used as the sensor panel 110. Of course, in other embodiments, panels of other materials may be selected as desired.
Step S2, a gate driving layer 120 is fabricated on the sensor panel 110, as shown in fig. 8 and 9, wherein the gate driving layer 120 at least includes m row scan lines 121 and n first column readout lines 122 perpendicular to the m row scan lines 121, each first column readout line 122 is separated by m row scan lines 121 into m-1 readout line segments 1221, each readout line segment 1221 is not connected to any row scan line 121, and m and n are natural numbers greater than 1. Furthermore, m row scan lines 121 are uniformly distributed on the sensor panel 110, and n first column readout lines 122 perpendicular to the m row scan lines 121 are also uniformly distributed on the sensor panel 110. In this embodiment, the gate driving layer 120 is formed by an electronic magnetron sputtering method (or other equivalent processes), and then is obtained by coating a photoresist, exposing and cleaning, etching a line, and cleaning the photoresist.
In step S2, unlike the prior art, the row scan lines 121 are designed in the gate driving layer 120, and the first column readout lines 122 are designed in the data readout line direction (i.e., the direction perpendicular to the row scan lines 121), except that each first column readout line 122 in the gate driving layer 120 is divided into m-1 segments by the row scan line 121, and the segments are not connected to each other.
In step S3, a gate isolation layer 130 having a plurality of vias 131 is formed on the gate driving layer 120, as shown in fig. 10 and 11.
In the present embodiment, the specific method of step S3 is:
first, a gate isolation layer 130 is formed on the gate driving layer 120, as shown in fig. 10. In this embodiment, the gate isolation layer 130 is formed by a vapor chemical deposition method (or other equivalent process).
Next, holes are punched in the gate isolation layer 130 to form a plurality of vias 131, as shown in fig. 11. In this embodiment, the drilling manner is to coat photoresist, expose and clean, etch the gate isolation layer 130 to conduct via hole and clean the photoresist.
The positions of the through holes 131 correspond to the positions of the two ends of each readout line segment 1221 to expose the two ends of each readout line segment 1221, so that the entire area of each readout line segment is connected in parallel to the second column readout line 141, thereby maximally reducing the parasitic resistance of the data readout lines after connecting the two column readout lines in parallel, and the overall parasitic resistance of the data readout lines is reduced to approximately half of that of the prior art. That is, the number of vias 131 is twice the number of readout line segments 1221. In this embodiment, the material of the gate isolation layer 130 is silicon nitride SiNx, which is an insulating medium.
Step S4, fabricating source-drain layers 140 on the gate isolation layer 130, as shown in fig. 12 and 13, where the source-drain layers 140 at least include n second column readout lines 141 corresponding to the positions of the n first column readout lines 122 one to one, and each second column readout line and m-1 readout line segments of the first column readout line corresponding to the second column readout line are connected in parallel through via holes respectively. In this embodiment, the n second column readout lines 141 are fabricated directly above the n first column readout lines 122 in a one-to-one correspondence manner, so that the first column readout line 122 located in the gate driving layer 120 and the second column readout line 141 located in the source drain layer 140 have the same potential, and therefore, no charge/discharge operation occurs due to the parasitic capacitance generated between the two column readout lines; meanwhile, the distance of each via 131 is made the shortest, and thus the parasitic resistance caused by the via 131 is also small. The m-1 readout line segments 1221 may be the same length or different lengths. Preferably, the m-1 sense line segments 1221 are all the same length, so that the parasitic resistance of each sense line segment 1221 and the second column sense line 141 after being connected in parallel is the same.
In the present embodiment, the specific method of step S4 is:
first, a metal film is formed on the gate isolation layer 130, and the via hole 131 is filled with the metal film, so that the via hole 131 is filled with a metal connection line for electrically connecting the second row readout line and the readout line segment. In this embodiment mode, the metal film is formed by an electron magnetron sputtering method (or other equivalent process method).
Next, the metal film is etched to form source-drain layers 140, as shown in fig. 12 and 13. Specifically, the source/drain layer 140 is obtained by coating a photoresist on a metal film, exposing and cleaning, etching a line, and cleaning the photoresist.
In the present embodiment, a region surrounded by every two row scanning lines 121, two readout line segments 1221, and two second column readout lines 141 is a pixel region. The gate driving layer 120 formed in step S2 further includes a control gate 123 located in each pixel cell region, as shown in fig. 9. All control gates 123 in the jth row of pixel element regions are commonly connected to the jth row of scan lines 121, where j is a natural number greater than 1 and less than or equal to m. The source-drain layer 140 formed in step S4 further includes source and drain metal regions 142 located in each pixel cell region and a pixel area region 143 connected to the source and drain metal regions 142, as shown in fig. 13. All the source and drain metal regions 142 in the kth column of pixel element region are commonly connected to the kth column of second column readout lines 141, where k is a natural number greater than 1 and less than or equal to n.
Wherein, each pixel area at least comprises a TFT switch tube and a photodiode, the control gate 123, the gate isolation layer 130 and the source and drain metal area 142 in each pixel area are used for forming the TFT switch tube, and the pixel area 143 in each pixel area is used for forming the photodiode.
In addition, a step of forming an amorphous silicon layer is further included between steps S3 and S4, the amorphous silicon layer (not shown in the figure) is formed between the gate isolation layer 130 and the source/drain layer 140, and is etched to remain a part between the gate isolation layer 130 and the source/drain metal region 142 of the source/drain layer 140, that is, the amorphous silicon layer is located at the channel position of the TFT switching tube.
In this embodiment, the photodiode and the TFT switch tube both have the conventional structure, for example, the TFT switch tube may be a bottom gate TFT, and the structure thereof at least includes, from bottom to top, a bottom control gate, a gate isolation layer, an amorphous silicon layer, a source and drain metal region, a protective film layer, and the like, and the photodiode structure at least includes, from bottom to top, a gate isolation layer, a pixel area region, a protective film layer, and the like, which are shared with the TFT switch tube. Of course, the amorphous silicon photodiode and the TFT switching tube may have other structures, and this embodiment mode is not limited to this.
Through the above-described steps S1 to S4, the X-ray image sensor shown in fig. 12 is finally obtained. In addition, in the reading direction of the data reading lines, two parallel column reading lines are equivalently designed at each reading line position, the two column reading lines are connected in a crossing mode through a plurality of through holes, and the overall parasitic resistance is reduced to be approximately half of that of the prior art.
Therefore, in the manufacturing method of the X-ray image sensor according to the embodiment, the first column readout line and the row scan line are simultaneously designed when the gate driving layer is manufactured, the hole is punched when the gate isolation layer is manufactured, and the via hole is synchronously filled when the source drain layer is manufactured to realize the parallel connection of the two column readout lines; the layout is reasonable, the layout area is not required to be increased, an additional production process is not required to be added, and the cost is not required to be increased. According to the X-ray image sensor obtained by the manufacturing method of the X-ray image sensor, the parasitic resistance of the data reading line is effectively reduced, the RC time is shortened, the line scanning time is shortened, the reading time of the integrating circuit is shortened, and the image acquisition frequency of the flat panel detector is improved. Meanwhile, the RC time constant is small, the quantity of electric charges in the photodiode is relatively large when the same integration time is used for reading, and the quality of the collected image is improved.
The steps of the above methods are divided for clarity, and the implementation may be combined into one step or split some steps, and the steps are divided into multiple steps, so long as the steps contain the same logical relationship, which is within the protection scope of the present patent; it is within the scope of the patent to add insignificant modifications to the algorithms or processes or to introduce insignificant design changes to the core design without changing the algorithms or processes.
In summary, the X-ray image sensor, the manufacturing method thereof and the flat panel detector of the invention have the following beneficial effects: the X-ray image sensor and the manufacturing method thereof mainly improve the problem of parasitic resistance of the column reading lines, reduce the parasitic resistance of the data reading lines by half, shorten RC time and shorten line scanning time in a mode of connecting two column reading lines in parallel, thereby reducing the reading time of an integrating circuit and further improving the image acquisition frequency of a flat panel detector. Meanwhile, the RC time constant is small, the quantity of electric charges in the photodiode is relatively large when the same integration time is used for reading, and the quality of the collected image is improved. In addition, when the grid driving layer is designed, the first reading line and the row scanning line are designed simultaneously, the layout is reasonable, the layout area is not required to be increased, an additional production process is not required to be added, and the cost is not required to be increased. In addition, the flat panel detector of the invention adopts the X-ray image sensor of the invention, so that the parasitic resistance of the data reading line is effectively reduced, and the local noise of the flat panel detector is reduced. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. An X-ray image sensor, characterized in that it comprises at least:
a sensor panel;
the gate driving layer is positioned on the sensor panel and at least comprises m row scanning lines and n first column reading lines which are perpendicular to the m row scanning lines respectively, each first column reading line is divided into m-1 reading line segments by the m row scanning lines, each reading line segment is not connected with any row scanning line, and m and n are natural numbers which are larger than 1;
a gate isolation layer having a plurality of via holes on the gate driving layer;
and the source and drain layers are positioned on the grid isolation layer, wherein the source and drain layers at least comprise n second row readout lines which are in one-to-one correspondence with the positions of the n first row readout lines, and each second row readout line and m-1 readout line segments of the first row readout lines corresponding to the second row readout line are respectively connected in parallel through the through holes.
2. The X-ray image sensor of claim 1, wherein the location of each via corresponds to the location of both ends of each readout line segment to expose both ends of each readout line segment.
3. The X-ray image sensor according to claim 1, wherein the via holes are filled with metal connection lines for electrically connecting the second column readout lines and the readout line segments.
4. The X-ray image sensor according to claim 1, wherein a region surrounded by every two row scanning lines, two readout line segments, and two second column readout lines is a pixel element region;
the grid driving layer further comprises control grids positioned in each pixel element region, wherein all the control grids positioned in the jth row of pixel element regions are connected with the jth row of scanning lines together, and j is a natural number which is larger than 1 and smaller than or equal to m;
the source drain layer also comprises a source and drain metal region positioned in each pixel element region and a pixel area region connected with the source and drain metal region, wherein all the source and drain metal regions positioned in the kth row of pixel element regions are commonly connected with a kth row of second row readout lines, and k is a natural number which is more than 1 and less than or equal to n;
each pixel element region at least comprises a TFT (thin film transistor) switch tube and a photodiode, a control gate and a gate isolation layer and source and drain metal regions in each pixel element region are used for forming the TFT switch tube, and a pixel area region in each pixel element region is used for forming the photodiode.
5. The X-ray image sensor according to claim 1, wherein the material of the gate isolation layer is insulating dielectric silicon nitride.
6. A flat panel detector, characterized in that the flat panel detector comprises at least:
an X-ray image sensor as claimed in any one of claims 1 to 5.
7. A method for manufacturing an X-ray image sensor is characterized by at least comprising the following steps:
providing a sensor panel;
manufacturing a gate driving layer on the sensor panel, wherein the gate driving layer at least comprises m row scanning lines and n first column readout lines perpendicular to the m row scanning lines respectively, each first column readout line is partitioned into m-1 readout line segments by the m row scanning lines, each readout line segment is not connected with any row scanning line, and m and n are natural numbers larger than 1;
manufacturing a gate isolation layer with a plurality of through holes on the gate driving layer;
and manufacturing a source drain layer on the grid isolation layer, wherein the source drain layer at least comprises n second row readout lines in one-to-one correspondence with the positions of the n first row readout lines, and each second row readout line and m-1 readout line segments of the first row readout lines in the positions corresponding to the second row readout line are respectively connected in parallel through the through holes.
8. The method for manufacturing an X-ray image sensor according to claim 7, wherein a gate isolation layer having a plurality of via holes is manufactured on the gate driving layer, and the method comprises:
forming a gate isolation layer on the gate driving layer;
punching holes on the grid isolation layer to form a plurality of through holes; wherein the position of each via hole corresponds to the position of the two ends of each readout line segment to expose the two ends of each readout line segment.
9. The method for manufacturing the X-ray image sensor according to claim 7, wherein a source drain layer is manufactured on the gate isolation layer, and the specific method is as follows:
forming a metal film on the gate isolation layer, and filling the via hole, so that a metal connecting line for electrically connecting the second row of readout lines and the readout line segment is filled in the via hole;
and etching the metal film to form the source drain layer.
10. The method for manufacturing an X-ray image sensor according to claim 7, wherein the gate isolation layer is made of insulating dielectric silicon nitride.
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| CN102752558A (en) * | 2011-04-19 | 2012-10-24 | 索尼公司 | Solid-state imaging device, imaging method and imaging apparatus |
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| JP4881987B2 (en) * | 2009-10-06 | 2012-02-22 | キヤノン株式会社 | Solid-state imaging device and imaging device |
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| CN102752558A (en) * | 2011-04-19 | 2012-10-24 | 索尼公司 | Solid-state imaging device, imaging method and imaging apparatus |
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