CN108630161A - Voltage supply circuit and control circuit - Google Patents
Voltage supply circuit and control circuit Download PDFInfo
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- CN108630161A CN108630161A CN201810435316.1A CN201810435316A CN108630161A CN 108630161 A CN108630161 A CN 108630161A CN 201810435316 A CN201810435316 A CN 201810435316A CN 108630161 A CN108630161 A CN 108630161A
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- 239000003990 capacitor Substances 0.000 claims description 10
- 102100021394 CST complex subunit CTC1 Human genes 0.000 description 47
- 101000894433 Homo sapiens CST complex subunit CTC1 Proteins 0.000 description 47
- 101100142768 Symbiobacterium thermophilum (strain T / IAM 14863) rplY2 gene Proteins 0.000 description 40
- 238000010586 diagram Methods 0.000 description 18
- 230000005611 electricity Effects 0.000 description 14
- 239000004973 liquid crystal related substance Substances 0.000 description 14
- 230000000630 rising effect Effects 0.000 description 9
- 239000000758 substrate Substances 0.000 description 7
- 239000010410 layer Substances 0.000 description 6
- 101150079544 CTM1 gene Proteins 0.000 description 4
- 230000005684 electric field Effects 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 102100038387 Cystatin-SN Human genes 0.000 description 1
- 101000884768 Homo sapiens Cystatin-SN Proteins 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000001808 coupling effect Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
A voltage supply circuit comprising: an output circuit and a first control circuit. The first control circuit is used for providing a first control voltage with a first voltage level to the output circuit so as to enable the output circuit to output a first supply voltage. The first control circuit comprises an output module and a control module. The output module comprises an output end. The control module is used for providing a first operating voltage to a first operating node according to a first clock pulse signal, so that the output module provides the first control voltage with the first voltage level to the output according to the first operating voltage on the first operating node.
Description
Technical field
The present invention relates to a kind of electronic circuits.Specifically, the present invention relates to a kind of circuit for providing voltage and control circuits.
Background technology
With the rapid progress of electronics technology, display device has been widely used in people’s lives, is such as moved
Mobile phone or computer etc..
In general, liquid crystal display device may include multiple electrodes and liquid crystal layer.Liquid crystal display device provides different voltages
To these electrodes, electric field is generated between these electrodes to enable, with liquid crystal molecule in twisted liquid crystal layer.By the torsion of control liquid crystal molecule
Turn, you can control the display picture of liquid crystal display device.Therefore, voltage how is provided to these electrodes to control liquid crystal molecule
Torsion is the important research subject under discussion of this field.
Invention content
An embodiment of the present invention is related to a kind of circuit for providing voltage.According to one embodiment of the invention, circuit for providing voltage
Including：One output circuit and a first control circuit.First control circuit is electrically connected the output circuit, has to provide
One first control voltage of one first voltage level is to the output circuit, to enable the output circuit export one first supply electricity according to this
Pressure.First control circuit includes an output module and a control module.Output module includes an output end.Control module is to root
According to one first clock pulse signal, one first operation voltage to one first running node is provided, to enable the output module according to this
It is defeated to this to provide the first control voltage with the first voltage level for the first operation voltage in first running node
Go out.The control module is more according to scan signal, providing one first operating voltage to one first working node, to enable this defeated
Depanning root tuber provides first control with a second voltage level according to first operating voltage on first working node
Voltage is to the output end.
Another embodiment of the present invention is related to a kind of circuit for providing voltage.According to one embodiment of the invention, voltage provides electricity
Road includes：One output circuit, a first control circuit, a second control circuit and scan signal provide circuit.First control
Circuit processed is electrically connected the output circuit, defeated to this according to scan signal, selectively to provide one first control voltage
Go out circuit, to enable the output circuit export one first supply voltage according to this.Second control circuit is electrically connected the output circuit, uses
According to the scanning signal, selectively to provide one second control voltage to the output circuit, to enable the output circuit defeated according to this
Go out one second supply voltage.Scanning signal provides circuit and is electrically connected the output circuit, defeated to this to provide the scanning signal
Go out circuit, voltage is supplied to enable the output circuit export a third according to this.This first supply voltage, this second supply voltage and
The third supply voltage voltage level it is different from each other, and wherein the output circuit in export this first supply voltage and this second
Third supply voltage is exported between supply voltage.
Another embodiment of the present invention is related to a kind of control circuit.According to one embodiment of the invention, circuit for providing voltage packet
It includes：One first output switchs, one second exports switch, a first switch, a second switch, a third switch, one the 4th switchs,
An and operation of capacitor.One first end of the first output switch has one first control of a first voltage level to receive
One second end of voltage, the first output switch is electrically connected an output end, and a control terminal of the first output switch is electrical
Connect one first running node.This second output switch a first end to receive with a second voltage level this first
Voltage is controlled, a second end of the second output switch is electrically connected the output end, and a control terminal of the second output switch
It is electrically connected one first working node.One first end of the first switch operates voltage, the first switch to receive one first
A second end be electrically connected first running node, and a control terminal of the first switch is receiving one first clock pulses
Signal.To receive one first operating voltage, a second end of the second switch is electrically connected one first end of the second switch
First working node, and a control terminal of the second switch is receiving scan signal.One first end of third switch
To receive one second operation voltage, a second end of third switch is electrically connected first running node, and this second is opened
The control terminal closed is electrically connected first working node.One first end of the 4th switch is electric to receive one second work
One second end of pressure, the 4th switch is electrically connected first working node, and a control terminal of the 4th switch is electrically connected
First running node.One first end of the operation of capacitor is to receive the second clock pulse signal, and the one of the operation of capacitor
Second end is electrically connected first working node.
By using an above-mentioned embodiment, output circuit can be according to first control circuit, second control circuit and scanning
Signal provides the operation of circuit, first supply voltage, second supply electricity of the output with different voltages level in different periods
Pressure and third supply voltage.
Below in conjunction with the drawings and specific embodiments, the present invention will be described in detail, but not as a limitation of the invention.
Description of the drawings
Fig. 1 is the schematic diagram according to display device shown in one embodiment of the invention；
Fig. 2 is the section schematic diagram according to display device shown in one embodiment of the invention；
Fig. 3 is the schematic diagram according to display device shown in one embodiment of the invention；
Fig. 4 is the signal schematic representation according to display device shown in one embodiment of the invention；
Fig. 5 is the schematic diagram according to circuit for providing voltage shown in one embodiment of the invention；
Fig. 6 is the signal schematic representation according to circuit for providing voltage shown in one embodiment of the invention；
Fig. 7 is the schematic diagram according to control circuit shown in one embodiment of the invention；
Fig. 8 is the schematic diagram according to control circuit shown in one embodiment of the invention；
Fig. 9 is the schematic diagram according to generation circuit of scanning signals shown in one embodiment of the invention；
Figure 10 is the signal schematic representation according to display device shown in an operation example of the invention；
Figure 11 is the schematic diagram according to circuit for providing voltage shown in another embodiment of the present invention；
Figure 12 is the schematic diagram according to control circuit shown in another embodiment of the present invention；
Figure 13 is the schematic diagram according to control circuit shown in another embodiment of the present invention；
Figure 14 is the schematic diagram according to control circuit shown in another embodiment of the present invention.
Wherein, reference numeral：
100：Display device
102：Pel array
106：Pixel circuit
110：Gate driving circuit
120：Source electrode drive circuit
G(1)-G(N)：Grid signal
D(1)-D(M)：Data voltage
CF：Colored filter
OST：Opposite substrate
AST：Array substrate
LD：Liquid crystal molecule
ALD：Pixel electrode
CCM：Colored filter side common electrode
ACM：Array side common electrode
BM：Light shield layer
OC：Protective layer
DRV：Circuit for providing voltage
BD(1)-BD(X)：Region
COM_P(1)-COM_P(X)：Voltage
COM_N(1)-COM_N(X)：Voltage
t1-t8：Time point
LVC(1)-LVC(X)：Operating circuit
SRC：Generation circuit of scanning signals
OTC：Output circuit
CTC1、CTC2：Control circuit
TS1-TS6：Switch
CU(1)-CU(X)：Control signal
CD(1)-CD(X)：Control signal
Y(1)-Y(X)：Scanning signal
VS1-VS3：Supply voltage
OTM1-OTM2：Output module
CTM1-CTM2：Control module
T1-T5：Switch
TO1-TO2：Switch
C1-C3：Capacitance
CK1、CK2：Clock pulse signal
VGH、VGL：Voltage
A、B、P、R：Node
TR1、TR2：Switch
s1-s11：Time point
TCN1-TCN4：Switch
CN：Control signal
TV1-TV4：Switch
CV1：Capacitance
VDD：Voltage
Specific implementation mode
The structural principle and operation principle of the present invention are described in detail below in conjunction with the accompanying drawings：
About " first " used herein, " second " ... etc., not especially censure the meaning of order or cis-position, also
It is non-to limit the present invention, only for distinguishing the element described with same technique term or operation.
About " electric connection " used herein, can refer to two or multiple element mutually directly make entity or be electrically connected with
It touches, or mutually puts into effect indirectly body or in electrical contact, and " electric connection " also can refer to two or multiple element mutual operation or action.
It is the term of opening, i.e., about "comprising" used herein, " comprising ", " having ", " containing " etc.
Mean including but not limited to.
About it is used herein " and/or ", be including any of the things or all combination.
About word used herein (terms), in addition to having and especially indicating, usually have each word using herein
In field, in content disclosed herein with the usual meaning in special content.Certain words to describe the present invention will be under
Or discussed in the other places of this specification, to provide those skilled in the art's guiding additional in description for the present invention.
Fig. 1 is the schematic diagram according to display device shown in the embodiment of the present invention 100.Display device 100 may include grid
Driving circuit 110, source electrode drive circuit 120 and pel array 102.Pel array 102 may include a plurality of with matrix arrangement
Pixel circuit 106.Gate driving circuit 110 can sequentially generate and provide complex grid signal G (1) ..., G (N) give pixel
The pixel electrode (the pixel electrode ALD in such as Fig. 2) of pixel circuit 106 in array 102, to open pixel circuit 106 by column
Data switch, wherein N be natural number.Source electrode drive circuit 120 can generate complex data voltage D (1) ..., D (M), and carry
For these data voltages D (1) ..., the pixel electrode (picture in such as Fig. 2 in the pixel circuits 106 opened to data switch of D (M)
Plain electrode A LD) so that pixel circuit 106 according to data voltage D (1) ..., D (M) carry out display operation, wherein M be natural number.
Thereby, display device 100 is displayable image.
Fig. 2 is the diagrammatic cross-section according to display device shown in one embodiment of the invention.In this example it is shown that dress
It sets including array substrate AST and opposite substrate OST.Pixel electrode ALD and array side common electrode ACM are set to array substrate
On AST, and colored filter side common electrode CCM, colored filter CF, light shield layer BM and protective layer OC are set to opposite base
On plate OST.Liquid crystal layer is set between array substrate AST and opposite substrate OST, and with plural liquid crystal molecule LD.
In the present embodiment, pixel electrode ALD to receive aforementioned data voltage D (1) ..., D (M), and array side is common
Electrode A CM is to receiving array side common voltage (voltage COM_P (1)-COM_P (X), COM_N (1)-COM_N in such as Fig. 3
(X)), pixel electrode ALD and array side common electrode ACM availability data voltage D (1) ..., D (M) and array side common voltage
The electric field of formation, to control the torsion of liquid crystal molecule LD, the light to change liquid crystal layer passes through amount.
On the other hand, also may be used between pixel electrode ALD, array side common electrode ACM and colored filter side common electrode CCM
Vertical electric field is formed, to control the inclination (tilt) of liquid crystal molecule LD, to change the visual angle width of display device 100.
Fig. 3 is the schematic diagram according to pixel electrode ALD shown in one embodiment of the invention and array side common electrode ACM.
In this example it is shown that the pixel electrode ALD of device 100 and array side common electrode ACM can be divided into X region BD (1)-BD
(X), wherein X is natural number, and each region BD (1)-BD (X) has 1 column array side common electrode ACM and 8 row pixel electrodes
ALD.Also that is, in the present embodiment, every 8 row pixel electrode ALD can correspond to 1 column array side common electrode ACM.It should be noted that with
Upper correspondence is only to illustrate, and the columns of the corresponding pixel electrodes of every 1 column array side common electrode ACM can be carried out according to actual demand
Change (such as every 1 column array side common electrode ACM corresponds to 6 row or 10 row pixel electrode ALD).In addition, the above pixel electrode ALD
Quantity with array side common electrode ACM is all only to illustrate, and invention is not limited thereto.
In this example it is shown that the circuit for providing voltage DRV of device 100 can provide voltage COM_P (1)-COM_P respectively
(X) to odd-numbered line array side common electrode ACM.For example, circuit for providing voltage DRV can provide voltage COM_P (1) to first row
And the array side common electrode ACM of the first and third, five-element, voltage COM_P (2) is provided to secondary series and the battle array of the first and third, five-element
Side common electrode ACM is arranged, and so on.
Similarly, in the present embodiment, circuit for providing voltage DRV can provide voltage COM_N (1)-COM_N (X) extremely respectively
The array side common electrode ACM of even number line.For example, circuit for providing voltage DRV can provide voltage COM_N (1) to first row and
Two, the array side common electrode ACM of four, six rows provides voltage COM_N (2) to the array side of secondary series and second, four, six rows
Common electrode ACM, and so on.
With reference to Fig. 4, in the present embodiment, the waveform of voltage COM_P (1)-COM_P (X) is similar to each other but phase each other not
Together.In one embodiment, voltage COM_P (1)-COM_P (X) is to be postponed one by one.Similarly, in the present embodiment, voltage
The waveform of COM_N (1)-COM_N (X) is similar to each other but phase is different from each other.In one embodiment, voltage COM_N (1)-COM_N
(X) it is to be postponed one by one.In one embodiment, voltage COM_P (1)-COM_P (X) and voltage COM_N (1)-COM_N (X) that
This reverse phase, to be respectively supplied to the array side common electrode ACM of opposed polarity.
In the present embodiment, each voltage COM_P (1)-COM_P (X), COM_N (1)-COM_N (X) all have there are three types of not
Same voltage level, that is, first voltage level (such as high-voltage level (such as+5V)) (it is electric to be also known as the first supply in the present invention
Pressure), second voltage level (such as low voltage level (as -5V)) (being also known as the second supply voltage in the present invention) and tertiary voltage
Level (such as middle voltage level (such as 0V)) (is also known as third and supplies voltage) in the present invention.
In one embodiment, the first supply voltage is provided to the battle array corresponding to the pixel electrode ALD under positive polarity state
Arrange side common electrode ACM, it is total that the second supply voltage is provided to the array side corresponding to the pixel electrode ALD under negative polarity state
With electrode A CM, and to be provided to the array side corresponding to the pixel electrode ALD under data write state common for third supply voltage
Electrode A CM.
In one embodiment, for each voltage COM_P (1)-COM_P (X), COM_N (1)-COM_N (X), voltage carries
All output third voltage can be supplied for circuit DRV between the first supply voltage of output and the second supply voltage.For example, voltage
COM_P (1) with tertiary voltage level during (such as time point t4 to time point t5) between voltage COM_P (1) with first
(such as time point t2 to time point t4) has during second voltage level with voltage COM_P (1) (when such as during voltage level
Between point t5 to time point t6) between, and voltage COM_P (1) it is another have tertiary voltage level during (such as time point t7 to when
Between point t8) between voltage COM_P (1) have second voltage level during time point t5 to time point t6) with voltage COM_P
(1) have first voltage level during (such as after time point t8) between.
In one embodiment, each voltage COM_P (1)-COM_P (X), COM_N (1)-COM_N (X) all correspond to 8 grids
Signal G (0) ..., G (N), and have tertiary voltage level.
For example, voltage COM_P (1) is in time point t1 (i.e. the rising edge of the grid signal G (0) of first frame) to time
There is tertiary voltage level between point t2 (i.e. the rising edge of the grid signal G (8) of first frame).Then, voltage COM_P (1) exists
There is first voltage level between time point t2 to time point t4 (i.e. the rising edge of the grid signal G (8) of the second frame).Then,
Voltage COM_P (1) has third between time point t4 to time point t5 (i.e. the rising edge of the grid signal G (8) of the second frame)
Voltage level.Then, voltage COM_P (1) is in time point t5 to time point t7 (the i.e. risings of the grid signal G (0) of third frame
Edge) between have second voltage level.
In addition, voltage COM_N (1) and voltage COM_P (1) is inverting each other, therefore this will not be repeated here.
Similarly, voltage COM_P (2) is in time point t2 to time point t3 (the i.e. risings of the grid signal G (16) of first frame
Edge) between have tertiary voltage level.Then, voltage COM_P (2) is in time point t3 to time point t5 (the i.e. grids of the second frame
The rising edge of signal G (8)) between have first voltage level.Then, voltage COM_P (2) is in time point t5 to time point t6
There is tertiary voltage level between (i.e. the rising edge of the grid signal G (16) of the second frame).Then, voltage COM_P (2) is in the time
There is second voltage level between point t6 to time point t8 (i.e. the rising edge of the grid signal G (8) of third frame).
In addition, voltage COM_N (2) and voltage COM_P (2) is inverting each other, therefore this will not be repeated here.
By above-mentioned operation, voltage COM_P (1)-COM_P (X), COM_N (1)-COM_N (X) can be made to be believed according to grid
Number G (0) ..., G (N) and there is different voltage levels.
Although it should be noted that above-described embodiment each voltage COM_P (1)-COM_P (X), COM_N (1)-COM_N (X)
All correspond to 8 grid signal G (0) ..., G (N) and with illustrating for tertiary voltage level, however actually each electricity
Pressure COM_P (1)-COM_P (X), COM_N (1)-COM_N (X) can correspond to more than 8 (such as 12) grid signal G (0) ..., G
(N) there is tertiary voltage level, therefore the present invention is not limited with above-described embodiment.In different embodiments, each voltage
The corresponding grid signal G (0) of COM_P (1)-COM_P (X), COM_N (1)-COM_N (X) ..., the quantity of G (N) can be according to practical need
It asks and is changed.
Fig. 5 is the schematic diagram according to circuit for providing voltage DRV shown in one embodiment of the invention.In the present embodiment, electric
It includes X level work circuits LVC (1)-LVC (X) that pressure, which provides circuit DRV,.Operating circuit LVC (1)-LVC (X) is respectively generating electricity
Press COM_P (1)-COM_P (X), COM_N (1)-COM_N (X).For example, operating circuit LVC (1) is generating voltage COM_P
(1), (1) COM_N, and operating circuit LVC (2) is to generate voltage COM_P (2), COM_N (2), and so on.
To keep narration clear, illustrated by taking operating circuit LVC (1) as an example below.Operating circuit LVC (2)-LVC (X) can
With the same or similar structure in (1) operating circuit LVC, so invention is not limited thereto.
In the present embodiment, operating circuit LVC (1) includes output circuit OTC, control circuit CTC1, CTC2 and scanning
Signal generating circuit SRC.In the present embodiment, output circuit OTC may include switch TS1-TS6.
It should be noted that switch of the present invention all can use thin film transistor (TFT) (thin film transistor, TFT) real
It is existing, however the switch and/or transistor of other types are also among the scope of the invention.In addition, though in the following description, owning
Switch is realized with n-type transistor, however in different embodiments, these switches can also be realized with p-type transistor, therefore this hair
It is bright not to be limited with following the description.
In the present embodiment, the first end of switch TS1 is electrically connected the voltage source of supply voltage VS1 and to receive supply
The second end of voltage VS1, switch TS1 is electrically connected the output end of voltage COM_P (1), and the control terminal of switch TS1 is receiving
The control signal CU (1) that control circuit CTC1 is generated.In one embodiment, switch TS1 to according to control signal CU (1) lead
It is logical, to provide supply voltage VS1 to the output end of (1) voltage COM_P, as the voltage COM_P with first voltage level
(1)。
In the present embodiment, the first end of switch TS2 is electrically connected the voltage source of supply voltage VS2 and to receive supply
The second end of voltage VS2, switch TS2 is electrically connected the output end of voltage COM_P (1), and the control terminal of switch TS2 is receiving
The control signal CD (1) that control circuit CTC2 is generated.In one embodiment, switch TS2 to according to control signal CD (1) lead
It is logical, to provide supply voltage VS2 to the output end of (1) voltage COM_P, as the voltage COM_P with second voltage level
(1)。
In the present embodiment, the first end of switch TS3 is electrically connected the voltage source of supply voltage VS3 and to receive supply
The second end of voltage VS3, switch TS3 is electrically connected the output end of voltage COM_P (1), and the control terminal of switch TS3 is receiving
The scanning signal Y (1) that generation circuit of scanning signals SRC is generated.In one embodiment, switch TS3 is to according to scanning signal Y
(1) it is connected, to provide supply voltage VS3 to the output end of (1) voltage COM_P, as the voltage with tertiary voltage level
COM_P(1)。
In the present embodiment, the first end of switch TS4 is electrically connected the voltage source of supply voltage VS2 and to receive supply
The second end of voltage VS2, switch TS4 is electrically connected the output end of voltage COM_N (1), and the control terminal of switch TS4 is receiving
The control signal CU (1) that control circuit CTC1 is generated.In one embodiment, switch TS4 to according to control signal CU (1) lead
It is logical, to provide supply voltage VS2 to the output end of (1) voltage COM_N, as the voltage COM_N with second voltage level
(1)。
In the present embodiment, the first end of switch TS5 is electrically connected the voltage source of supply voltage VS1 and to receive supply
The second end of voltage VS1, switch TS5 is electrically connected the output end of voltage COM_N (1), and the control terminal of switch TS5 is receiving
The control signal CD (1) that control circuit CTC2 is generated.In one embodiment, switch TS5 to according to control signal CD (1) lead
It is logical, to provide supply voltage VS1 to the output end of (1) voltage COM_N, as the voltage COM_N with first voltage level
(1)。
In the present embodiment, the first end of switch TS6 is electrically connected the voltage source of supply voltage VS3 and to receive supply
The second end of voltage VS3, switch TS6 is electrically connected the output end of voltage COM_N (1), and the control terminal of switch TS6 is receiving
The scanning signal Y (1) that generation circuit of scanning signals SRC is generated.In one embodiment, switch TS6 is to according to scanning signal Y
(1) it is connected, to provide supply voltage VS3 to the output end of (1) voltage COM_N, as the voltage with tertiary voltage level
COM_N(1).In some embodiments, switch TS6 can be omitted and be replaced with switch TS3.
With reference to Fig. 6, for according to the signal schematic representation of circuit for providing voltage shown in one embodiment of the invention.In the implementation
In example, the generation circuit of scanning signals SRC of operating circuit LVC (1)-LVC (X), which sequentially exports the scanning with high-voltage level, to be believed
Number Y (1)-Y (X) with switch TS3, TS6 of turn in order operating circuit LVC (1)-LVC (X), and makes voltage COM_P (1)-
COM_P (X), COM_N (1)-COM_N (X) sequentially have aforementioned tertiary voltage level.
In addition, in one embodiment, the control circuit CTC1 of operating circuit LVC (1)-LVC (X) is sequentially exported with high electricity
Control signal CU (1)-CU (X) of voltage level, with switch TS1, TS4 of turn in order operating circuit LVC (1)-LVC (X), and makes
Voltage COM_P (1)-COM_P (X) sequentially have aforementioned first voltage level, and make voltage COM_N (1)-COM_N (X) according to
Sequence has aforementioned second voltage level.
In addition, in one embodiment, the control circuit CTC2 of operating circuit LVC (1)-LVC (X) is sequentially exported with high electricity
Control signal CD (1)-CD (X) of voltage level, with switch TS2, TS5 of turn in order operating circuit LVC (1)-LVC (X), and makes
Voltage COM_P (1)-COM_P (X) sequentially have aforementioned second voltage level, and make voltage COM_N (1)-COM_N (X) according to
Sequence has aforementioned first voltage level.
To keep narration clear, electricity is generated with control circuit CTC1, CTC2 of operating circuit LVC (n) and scanning signal below
It is illustrated for the SRC of road.Other control circuits CTC1, CTC2 in operating circuit LVC (1)-LVC (X) and scanning signal production
Raw circuit SRC can have same or similar control circuit CTC1, CTC2 and scanning signal in operating circuit LVC (n) to generate electricity
The structure of road SRC, so invention is not limited thereto.
Fig. 7 is the schematic diagram according to the control circuit CTC1 of operating circuit LVC (n) shown in one embodiment of the invention.
In one embodiment, control circuit CTC1 includes output module OTM1 and control module CTM1.In the present embodiment, control module
CTM1 controls signal CU (n) to control output module OTM1 outputs.
In the present embodiment, output module OTM1 includes switch TO1, TO2 and capacitance C1.Control module CTM1 includes opening
Close T1-T5 and capacitance C2.
In the present embodiment, the first end of capacitance C2 is to receive clock pulse signal CK2, and the second end of capacitance C2 is electric
The first signal output end (calling node B in the following text) of property link control module CTM.
In the present embodiment, the first end of switch T1 is to receive previous stage control signal CU (n-1), and the of switch TO1
Two ends are electrically connected node B, and the control terminal of switch T1 is receiving clock pulse signal CK1.In the present embodiment, switch T1
To be connected according to clock pulse signal CK1, to provide previous stage control signal CU (n-1) to node B.
In the present embodiment, switch T2 first end be electrically connected supply voltage VGH (such as 8.5V) voltage source and to
The second end for receiving supply voltage VGH, switch T2 with first voltage level (such as high-voltage level) is electrically connected control mould
The second signal output end (calling node P in the following text) of block CTM, and the control terminal of switch T2 is receiving scanning signal Y (n).In this reality
It applies in example, switch T2 supplies voltage VGH to node P to be connected according to scanning signal Y (n), to provide.
In the present embodiment, the first end of switch T3 is electrically connected the voltage source of supply voltage VGL (such as -8V) and to connect
The second end for receiving supply voltage VGL, switch T3 is electrically connected node B, and the control terminal of switch T3 is to the electricity on receiving node P
Pressure.In the present embodiment, switch T3 is according to the voltage turn-on on node P, voltage VGL to node B is supplied to provide.
In the present embodiment, the first end of switch T4 is electrically connected the voltage source of supply voltage VGL and to receive supply
The second end of voltage VGL, switch T4 are electrically connected node P, and the control terminal of switch T4 is to the voltage on receiving node B.
In the present embodiment, switch T4 is according to the voltage turn-on on node B, voltage VGL to node P is supplied to provide.
In the present embodiment, the first end of switch T5 is electrically connected the voltage source of supply voltage VGH and has to receive
The second end of supply the voltage VGH, switch T5 of first voltage level (such as high-voltage level) are electrically connected node P, and switch T5
Control terminal to receiving node A (about node A will in then paragraph illustrate) on voltage.In the present embodiment, it switchs
T5 supplies voltage VGH to node P to be connected according to the voltage (such as high-voltage level) on node A, to provide.
In the present embodiment, capacitance C1 is electrically connected the output end of control signal CU (n), to maintain control signal CU (n)
Voltage level.
In the present embodiment, the first end of switch TO1 is electrically connected the voltage source of supply voltage VGH and to receive supply
The second end of voltage VGH, switch TO1 is electrically connected the output end of control signal CU (n), and the control terminal of switch TO1 is connecing
Receive the voltage on node B.In the present embodiment, switch TO1 is to according to the voltage turn-on on node B, to provide supply voltage
The output end of VGH to control signal CU (n), as the control signal CU (n) with first voltage level.
In the present embodiment, the first end of switch TO2 is electrically connected the voltage source of supply voltage VGL and to receive supply
The second end of voltage VGL, switch TO2 is electrically connected the output end of control signal CU (n), and the control terminal of switch TO2 is connecing
Receive the voltage on node P.In the present embodiment, switch TO2 is to according to the voltage turn-on on node P, to provide supply voltage
The output end of VGL to control signal CU (n), as the control signal CU (n) with second voltage level.
Fig. 8 is the schematic diagram according to the control circuit CTC2 of operating circuit LVC (n) shown in one embodiment of the invention.
In one embodiment, control circuit CTC2 includes output module OTM2 and control module CTM2.In the present embodiment, control module
CTM2 controls signal CD (n) to control output module OTM2 outputs.In the present embodiment, output module OTM2 and control module
CTM2 is similar to aforementioned output module OTM1 and control module CTM1 respectively, therefore similar part can refer to aforementioned paragraphs, herein
It does not repeat.
In the present embodiment, the first end of the switch T1 of control circuit CTC2 is to receive previous stage control signal CD (n-1),
And the second end of the switch T1 of control circuit CTC2 is electrically connected aforementioned nodes A.In addition, the control of the switch T5 of control circuit CTC2
End processed is the voltage on receiving node B.In addition, the control terminal of the switch TO2 of control circuit CTC2 is known as node R below.
Fig. 9 is showing according to the generation circuit of scanning signals SRC of operating circuit LVC (n) shown in one embodiment of the invention
It is intended to.In the present embodiment, generation circuit of scanning signals SRC includes switch TR1, TR2, capacitance C3.
In the present embodiment, capacitance C3 is electrically connected the output end of scanning signal Y (n), to maintain scanning signal Y's (n)
Voltage level.
In the present embodiment, the first end of switch TR1 is receiving grid signal G (8 × n-8), the second end of switch TR1
It is electrically connected the output end of scanning signal Y (n), and the control terminal of switch TR1 is receiving grid signal G (8 × n-8).At this
In embodiment, switch TR1 according to grid signal G (8 × n-8) to be connected, to provide grid signal G (8 × n-8) to scanning letter
The output end of number Y (n).
In the present embodiment, the first end of switch TR2 is electrically connected the voltage source of supply voltage VGL and to receive supply
The second end of voltage VGL, switch TR2 is electrically connected the output end of scanning signal Y (n), and the control terminal of switch TR2 is receiving
Grid signal G (8 × n).In the present embodiment, switch TR2 according to grid signal G (8 × n) to be connected, to provide supply electricity
Press the output end of VGL to scanning signal Y (n).
It should be noted that in different embodiments of the invention, the generation circuit of scanning signals of operating circuit LVC (1)-LVC (X)
SRC can utilize shift register to realize, therefore the present invention is not limited with above-described embodiment.
Below with reference to Figure 10, by providing an operation example to illustrate the details of some embodiments of the invention, however this hair
It is bright to be not limited.
In time point s1, the switch TR1 (with reference to Fig. 9) of generation circuit of scanning signals SRC is according to the grid of high-voltage level
Signal G (8 × n-8) is connected, to provide the output end of the grid signal G (8 × n-8) to scanning signal Y (n) of high-voltage level,
To charge to capacitance C3, to enable scanning signal Y (n) that there is high-voltage level.At this point, the switch of operating circuit LVC (n)
TS3 is connected according to the scanning signal Y (n) of high-voltage level, provides the output end of supply voltage VS3 to voltage COM_P (n), and
Make voltage COM_P (n) that there is tertiary voltage level.
At this point, the switch T2 of control circuit CTC1 is connected (with reference to Fig. 7) according to the scanning signal Y (n) of high-voltage level, with
Supply voltage VGH to node P is provided, so that switch TO2, T3 conducting of control circuit CTC1.At this point, switch TO2 provides supply
The output end of voltage VGL to control signal CU (n), and make control signal CU (n) that there is low voltage level.Also, switch T3 is carried
For supplying voltage VGL to node B, second as node B operates voltage.
At this point, the switch T2 of control circuit CTC2 is connected (with reference to Fig. 8) according to the scanning signal Y (n) of high-voltage level, with
Supply voltage VGH is provided to node R, so that switch TO2, T3 shutdown of control circuit CTC2.At this point, switch TO2 provides supply
The output end of voltage VGL to control signal CU (n), and make control signal CD (n) that there is low voltage level.Also, switch T3 is carried
For supplying voltage VGL to node A.
In time point s1 between time point s2, capacitance C3 maintains scanning signal Y (n) in high-voltage level, and makes switch
TS3 persistently provides the output end of supply voltage VS3 to voltage COM_P (n).Also, node P, R maintain supply voltage VGH, with
Keep switch TO2, T3 conducting of control circuit CTC1, CTC2.
In time point s2, the switch TR2 of generation circuit of scanning signals SRC according to the grid signal G of high-voltage level (8 ×
N) it is connected, to provide the output end of supply voltage VGL to scanning signal Y (n), to discharge capacitance C3, to enable scanning letter
Number Y (n) has low voltage level.
At this point, the switch T1 of control circuit CTC1 is connected (with reference to Fig. 7) according to clock pulse signal CK1, to provide high electricity
The control signal CU (n-1) to node B of voltage level, first as node B operates voltage.At this point, control circuit CTC1's opens
TO1 is closed according to the voltage turn-on on node B, to provide supply voltage VGH to the output end of control signal CU (n), and makes control
Signal CU (n) has high-voltage level.At this point, switch TS1 (with reference to Fig. 5) is led according to the control signal CU (n) of high-voltage level
It is logical, the output end of supply voltage VS1 to voltage COM_P (n) is provided, and make voltage COM_P (n) that there is first voltage level.
On the other hand, the switch T5 (with reference to Fig. 8) of control circuit CTC2 is according to voltage turn-on on node B, to provide supply
Voltage VGH is to node R.At this point, the switch TO2 of control circuit CTC2 is according to the voltage turn-on in node R, to provide supply voltage
The output end of VGL to control signal CD (n), and make control signal CD (n) that there is low voltage level.At this point, switch TS2 (references
Fig. 5) turned off according to the control signal CD (n) of low voltage level.In addition, the switch T3 of control circuit CTC2 is according in node R
Voltage turn-on supplies voltage VGL to node A to provide.
In time point s2 between time point s6, the switch T1 of control circuit CTC1 is interrupted according to clock pulse signal CK1
(such as in time point s4) is connected in ground, to be intermittently supplied with the control signal CU (n-1) to node B of high-voltage level, to enable node B
Keep high-voltage level.
In addition, in during this period, by the capacitance coupling effect of the capacitance C2 of control circuit CTC1, the voltage on node B
More it is changed (such as in time point s3, s5) according to clock pulse signal CK2, to be promoted to higher voltage level, to
The switch T1 of turn-on control circuit CTC1, to enable the capacitance C1 of control circuit CTC1 be able to charge, to maintain control signal
CU (n) is supply voltage VGH.
In addition, in during this period, the switch T4 of control circuit CTC1 is led according to the voltage on the node B of control circuit CTC1
It is logical, voltage VGL to node P is supplied to provide, so that the switch TO2 shutdowns of control circuit CTC1.
In addition, in during this period, the switch T5 (with reference to Fig. 8) of control circuit CTC2 is according to voltage turn-on on node B, to carry
For supply voltage VGH to node R.The switch T3 of control circuit CTC2 is according to the voltage turn-on in node R, to provide supply voltage
VGL to node A is supply voltage VGL to keep node A, to avoid the voltage on node A from changing with clock pulse signal CK2
Become.
It is connected according to clock pulse signal CK1 (with reference to Fig. 7) in the switch T1 of time point s6, control circuit CTC1, to carry
For the initial signal CST1 to node B of low voltage level, so that the switch TO1 of control circuit CTC1 is according to the voltage on node B
Shutdown.
In time point s6 between time point s7, the capacitance C1 of control circuit CTC1 maintains control signal CU (n) Yu Gao electricity
Voltage level, and switch TS1 is made persistently to provide the output end for supplying voltage VS1 to voltage COM_P (n).
It is similar at time point in the operation of time point s7, generation circuit of scanning signals SRC, control circuit CTC1, CTC2
The operation of s1 generation circuit of scanning signals SRC, control circuit CTC1, CTC2, therefore this will not be repeated here.
In time point s7 between time point s8, capacitance C3 maintains scanning signal Y (n) in high-voltage level, and makes switch
TS3 persistently provides the output end of supply voltage VS3 to voltage COM_P (n).Also, node P, R maintain supply voltage VGH, with
Keep switch TO2, T3 conducting of control circuit CTC1, CTC2.
It is similar in time point s2 generation circuit of scanning signals in the operation of time point s8, generation circuit of scanning signals SRC
The operation of SRC, therefore this will not be repeated here.
In addition, in time point s8, the operation of control circuit CTC2 is similar to operations of the control circuit CTC1 in time point s2,
And the operation of control circuit CTC1 is similar to operations of the control circuit CTC2 in time point s2, therefore this will not be repeated here.
In time point s8 between time point s9, the operation of control circuit CTC2 is similar to control circuit CTC1 at time point
S2 is to the operation between time point s6, and the operation of control circuit CTC1 is similar to control circuit CTC2 in time point s2 to time
Operation between point s6, therefore this will not be repeated here.
In time point s10, the operation of control circuit CTC2 is similar to operations of the control circuit CTC1 in time point s6, therefore
This is not repeated.
In time point s10 between time point s11, the capacitance C1 of control circuit CTC2 maintains control signal CD (n) in height
Voltage level, and switch TS2 is made persistently to provide the output end for supplying voltage VS2 to voltage COM_P (n).
After time point s11, control circuit CTC1, control circuit CTC2 and generation circuit of scanning signals SRC repeat
Time point s1 is to the operation between time point s11, therefore this will not be repeated here.
On the other hand, in above-mentioned time point s1 between time point s11, the switch TS4-TS6 of operating circuit LVC (n) is also
It is operated according to control signal CU (n), CD (n) and scanning signal Y (n), to export the voltage in contrast to voltage COM_P (n)
COM_N(n).It can understand with reference to above description about this part operation and know, therefore this will not be repeated here.
By above-mentioned operation, control circuit CTC1 can delayed control signal CU (n-1) scanning signal Y (n) phase
Between (i.e. the time difference of time point s1 and time point s2), with output control signal CU (n), and control circuit CTC2 can postpone to control
During scanning signal Y (n) of signal CD (n-1) (i.e. the time difference of time point s7 and time point s8), with output control letter
Number CD (n).
Therefore, it is provided to secondary one by by the control signal CU (n-1) of previous stage operating circuit LVC (n-1), CD (n-1)
Control circuit CTC1, CTC2 of level work circuit LVC (n), control circuit CTC1, CTC2 of operating circuit LVC (1)-LVC (X)
It can sequentially postpone and export control signal CU (1)-CU (X), CD (1)-CD (X) with high-voltage level, to control voltage
The output of COM_P (1)-COM_P (X), COM_N (1)-COM_N (X).
On the other hand, by above-mentioned operation, control circuit CTC1 can for a long time (such as time point s2 to time point s6 it
Between) keep control signal CU (n) for supply voltage VGH, and control circuit CTC2 can be for a long time (such as in time point s8 to time point
Between s9) to keep control signal CD (n) be supply voltage VGH to avoid operating mistake caused by due to electric leakage.
In one embodiment, odd level circuit (such as operating circuit LVC (1), the LVC in operating circuit LVC (1)-LVC (X)
(3), LVC (5) etc.) the control terminal of switch T1 of control circuit CTC1, CTC2 can receive clock pulse signal CK1, capacitance
First end can receive clock pulse signal CK2 (in the present embodiment, n is odd number), and in operating circuit LVC (1)-LVC (X)
The control of the switch T1 of control circuit CTC1, CTC2 of even level circuit (such as operating circuit LVC (2), LVC (4), LVC (6))
End can receive clock pulse signal CK2, the first end of capacitance can receive clock pulse signal CK1, however the present invention not as
Limit.
Figure 11-13 is respectively according to operating circuit LVC (n), operating circuit LVC (n) shown in another embodiment of the present invention
Control circuit CTC1 and operating circuit LVC (n) control circuit CTC2 schematic diagram.In the present embodiment, operating circuit
LVC (n) further includes switch TCN1-TCN4.In the present embodiment, other in operating circuit LVC (1)-operating circuit LVC (X)
Person can also have the structure similar to operating circuit LVC (n), and but not limited to this.
In the present embodiment, switch TCN1-TCN4, according to control signal CN conductings, uses to receive control signal CN
Control voltage COM_P (n), voltage COM_N (n).For example, when display device 100 is narrow viewing angle pattern, control signal CN has
Low voltage level, and switch TCN1-TCN4 is made to turn off.When display device 100 is wide viewing angle pattern, control signal CN has height
Voltage level, and switch TCN1-TCN4 is made to be connected, with the voltage for enabling operating circuit LVC (1)-operating circuit LVC (X) provide
COM_P (n)-COM_P (X), COM_N (n)-COM_N (X) are all supply voltage VS3.
Figure 14 is the schematic diagram according to the control circuit CTC1 of operating circuit LVC (n) shown in another embodiment of the present invention.
In the present embodiment, control circuit CTC1 further includes switch TV1-TV4 and capacitance CV1.In the present embodiment, switch TV1 is electrical
It is connected between the voltage source of voltage VDD and switch TV2, and to according to the voltage turn-on on node B.Switch TV2 electrically connects
It is connected between switch TV1 and the second end of capacitance C2, and to according to voltage VDD.Capacitance CV1 is electrically connected at node B and connects
Between ground voltage.Switch TV3 is electrically connected between the voltage source of voltage VGH and the first end of switch T3, and to according to electricity
Hold the voltage turn-on in the second end of C2.Switch TV4 be electrically connected at the voltage source of voltage VGL and switch TO2 first end it
Between, and to according to the voltage turn-on on node P.By so set, the electric leakage in control circuit CTC1 can be prevented.
It should be noted that the control circuit CTC1 of other persons in operating circuit LVC (1)-operating circuit LVC (X) can also have
There is the setting of the control circuit CTC1 similar to operating circuit LVC (n), and in operating circuit LVC (1)-operating circuit LVC (X)
Control circuit CTC2 also can have similar to operating circuit LVC (n) control circuit CTC1 setting, so the present invention not with this
It is limited.
Certainly, the present invention can also have other various embodiments, without deviating from the spirit and substance of the present invention, ripe
It knows those skilled in the art and makes various corresponding change and deformations, but these corresponding changes and change in accordance with the present invention
Shape should all belong to the protection domain of appended claims of the invention.
Claims (12)
1. a kind of circuit for providing voltage, which is characterized in that including：
One output circuit；And
One first control circuit is electrically connected the output circuit, to provide one first control with a first voltage level
Voltage is to the output circuit, and to enable the output circuit export one first supply voltage according to this, the wherein first control circuit includes：
One output module, including an output end；And
One control module, according to one first clock pulse signal, to provide one first operation voltage to one first running node,
To enable the output module according to the first operation voltage in first running node, being somebody's turn to do with the first voltage level is provided
First control voltage to the output end,
And the wherein control module is more according to scan signal, to provide one first operating voltage to one first working node,
To enable the output module according to first operating voltage on first working node, being somebody's turn to do with a second voltage level is provided
First controls voltage to the output end.
2. circuit for providing voltage as described in claim 1, which is characterized in that wherein the control module is more to according to one second
Clock pulse signal changes the first operation voltage in first running node, to enable the output module according to first behaviour
Make the first operation voltage after changing on node, maintains the first control voltage on the output end.
3. circuit for providing voltage as described in claim 1, which is characterized in that wherein the control module more to according to this first
First operating voltage on working node provides one second operation voltage to first running node.
4. circuit for providing voltage as described in claim 1, which is characterized in that wherein the control module more to according to this first
The first operation voltage in running node, provides one second operating voltage to first working node.
5. circuit for providing voltage as described in claim 1, which is characterized in that further include：
One second control circuit is electrically connected the output circuit, according to first clock pulse signal, to provide third behaviour
Make voltage to one second running node, and according in second running node the third operate voltage, provide with this first
One third of voltage level controls voltage to the output circuit, and voltage is supplied to enable the output circuit export one second according to this,
In this second supply voltage voltage level be different from this first supply voltage voltage level.
6. circuit for providing voltage as claimed in claim 5, which is characterized in that wherein the control module more to according to this second
The third in running node operates voltage, provides first operating voltage to first working node.
7. circuit for providing voltage as described in claim 1, which is characterized in that further include：
Scan signal provides circuit, is electrically connected the output circuit, to provide the scanning signal to the output circuit, to enable
The output circuit exports third supply voltage according to this, and the voltage level of wherein third supply voltage is different from first supply
The voltage level of voltage.
8. circuit for providing voltage as described in claim 1, which is characterized in that wherein the control module includes：
One first switch, according to first clock pulse signal, to provide the first operation voltage to first running node；
One second switch, according to the scanning signal, to provide first operating voltage to first working node；
One third switchs, according to first operating voltage on first working node, to provide one second operation voltage extremely
First running node；And
One the 4th switch, according to the first operation voltage in first running node, to provide one second operating voltage extremely
First working node.
9. circuit for providing voltage as claimed in claim 8, which is characterized in that wherein the control module further includes：
One the 5th switch provides first operating voltage extremely to operate voltage according to the third in one second running node
First working node.
10. circuit for providing voltage as described in claim 1, which is characterized in that wherein the control module includes：
One operation of capacitor, wherein a first end of the operation of capacitor are receiving a second clock pulse signal, the operation of capacitor
A second end be electrically connected first working node, and the operation of capacitor is enabling first behaviour in first running node
Make voltage according to the second clock pulse signal to be changed.
11. a kind of circuit for providing voltage, which is characterized in that including：
One output circuit；
One first control circuit is electrically connected the output circuit, according to scan signal, selectively to provide one first control
Voltage processed is to the output circuit, to enable the output circuit export one first supply voltage according to this；
One second control circuit is electrically connected the output circuit, according to the scanning signal, selectively to provide one second control
Voltage processed is to the output circuit, to enable the output circuit export one second supply voltage according to this；And
Scan signal provides circuit, is electrically connected the output circuit, to provide the scanning signal to the output circuit, to enable
The output circuit exports third supply voltage according to this；
The voltage level of wherein the first supply voltage, the second supply voltage and third supply voltage is different from each other, and its
In the output circuit in export this first supply voltage and this second supply voltage between export the third supply voltage.
12. a kind of control circuit, which is characterized in that including：
One first end of one first output switch, wherein the first output switch has the one of a first voltage level to receive
One second end of the first control voltage, the first output switch is electrically connected an output end, and a control of the first output switch
End processed is electrically connected one first running node；
One second exports switch, and a first end of wherein the second output switch has being somebody's turn to do for a second voltage level to receive
One second end of the first control voltage, the second output switch is electrically connected the output end, and a control of the second output switch
End processed is electrically connected one first working node；
One first switch, wherein a first end of the first switch to receive one first operation voltage, the one of the first switch
Second end is electrically connected first running node, and a control terminal of the first switch is believed to receive one first clock pulses
Number；
One second switch, wherein a first end of the second switch are to receive one first operating voltage, and the one of the second switch
Second end is electrically connected first working node, and a control terminal of the second switch is receiving scan signal；
One third switch, wherein the third switch a first end to receive one second operation voltage, the third switch one
Second end is electrically connected first running node, and a control terminal of the second switch is electrically connected first working node；
One the 4th switch, a first end of the wherein the 4th switch is to receive one second operating voltage, and the one of the 4th switch
Second end is electrically connected first working node, and a control terminal of the 4th switch is electrically connected first running node；With
And
One operation of capacitor, wherein a first end of the operation of capacitor are receiving the second clock pulse signal, the operation of capacitor
A second end be electrically connected first working node.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW107109495 | 2018-03-20 | ||
| TW107109495A TWI657430B (en) | 2018-03-20 | 2018-03-20 | Voltage providing circuit and control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108630161A true CN108630161A (en) | 2018-10-09 |
| CN108630161B CN108630161B (en) | 2020-10-16 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810435316.1A Active CN108630161B (en) | 2018-03-20 | 2018-05-08 | Voltage supply circuit and control circuit |
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| CN (1) | CN108630161B (en) |
| TW (1) | TWI657430B (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US10726807B2 (en) | 2018-10-09 | 2020-07-28 | Au Optronics Corporation | Display apparatus |
| US10854126B1 (en) | 2019-05-23 | 2020-12-01 | Au Optronics Corp. | Display device and VCOM signal generation circuit |
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| JPH04182694A (en) * | 1990-11-19 | 1992-06-30 | Nippondenso Co Ltd | Liquid crystal display device |
| US5561442A (en) * | 1993-04-01 | 1996-10-01 | Sharp Kabushiki Kaisha | Method and circuit for driving a display device |
| CN1658275A (en) * | 2005-04-07 | 2005-08-24 | 友达光电股份有限公司 | Gamma voltage generator liquid crystal display and control method for liquid crystal device |
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| US8836621B2 (en) * | 2004-12-15 | 2014-09-16 | Nlt Technologies, Ltd. | Liquid crystal display apparatus, driving method for same, and driving circuit for same |
| TWI407399B (en) * | 2009-06-18 | 2013-09-01 | Au Optronics Corp | Display panels |
| KR101170241B1 (en) * | 2010-06-03 | 2012-07-31 | 하이디스 테크놀로지 주식회사 | Driving circuit for electric paper display and display device |
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| JPH04182694A (en) * | 1990-11-19 | 1992-06-30 | Nippondenso Co Ltd | Liquid crystal display device |
| US5561442A (en) * | 1993-04-01 | 1996-10-01 | Sharp Kabushiki Kaisha | Method and circuit for driving a display device |
| CN1658275A (en) * | 2005-04-07 | 2005-08-24 | 友达光电股份有限公司 | Gamma voltage generator liquid crystal display and control method for liquid crystal device |
| CN1917031A (en) * | 2006-04-07 | 2007-02-21 | 友达光电股份有限公司 | Shift register and its driving method |
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| US10726807B2 (en) | 2018-10-09 | 2020-07-28 | Au Optronics Corporation | Display apparatus |
| US10854126B1 (en) | 2019-05-23 | 2020-12-01 | Au Optronics Corp. | Display device and VCOM signal generation circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108630161B (en) | 2020-10-16 |
| TWI657430B (en) | 2019-04-21 |
| TW201941181A (en) | 2019-10-16 |
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