CN108628020B - Array substrate and display device - Google Patents
Array substrate and display device Download PDFInfo
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- CN108628020B CN108628020B CN201810500502.9A CN201810500502A CN108628020B CN 108628020 B CN108628020 B CN 108628020B CN 201810500502 A CN201810500502 A CN 201810500502A CN 108628020 B CN108628020 B CN 108628020B
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/13338—Input devices, e.g. touch panels
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/40—OLEDs integrated with touch screens
Abstract
The invention discloses an array substrate and a display device, wherein first fan-out leads electrically connected with touch signal lines are arranged in the same layer, so that the uniformity of the resistance of each first fan-out lead after being electrically connected with the corresponding touch signal line is effectively ensured, the problem of nonuniform display caused by the fact that the resistance of each first fan-out lead after being electrically connected with the corresponding touch signal line is inconsistent is avoided, and the display quality of a picture is improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate and a display device.
Background
The types of the existing displays include a Liquid Crystal Display (LCD) and an Organic electroluminescent Display (OLED), wherein the LCD is a non-self-luminous Display, and a backlight module is required to provide a backlight source to realize a Display function, so that the development of the LCD in the aspects of ultra-thin and ultra-light is limited; the OLED display is a self-luminous display, so that a backlight module is not needed, and the OLED display has great development advantages in the aspects of ultrathin property and ultra-light property.
For the liquid crystal display with a touch function, the liquid crystal display can be generally divided into an embedded touch display and an external-attached touch display, for the embedded touch display, touch electrodes are usually arranged inside the display, that is, common electrodes can be reused as the touch electrodes, each touch electrode is correspondingly provided with a touch signal line, the touch signal lines are electrically connected with fan-out lead wires of a fan-out area, and the display and touch functions are respectively realized in a time-sharing display mode; however, in order to ensure uniform internal shape and uniform resistance distribution of the touch electrodes, a dummy touch signal line is generally disposed in the display region, and the dummy touch signal line is not electrically connected to the fan-out lead of the fan-out region; therefore, in the fan-out area, the fan-out leads electrically connected to the touch signal lines may be in different layers, that is, the fan-out leads electrically connected to the touch signal lines are not in the same layer, which causes inconsistent resistance of the fan-out leads electrically connected to the touch signal lines, thereby easily causing non-uniformity in display during display.
Therefore, the technical problem to be solved by those skilled in the art needs to be solved to solve the problem of non-uniform display by ensuring that the resistances of the fan-out leads electrically connected to the touch signal lines are consistent.
Disclosure of Invention
The embodiment of the invention provides an array substrate and a display device, which are used for ensuring that the resistance of fan-out leads electrically connected with touch signal lines is consistent and solving the problem of nonuniform display.
An embodiment of the present invention provides an array substrate, including:
a display area and a non-display area surrounding the display area;
the display area comprises a common electrode, and the common electrode comprises a plurality of touch electrodes arranged in an array;
the display area further comprises touch signal lines which are correspondingly and electrically connected with the touch electrodes, and the touch signal lines are arranged on the same layer;
the non-display area comprises a fan-out area, the fan-out area comprises a plurality of fan-out leads, the fan-out leads comprise a plurality of first fan-out leads, and each first fan-out lead is electrically connected with one touch signal line;
the plurality of first fan-out leads are arranged on the same layer, and the plurality of first fan-out leads and the plurality of touch signal lines are arranged on different layers.
The first fan-out leads electrically connected with the touch signal lines are arranged in the same layer, so that the uniformity of the resistance of each first fan-out lead electrically connected with the corresponding touch signal line is effectively ensured, the problem of non-uniform display in the display process due to the fact that the resistance of each first fan-out lead electrically connected with the corresponding touch signal line is inconsistent is avoided, and the display quality of the picture is improved.
Optionally, the display area further comprises:
a plurality of data lines;
the fan-out lead further comprises a plurality of second fan-out leads, and each second fan-out lead is electrically connected with one data line;
the fan-out region comprises a first sub-region;
within the first sub-region:
in the direction perpendicular to the plane of the array substrate, any two adjacent fan-out leads are not mutually overlapped;
at least two adjacent second fan-out leads are arranged in different layers between two adjacent first fan-out leads.
Therefore, the occupied area of the fan-out area can be effectively reduced, the occupied area of the non-display area is further reduced, and the design of a narrow frame is facilitated; in addition, the distance between two adjacent fan-out leads can be effectively increased, the problem of short circuit is reduced, and mutual interference caused by short circuit is avoided.
Optionally, the first fan-out lead includes a first sub-first fan-out lead and a second sub-first fan-out lead; within the first sub-region:
there is an odd number of pairs of adjacent fan-out leads disposed in a same layer between the adjacent first and second sub-first fan-out leads.
Thus, it may be advantageous to achieve that the first fan-out leads are located in the same layer.
Optionally, there are an even number of second fan-out lead sets between adjacent first and second sub-first fan-out leads;
two second fan-out leads which are adjacent to each other between the adjacent second fan-out lead groups are arranged on the same layer;
each second fan-out lead group comprises three second fan-out leads which are arranged in an adjacent and alternate different layer, and the second fan-out lead groups are mutually independent.
Therefore, normal display is guaranteed, the display effect is not affected, and meanwhile the fact that the first fan-out leads are located on the same layer is facilitated.
Optionally, the display area further comprises: a virtual touch signal line provided on the same layer as the touch signal line;
three adjacent data lines form a data line subgroup;
the touch signal lines or the virtual touch signal lines are arranged between the data line subgroups.
Therefore, the distribution uniformity of the resistance of the touch electrode is balanced.
Optionally, the arrangement between the touch signal lines and the data line subgroup is the same as the arrangement between the first fan-out lead lines and the second fan-out lead line group.
Therefore, the electric connection and the manufacture of the touch signal line and the first fan-out lead wire and the electric connection and the manufacture of the data line and the second fan-out lead wire are facilitated, the manufacturing process of the array substrate is simplified, and the structural complexity of the array substrate is simplified.
Optionally, all the virtual touch signal lines are located between two adjacent touch signal lines; or the like, or, alternatively,
the virtual touch signal lines are dispersed among the touch signal lines.
Therefore, the relative positions of the touch signal lines and the virtual touch signal lines can be set according to actual structural requirements, and the touch display panel has strong flexibility in structural design.
Optionally, the adjacent first sub-first fan-out lead and the second sub-first fan-out lead are electrically connected to different touch electrodes through the touch signal line, respectively.
Therefore, the touch position is detected through the touch electrode.
Optionally, the display area further comprises: a transistor;
each first fan-out lead is made of the same material as a source/drain electrode in the transistor and is arranged on the same layer; or the like, or, alternatively,
and each first fan-out lead is made of the same material as the grid electrode in the transistor and is arranged on the same layer.
Therefore, the manufacturing process of the array substrate can be simplified, and the manufacturing difficulty is reduced.
On the other hand, an embodiment of the present invention further provides a display device, including: a display panel;
the display panel includes: the array substrate provided by the embodiment of the invention.
The invention has the following beneficial effects:
according to the array substrate and the display device provided by the embodiment of the invention, the first fan-out leads electrically connected with the touch signal lines are arranged in the same layer, so that the uniformity of the resistance of each first fan-out lead after being electrically connected with the corresponding touch signal line is effectively ensured, the problem of nonuniform display in the display process caused by the inconsistent resistance of each first fan-out lead after being electrically connected with the corresponding touch signal line is avoided, and the display quality of a picture is improved.
Drawings
Fig. 1 is a schematic structural diagram of an array substrate in the prior art;
fig. 2 is a schematic structural diagram of an array substrate according to an embodiment of the present invention;
FIGS. 3 and 4 are taken along X in FIG. 21-X1A sectional view in the direction of;
FIGS. 5 and 6 are taken along X in FIG. 22-X2A sectional view in the direction of;
FIG. 7 is a view taken along X in FIG. 23-X3A sectional view in the direction of;
FIGS. 8 to 12 are views taken along Y in FIG. 21-Y1A sectional view in the direction of;
fig. 13 is a second schematic structural diagram of an array substrate according to an embodiment of the invention;
FIG. 14 is a view taken along X in FIG. 134-X4A sectional view in the direction of;
fig. 15 is a third schematic structural diagram of an array substrate according to an embodiment of the invention;
fig. 16 is a partially enlarged view of a solid-line box s in fig. 2;
fig. 17 is a schematic structural diagram of a display device provided in an embodiment of the present invention.
Detailed Description
Embodiments of an array substrate and a display device according to embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The inventors found in their research that, as the array substrate shown in fig. 1, in which fig. 1 only shows a partial structure, the array substrate includes: a display area AA and a fan-out area Fanout; the display area AA includes: data lines (sparse black dot filled regions) Data, touch signal lines (horizontal line filled regions) TP and virtual touch signal lines (diagonal line filled regions) DTP; the Data line Data, the touch signal line TP and the virtual touch signal line DTP are made of the same material and are arranged in the same layer as a source/drain electrode of a transistor (not shown); the three adjacent Data lines Data are in one group, the touch signal lines TP or the virtual touch signal lines DTP are located between the groups, and all the virtual touch signal lines DTP are located between the two adjacent touch signal lines TP (i.e., a and b); the fan-out region Fanout includes: a first fan-out lead and a second fan-out lead; the first fan-out lead is correspondingly and electrically connected with the touch signal line TP, and the Data line Data is correspondingly and electrically connected with the second fan-out lead; in the fan-out region Fanout, any two adjacent fan-out leads are arranged in different layers, so that short circuit caused by the fact that the adjacent fan-out leads are close to each other is avoided, and mutual interference between the adjacent fan-out leads is avoided.
However, the virtual touch signal line DTP exists only in the display area AA, and a fan-out lead electrically connected to the virtual touch signal line DTP is not provided in the fan-out area Fanout. Therefore, when there are odd number of virtual touch signal lines DTP between two adjacent touch signal lines TP in the display area AA, as shown in fig. 1, there is a possibility that all the first fan-out leads are not in the same layer in the fan-out area Fanout, corresponding to 5 lines.
For example, referring to fig. 1, for two first fan-out leads marked as a and b, there are 5 virtual touch signal lines between the touch signal lines electrically connected to a and b, respectively, so in the fan-out region Fanout, according to the rule that two adjacent fan-out leads are arranged in different layers, then a and b are not necessarily located in the same layer.
Therefore, a resistance after being electrically connected to a corresponding touch signal line and a resistance after being electrically connected to a corresponding touch signal line are caused to be inconsistent with each other, so that when the touch electrodes are multiplexed as common electrodes, there is a difference in display signals input to the respective common electrodes due to the inconsistency in the resistances, thereby causing a problem of display non-uniformity.
Accordingly, embodiments of the present invention provide an array substrate to solve the problem of non-uniform display caused by different first fan-out leads in the same layer.
Specifically, an array substrate according to an embodiment of the present invention is shown in fig. 2 to 16, where fig. 3 and fig. 4 are respectively along X in fig. 21-X1Sectional views in the direction of, FIGS. 5 and 6 are taken along the line X in FIG. 22-X2A sectional view in the direction of' and FIG. 7 is a view taken along the line X in FIG. 23-X3Sectional views in the direction of, FIGS. 8 to 12 are taken along the Y in FIG. 21-Y1A sectional view in the direction of' FIG. 14 is taken along the line X in FIG. 134-X4In the sectional view shown in the direction' fig. 16 is a partially enlarged view of the solid line frame s in fig. 2.
The array substrate may include:
a display area A and a non-display area surrounding the display area A;
the display area A comprises a common electrode which comprises a plurality of touch electrodes k arranged in an array;
the display area a may further include touch signal lines 10 (see the bold solid lines in the display area a in fig. 2, 13 and 15) electrically connected to the touch electrodes K, and the touch signal lines 10 are disposed on the same layer (see fig. 3 and 4);
the non-display area includes: a fan-out area F comprising: a plurality of fan-out leads, the fan-out leads comprising: a plurality of first fan-out leads (see solid bold lines in the fan-out region F in fig. 2, 13 and 15, such as F1-a, F1-b, F1-c and F1-d), each of which is electrically connected to one of the touch signal lines 10;
the plurality of first fan-out leads are disposed on the same layer as shown in fig. 5 to 7 and 14, and the plurality of first fan-out leads are disposed on different layers from the plurality of touch signal lines 10 (see fig. 8 to 10).
In the embodiment of the invention, the first fan-out leads (such as F1-a, F1-b, F1-c and F1-d) electrically connected with the touch signal lines 10 are arranged in the same layer, so that the uniformity of the resistance of each first fan-out lead after being electrically connected with the corresponding touch signal line 10 is effectively ensured, the problem of non-uniform display in the display process caused by the fact that the resistance of each first fan-out lead after being electrically connected with the corresponding touch signal line 10 is avoided, and the display quality of a picture is improved.
Optionally, in order to implement the display function, in the embodiment of the present invention, as shown in fig. 2, 13, and 15, the display area a may further include: a plurality of data lines 20; also, the display region a may further include a gate line G crossing the data line 20, and a plurality of pixel regions for display may be defined by the data line 20 and the gate line G.
The fan-out lead further includes: a plurality of second fan-out leads, for example, the fan-out leads except for F1-a, F1-b, F1-c and F1-d in the fan-out region F in fig. 2, 13 and 15 are second fan-out leads, each of which is electrically connected to one data line 20, that is, one second fan-out lead is disposed in one-to-one correspondence with and electrically connected to one data line 20, so that the second fan-out lead transmits a data signal provided by a processing chip (e.g., an IC) to each data line 20;
the fan-out region F includes: a first sub-zone F0, within the first sub-zone F0: in order to avoid the short circuit phenomenon caused by the close distance between two adjacent fan-out leads and influence on signal transmission, any two adjacent fan-out leads are not mutually overlapped in the direction perpendicular to the plane of the array substrate, and at least part of two adjacent second fan-out leads are arranged in different layers between two adjacent first fan-out leads.
For example, as shown in fig. 5 and 6, in the direction perpendicular to the plane of the array substrate, between two first fan-out leads marked as F1-c and F1-d, respectively, except for the second fan-out leads in the dashed boxes 1 and 2, two adjacent second fan-out leads are arranged in different layers; for another example, as shown in fig. 7, in the direction perpendicular to the plane of the array substrate, between two first fan-out leads respectively labeled as F1-b and F1-c, except for the second fan-out leads within the dashed frames 3 to 5, two adjacent second fan-out leads are arranged in different layers; for another example, as shown in fig. 14, two adjacent second fan-out leads are arranged in different layers between two first fan-out leads respectively marked as F1-b and F1-c in the direction perpendicular to the plane of the array substrate.
Therefore, the occupied area of the fan-out area can be effectively reduced, the occupied area of the non-display area is further reduced, and the design of a narrow frame is facilitated; in addition, the distance between at least two adjacent second fan-out leads can be effectively increased, the problem of short circuit is reduced, and mutual interference caused by short circuit is avoided.
Of course, in order to implement the display function, in the embodiment of the present invention, the display area a may further include: a transistor T (shown in fig. 16); if the array substrate is an array substrate in a liquid crystal display panel, the gate of the transistor T is usually electrically connected to the gate line G, the source is electrically connected to the data line 20, and the drain is electrically connected to the pixel electrode p disposed in the pixel region; if the array substrate is an array substrate in an electroluminescent display panel, the transistor may be located in a pixel driving circuit, not shown, and the pixel driving circuit drives the light emitting unit to implement a display function.
Therefore, in specific implementation, based on the arrangement of the transistor T, when the first fan-out leads are arranged, the first fan-out leads and the source/drain electrodes in the transistor may be made of the same material and arranged in the same layer; in conjunction with fig. 4 and 10, fig. 4 shows a film layer where the touch signal line 10 is located between the source/drain and the gate in the transistor, and fig. 10 shows a film layer where the first fan-out lead F1-b is located immediately above the film layer where the touch signal line 10 is located, so according to the structure shown in fig. 4, it can be understood that: at this time, the first fan-out lead and the source/drain of the transistor are made of the same material and are disposed in the same layer, and the touch signal line 10 is electrically connected to the first fan-out lead F1-b through a via hole.
Optionally, each first fan-out lead may be made of the same material as the gate in the transistor and disposed on the same layer; referring to fig. 4 and 12, fig. 4 shows a film layer of the touch signal line 10 between the source/drain and the gate of the transistor, and fig. 12 shows a film layer of the first fan-out lead F1-b and a film layer of the touch signal line 10 spaced apart from each other, so that according to the structure shown in fig. 4, it can be understood that: at this time, the first fan-out lead and the gate in the transistor are made of the same material and are arranged in the same layer, and the touch signal line 10 is electrically connected with the first fan-out lead F1-b through a via hole.
Optionally, each first fan-out lead may also be made of the same material as the touch electrode and arranged in the same layer; see fig. 9 and 11; at this time, the touch signal line 10 is electrically connected to the first fan-out lead F1-b through the via hole.
Optionally, each first fan-out lead may also be located in a film layer between a source/drain and a gate in the transistor; with reference to fig. 3 and 8, fig. 3 shows that the touch signal line 10 and the source/drain of the transistor are made of the same material and disposed on the same layer, and fig. 8 shows that the first fan-out lead F1-b is located on a film layer immediately below the touch signal line 10, so according to the structure shown in fig. 3, it can be understood that: the first fan-out lead is now located in the film layer between the source/drain and the gate in the transistor. And the touch signal line 10 is electrically connected with the first fan-out lead F1-b through a via hole.
Specifically, in the embodiment of the present invention, since the first fan-out lead is disposed in a different layer from the touch signal line 10, when the touch signal line 10 is disposed in a same layer as the source/drain of the transistor (as shown in fig. 3), the first fan-out lead may be disposed in a same layer as the gate of the transistor (not shown), may be disposed in a same layer as the touch electrode K (as shown in fig. 9), and may also be disposed in a film layer between the source/drain and the gate of the transistor (as shown in fig. 3 and 8).
If the touch signal line 10 is disposed on the same layer as the touch electrode (not shown), or if the touch signal line 10 is disposed on a film layer above the touch electrode (as shown in fig. 15), the first fan-out lead may be disposed on the same layer as the gate of the transistor (not shown), may be disposed on the same layer as the source/drain of the transistor (not shown), or may be disposed on a film layer between the source/drain and the gate of the transistor (not shown).
If the touch signal line 10 is located in a film layer between the source/drain and the gate of the transistor (as shown in fig. 4), the first fan-out lead may be made of the same material and disposed in the same layer as the gate of the transistor (as shown in fig. 4 and 12), may be made of the same material and disposed in the same layer as the source/drain of the transistor (as shown in fig. 4 and 10), or may be made of the same material and disposed in the same layer as the touch electrode K (as shown in fig. 11).
Of course, the above description is only for illustrating the different layer arrangement of the touch signal line 10 and the first fan-out lead, and the specific position arrangement is not limited thereto, and may also be other structures that can implement the different layer arrangement of the touch signal line 10 and the first fan-out lead, and is not limited herein. Through the arrangement mode, the first fan-out lead can be manufactured simultaneously when the transistor or the touch electrode K is manufactured, so that the manufacturing process of the array substrate can be simplified, and the manufacturing difficulty is reduced.
Although the first fan-out lead needs to be disposed on a layer different from the touch signal line 10 in the foregoing description, it should be noted that, in specific implementation, in consideration of a manufacturing process, the first fan-out lead and the touch signal line 10 may also be disposed on the same layer, that is, the first fan-out lead and the touch signal line 10 are made of the same material and disposed on the same layer, so that each first fan-out lead may be also ensured to be located on the same layer, and further, the resistance of each first fan-out lead after being electrically connected to the corresponding touch signal line 10 is kept consistent, thereby ensuring uniformity of a display screen and improving a display effect.
In a specific implementation, in order to enable the first fan-out leads to be located in the same layer, the following arrangement is possible. Optionally, in an embodiment of the present invention, the first fan-out lead includes: a first sub-first fan-out lead and a second sub-first fan-out lead, within the first sub-region F0: there is an odd number of pairs of adjacent fan-out leads disposed in a same layer between adjacent first and second sub-first fan-out leads.
It should be noted that, in the embodiment of the present invention, taking the structure shown in fig. 7 as an example, here, "between the adjacent first sub-first fan-out lead and the second sub-first fan-out lead" may be understood as: includes a first sub-first fan-out lead F1-b and a second sub-first fan-out lead F1-c; thus, for an odd pair of adjacent fan-out lead peer arrangements between adjacent first and second sub-first fan-out leads F1-b and F1-c, it can be understood that: two adjacent second fan-out leads are arranged in the same layer, or the adjacent second fan-out leads are arranged in the same layer with the first sub-fan-out leads F1-b, or the adjacent second fan-out leads are arranged in the same layer with the second sub-fan-out leads F1-c.
However, in any of the above three cases, it is beneficial to realize that each first fan-out lead is located in the same layer as long as it can be ensured that there are odd pairs of two adjacent fan-out leads (for example, the dashed boxes 1 and 2 in fig. 5 and 6, or the dashed boxes 3 to 5 in fig. 7), and therefore, no specific limitation is made herein. It should be noted that fig. 5 to fig. 7 are only examples, and do not show that in the array substrate provided in the embodiment of the present invention, only 1 pair or 3 pairs of adjacent two fan-out leads are disposed in the same layer between the adjacent first sub-first fan-out lead and the second sub-first fan-out lead, and in a specific implementation, the number of pairs of the same layer needs to be set according to an actual need, so that the present invention is not limited thereto.
Optionally, in the embodiment of the present invention, the following may also be set: in the first sub-region F0, any adjacent first fan-out lead and second fan-out lead are arranged in different layers, so as to avoid mutual interference caused by the close distance between the adjacent first fan-out lead and second fan-out lead; at this time, in the first sub-region F0, between the adjacent first sub-first fan-out lead and the second sub-first fan-out lead, except for the first sub-first fan-out lead and the second sub-first fan-out lead, there are an odd number of pairs of adjacent two second fan-out leads arranged in the same layer, so that the occupied area of the fan-out region is reduced, and at the same time, the mutual interference between the adjacent first fan-out lead and the second fan-out lead is avoided.
In specific implementation, in the embodiment of the present invention, the display area a not only includes the data line 20 and the touch signal line 10, but also includes: a virtual touch signal line 30 disposed on the same layer as the touch signal line 10, and the touch signal line 10, the virtual touch signal line 30, and the data line 20 may be disposed in parallel, as shown in fig. 2, 13, and 15; moreover, when a pixel unit is composed of three sub-pixel units, each sub-pixel unit is electrically connected with one data line 20, so that three adjacent data lines 20 can form a data line group to ensure normal display of a picture; the touch signal lines 10 or the dummy touch signal lines 30 are disposed between the data line subgroups, thereby being advantageous to balance the uniformity of the distribution of the resistance of the touch electrodes electrically connected to the touch signal lines 10.
However, as shown in fig. 2, since the virtual touch signal line 30 exists in the display area a, and the fan-out lead line correspondingly connected to the virtual touch signal line 30 is not disposed in the fan-out area of the virtual touch signal line 30, the position corresponding to the virtual touch signal line 30 is vacant in the fan-out area, that is, a certain gap L exists between the second fan-out lead lines correspondingly connected to the two data lines 20 adjacent to the virtual touch signal line 301And the gap L1Is larger than the gap L between the corresponding second fan-out leads of the two adjacent data lines 202Is also larger than the second electrically connected data line 20 and the touch signal line 10Spacing L between two fan-out leads and first fan-out lead3。
Therefore, in order to avoid mutual interference caused by short circuit between adjacent fan-out leads while being beneficial to realizing that the first fan-out leads are positioned in the same layer, in the embodiment of the invention, as shown in fig. 2 and 15, when an even number of second fan-out lead groups are arranged between the adjacent first sub-first fan-out leads F1-c and second sub-first fan-out leads F1-d, two second fan-out leads which are adjacent to each other between the adjacent second fan-out lead groups are arranged in the same layer, as shown by a dashed box 1 in fig. 5 and as shown by dashed boxes 3 to 5 in fig. 7; each second fan-out lead group comprises three second fan-out leads which are arranged adjacently and alternately in different layers, and the second fan-out lead groups are mutually independent. Therefore, normal display is guaranteed, the display effect is not affected, and meanwhile the fact that the first fan-out leads are located on the same layer is facilitated.
In addition, referring to the structure shown in fig. 14, when there are 5 second fan-out lead groups between F1-b and F1-c, and on the basis of ensuring that the two adjacent fan-out leads are arranged in different layers as much as possible, each first fan-out lead is also in the same film layer, so that, at this time, between F1-b and F1-c, it is not necessary to arrange odd pairs of adjacent fan-out leads in the same layer, as long as any two adjacent fan-out leads are arranged in different layers.
In specific implementation, in the embodiment of the present invention, as shown in fig. 2, 13 and 15, the arrangement between the touch signal line 10 and the data line group and the arrangement between the first fan-out lead group and the second fan-out lead group are the same. By the arrangement, the electric connection and the manufacture of the touch signal line 10 and the first fan-out lead and the electric connection and the manufacture of the data line 20 and the second fan-out lead are facilitated, the manufacturing process of the array substrate is simplified, and the structural complexity of the array substrate is simplified.
For example, as shown in fig. 2, 13 and 15, in the display area a, three adjacent data lines 20 form a data line subgroup, and the touch signal lines 10 are dispersed among the data line subgroups; in the fan-out area, three adjacent second fan-out leads are a lead group, the first fan-out leads are dispersed among the lead groups, and the relative positions and relative arrangement modes of the data line group and the touch signal line 10 in the display area a are the same as those of the lead group and the first fan-out lead in the fan-out area, so that the complexity of the array substrate is simplified.
In addition, in the embodiment of the present invention, since the virtual touch signal line 30 exists in the display area a, when the relative position relationship between the virtual touch signal line 30 and the touch signal line 10 is set, the following two arrangement manners may be adopted:
in the first arrangement, as shown in fig. 13, all the virtual touch signal lines 30 are located between two adjacent touch signal lines 10, that is, all the virtual touch signal lines 30 in the display area a are disposed between two adjacent touch signal lines 10; for example, all of the virtual touch signal lines 30 are located between F1-b and F1-c. By the arrangement, the structure of the array substrate can be simplified, the complexity is reduced, and the manufacturing difficulty is reduced. It should be noted that, although fig. 13 only shows 4 virtual touch signal lines 30, it does not indicate that the actual structure of the array substrate only includes 4 virtual touch signal lines 30, and fig. 13 only illustrates the relative position structure between the virtual touch signal lines 30 and the touch signal lines 10. It should be noted that, as shown in fig. 13, in the extending direction of the virtual touch signal lines 30, one virtual touch signal line 30 is composed of a plurality of spaced conducting lines.
In the second arrangement, as shown in fig. 2 and 15, the virtual touch signal lines 30 are distributed among the touch signal lines 10, that is, the arrangement does not arrange all the virtual touch signal lines 30 in one area as in the first arrangement, but distributes the virtual touch signal lines 30; however, when the virtual touch signal lines 30 are dispersedly disposed, the degree and form of the dispersion are not limited, and may be any form other than the structures shown in fig. 2 and 15, and is not limited herein. Due to the arrangement, the structural arrangement of the touch electrode electrically connected with the touch signal line 10 and the wiring of the touch signal line 10 are facilitated, so that the arrangement of the touch electrode is uniform, and the accuracy of touch detection is improved; in addition, the relative positions between the touch signal lines 10 and the virtual touch signal lines 30 can be set according to the actual structural requirements, so that the touch display panel has strong flexibility in structural design.
In specific implementation, in order to implement the touch detection function, in the embodiment of the present invention, as shown in fig. 2, 13 and 15, since the touch electrodes K are divided by the common electrode, the touch electrodes K are arranged in an array, and the touch electrodes K are insulated from each other; each touch electrode K is electrically connected with a touch detection chip (such as an IC) through a touch signal line 10 and a corresponding first fan-out lead, so as to detect a capacitance value on the touch electrode K; the adjacent first sub-first fan-out lead and the second sub-first fan-out lead are also electrically connected with different touch electrodes through the touch signal line 10, so that the touch position is detected through the touch electrodes.
Specifically, the display panel with touch function can be generally classified into an embedded type and an external type, wherein the embedded type display panel is to dispose the touch electrode inside the display panel, for example, the touch electrode is disposed on the array substrate, so that the thickness of the display panel can be reduced, the thin design is facilitated, the structure of the display panel can be simplified, and the array substrate provided in the embodiment of the present invention belongs to the embedded type.
Moreover, when the touch function is realized, in the embodiment of the invention, the touch detection can be realized by utilizing the touch detection principle of the self-capacitance; the touch detection principle of the self-capacitance is as follows: when a human body does not touch the screen, the capacitance borne by each touch electrode is a fixed value, when the human body touches the screen, the capacitance borne by the corresponding touch electrode is the fixed value and is superposed with the human body capacitance, and the touch position can be judged by the touch detection chip by detecting the capacitance value change of each touch electrode in the touch time period, so that touch detection is realized.
In addition, in order to avoid mutual interference between the display function and the touch function of the display panel and achieve touch detection while displaying normally, generally, a time-sharing driving method may be adopted, that is, one frame time is divided into a touch time period and a display time period, the data signal and the gate line signal only operate in the display time period, and the touch signal only operates in the touch time period.
Specifically, at least one row of touch electrodes can be divided into one touch scanning area, so that a plurality of touch scanning areas can be divided; then, when the grid lines covered by part of the touch scanning area are scanned line by line, the touch electrodes in the touch scanning area are used for loading display signals; and the touch electrodes in the rest touch scanning areas are used for loading touch detection signals, so that the time-sharing operation of touch control and display is realized, the mutual interference of touch control and display is avoided, the display panel can be ensured to have the touch control and display functions at the same time, and the user experience is greatly improved.
Based on the same inventive concept, an embodiment of the present invention further provides a display device, as shown in fig. 17, which may include: a display panel m; the display panel m may include: the array substrate provided by the embodiment of the invention.
In specific implementation, in the embodiment of the present invention, the display panel may be a liquid crystal display panel, an electronic paper display panel, or an electroluminescent display panel; wherein, when the display panel can be a liquid crystal display panel, the display panel further comprises: an opposite substrate opposite to the array substrate, and a liquid crystal between the array substrate and the opposite substrate; when the display panel is an electroluminescent display panel, the display panel further includes: and a package substrate disposed opposite to the array substrate.
In summary, according to the array substrate and the display device provided by the embodiments of the invention, the first fan-out leads electrically connected to the touch signal lines are arranged in the same layer, so that the uniformity of the resistance of each first fan-out lead after electrically connected to the corresponding touch signal line is effectively ensured, the problem of non-uniform display caused by the non-uniform resistance of each first fan-out lead after electrically connected to the corresponding touch signal line is avoided, and the display quality of the image is improved.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (9)
1. An array substrate, comprising:
a display area and a non-display area surrounding the display area;
the display area comprises a common electrode, and the common electrode comprises a plurality of touch electrodes arranged in an array;
the display area further comprises touch signal lines which are correspondingly and electrically connected with the touch electrodes, and the touch signal lines are arranged on the same layer;
the non-display area comprises a fan-out area, the fan-out area comprises a plurality of fan-out leads, the fan-out leads comprise a plurality of first fan-out leads, and each first fan-out lead is electrically connected with one touch signal line;
the plurality of first fan-out leads are arranged on the same layer, and the plurality of first fan-out leads and the plurality of touch signal lines are arranged on different layers;
the display area further includes:
a plurality of data lines;
the fan-out lead further comprises a plurality of second fan-out leads, and each second fan-out lead is electrically connected with one data line;
the fan-out region comprises a first sub-region;
within the first sub-region:
in the direction perpendicular to the plane of the array substrate, any two adjacent fan-out leads are not mutually overlapped;
at least two adjacent second fan-out leads are arranged in different layers between two adjacent first fan-out leads.
2. The array substrate of claim 1, wherein the first fan-out lead comprises a first sub-first fan-out lead and a second sub-first fan-out lead;
within the first sub-region:
there is an odd number of pairs of adjacent fan-out leads disposed in a same layer between the adjacent first and second sub-first fan-out leads.
3. The array substrate of claim 2,
a second set of fan-out leads extending from the second end of the second fan-out lead to the first end of the second fan-out lead;
two second fan-out leads which are adjacent to each other between the adjacent second fan-out lead groups are arranged on the same layer;
each second fan-out lead group comprises three second fan-out leads which are arranged in an adjacent and alternate different layer, and the second fan-out lead groups are mutually independent.
4. The array substrate of claim 1, wherein the display area further comprises: a virtual touch signal line provided on the same layer as the touch signal line;
three adjacent data lines form a data line subgroup;
the touch signal lines or the virtual touch signal lines are arranged between the data line subgroups.
5. The array substrate of claim 4, wherein the touch signal lines and the small groups of data lines are arranged in the same manner as the first fan-out lead lines and the second fan-out lead lines.
6. The array substrate of claim 4, wherein all of the virtual touch signal lines are located between two adjacent touch signal lines; or the like, or, alternatively,
the virtual touch signal lines are dispersed among the touch signal lines.
7. The array substrate of claim 2,
the adjacent first sub-first fan-out lead and the second sub-first fan-out lead are electrically connected with different touch electrodes through the touch signal line respectively.
8. The array substrate of any one of claims 1-7, wherein the display area further comprises: a transistor;
each first fan-out lead is made of the same material as a source/drain electrode in the transistor and is arranged on the same layer; or the like, or, alternatively,
and each first fan-out lead is made of the same material as the grid electrode in the transistor and is arranged on the same layer.
9. A display device, comprising: a display panel;
the display panel includes: the array substrate according to any one of claims 1 to 8.
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| CN109300396B (en) * | 2018-10-23 | 2021-06-01 | Oppo（重庆）智能科技有限公司 | Display panel, display screen assembly and electronic device |
| CN109449169B (en) * | 2018-12-06 | 2021-04-13 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method thereof and display device |
| CN110412802A (en) * | 2019-06-27 | 2019-11-05 | 厦门天马微电子有限公司 | Display panel and display device |
| CN114706243B (en) * | 2022-04-27 | 2024-02-20 | 厦门天马微电子有限公司 | Array substrate, display panel and display device |
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