CN108599866A - A kind of transmission rate 25Gbps high-speed light receivers - Google Patents
A kind of transmission rate 25Gbps high-speed light receivers Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
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- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/60—Receivers
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Abstract
The present invention relates to Fibre Optical Communication Technologies, more particularly to a kind of transmission rate 25Gbps high-speed light receivers, including inputting photo-signal, including trans-impedance amplifier, Dummy, first order limiting amplifier, second level limiting amplifier, output buffer stage and DC drift eliminator；Trans-impedance amplifier is separately connected input photo-signal, Dummy and first order limiting amplifier, Dummy connection first order limiting amplifiers, first order limiting amplifier connects second level limiting amplifier, second level limiting amplifier is separately connected output buffer stage and DC drift eliminator, DC drift eliminator are connect with trans-impedance amplifier and Dummy respectively.The input of the receiver uses the form of pseudo-differential, reduces common-mode noise, eliminates the upset generated due to lead coupling, improves sensitivity and the stability of circuit；And obtain larger output voltage swing；And circuit remains to keep a smaller direct current offset when input current is larger so that the dynamic range of circuit is increased.
Description
Technical field
The invention belongs to technical field of optical fiber communication more particularly to a kind of transmission rate 25Gbps high-speed light receivers.
Background technology
Fiber optic communications bandwidth is big, and message capacity is big, and good in anti-interference performance, overall cost is low, is the certainty side of Communication Development
To.With the development of the diversified communication requirement such as cloud storage, big data, Internet of Things, the bandwidth of fiber optic communication is continuously improved, high speed
The development of fibre system is extremely urgent.In typical optical fiber letter system, optical sender is responsible for the generation of optical signal, hair
It penetrates, fiber channel is responsible for the transmission of optical signal, and photoreceiver is then responsible for the reception of optical signal, including at opto-electronic conversion, electric signal
Reason and data-signal restore.As the key modules of fiber optic communication, photoreceiver has emphatically entire optical fiber telecommunications system
The influence wanted.
Photoreceiver is broadly divided into three classes.The first kind is opto-electronic device photoreceiver, usually by demultiplexing device and spy
It is integrated to survey device array, constitutes multichannel wavelength division multiplexing photoreceiver.Second class is hybrid integrated photoreceiver, usually different
Signal processing chip and photodetector are manufactured on substrate respectively, is then bonded by metal lead wire or flip chip bonding, this
It is also current widely used integration mode.Third class is then monolithic integrated photoreceiver, usually by photodetector and signal
Processing chip integrates, i.e., interconnection in chip.
The design of photoreceiver generally comprises trans-impedance amplifier, post-amplifier, output buffer and auxiliary circuit.Light
Receiver usually requires a sufficiently large bandwidth to meet the needs of data transmission, but bandwidth is excessive usually to will increase noise
Accumulation, influence the sensitivity of photoreceiver；Photoreceiver can generally also use the technology of some increase bandwidth, example in design
Such as capacitance degeneracy technology, inductor peaking technology, but this kind of technology would generally make larger point there are one gain-bandwidth curves
Peak.Limiting amplifier and automatic growth control are most common two classes photoreceiver structures, and usual limiting amplifier structure possesses
Preferable output voltage swing, and automatic growth control structure possesses the preferable linearity.So when designing photoreceiver, need
Compromise to gain, bandwidth, noise, sensitivity, power consumption, the linearity, dynamic range etc..
Invention content
Improving gain bandwidth the object of the present invention is to provide one kind and reduce noise, possess preferable sensitivity and compared with
Big output voltage swing also extends the photoreceiver of the dynamic range of circuit.
For the purpose for realizing above-mentioned, the technical solution adopted by the present invention is：A kind of transmission rate 25Gbps high speed light-receivings
Machine, including input photo-signal, including trans-impedance amplifier, Dummy, first order limiting amplifier, second level limiting amplifier,
Export buffer stage and DC drift eliminator；Trans-impedance amplifier is separately connected input photo-signal, Dummy and first order limit
Width amplifier, Dummy connection first order limiting amplifiers, first order limiting amplifier connection second level limiting amplifier, second
Grade limiting amplifier is separately connected output buffer stage and DC drift eliminator, DC drift eliminator are put with across resistance respectively
Big device is connected with Dummy.
In above-mentioned transmission rate 25Gbps high-speed light receivers, trans-impedance amplifier circuit includes transistor Q1、Q2, electricity
Hinder R1、R2, feedback resistance RF；Transistor Q1Base stage and feedback resistance RFIt is connected, and accesses input current Iin, emitter ground connection, collection
Electrode and resistance R1With transistor Q2Base stage be connected；Resistance R1Another termination input voltage VCC；Transistor Q2Emitter and resistance
R2With feedback resistance RFIt is connected, collector accesses input voltage VCC, base stage output forward voltage signal VOUTN1；Resistance R2The other end
Ground connection.
In above-mentioned transmission rate 25Gbps high-speed light receivers, Dummy circuits include transistor Q3、Q4, resistance R3、
R4, feedback resistance RF2, transistor Q3Base stage and feedback resistance RF2It is connected, emitter is grounded, collector and resistance R3With transistor Q4
Base stage be connected；Resistance R3Another termination input voltage VCC, transistor Q4Emitter and resistance R4With feedback resistance RF2It is connected, collection
Electrode meets input voltage VCC, base stage output DC voltage reference signal VOUTP1；Resistance R4The other end is grounded.
In above-mentioned transmission rate 25Gbps high-speed light receivers, first order limiting amplifier includes transistor Q5、Q6、
Q7、Q8、Q9、Q10、Q11、Q12, resistance R5、R6、R7、R8、R9、R10, feedback resistance RF3、RF4；Transistor Q5Base stage accesses forward voltage
Signal VOUTN1, collector and feedback resistance RF3With transistor Q7Base stage be connected, emitter and transistor Q12Collector, Q6
Emitter be connected；Q6Base stage meets DC voltage reference signal VOUTP1, collector and resistance RF4With transistor Q8Base stage be connected
It connects, emitter and transistor Q12Collector, Q5Emitter be connected；Transistor Q11, Q12As tail current electricity is provided to circuit
Stream, emitter respectively with resistance R9、R10Be connected, collector respectively with Q7、Q8、Q5、Q6It is connected；Transistor Q7、Q8Collector
Respectively with resistance R7, R8It is connected；Resistance R7、R8The other end and transistor Q9、Q10、R5、R6It is connected；Voltage VDDIt is input to resistance
R5、R6And transistor Q9、Q10Collector；Transistor Q9、Q10Emitter and feedback resistance RF3、RF4Line connects；Transistor
Q9Base stage output reverse voltage signal VOUTP2, transistor Q10Base stage output forward voltage signal VOUTN2；Second level amplitude limit is put
Big device includes transistor Q13~Q20, resistance R11~R16, feedback resistance RF5、RF6, structure is identical as first order limiting amplifier,
Transistor Q17Base stage output reverse voltage signal VOUTP3, transistor Q18Base stage output forward voltage signal VOUTN3。
In above-mentioned transmission rate 25Gbps high-speed light receivers, output buffer includes transistor Q21、Q22、Q23、
Q24；Transistor Q21、Q22Base stage be respectively connected to forward voltage signal VOUTN3, reverse voltage signal VOUTP3, emitter and resistance
R19And transistor Q23、Q24Collector be connected, collector and resistance R17、R18It is connected and exports reverse voltage signal
VOUTP, forward voltage signal VOUTN；Voltage VDDIt is input to resistance R17With R18。
In above-mentioned transmission rate 25Gbps high-speed light receivers, DC drift eliminator includes transistor M1、M2、
M3、M4、M5、M6、M7、M8、M9、M10、M11、M12, resistance R20、R21、R22、R23And capacitance C1、C2、C3；Forward voltage signal VOUTN3
With reverse voltage signal VOUTP3Pass through resistance R respectively20Capacitance C1And resistance R21Capacitance C2After the low-pass filter of composition, input
To transistor M3With M4Grid；Signal passes through transistor M1、M2、R22、M3、M4、M5And M6The amplifier of composition；Pass through the void of amplifier
Short and void is disconnected, locks two input voltages；Then, signal flows through transistor M7、M8、M9And M10The current mirror network of composition, passes through
Current mirror amplifies the electric current of two branches, by the difference of electric current with voltage VoffsetForm output, voltage VoffsetIt exports to crystalline substance
Body pipe M11With M12Grid to generate offset cancellation current Ioffset1With Ioffset2, transistor M11、M12Drain electrode respectively with crystalline substance
Body pipe Q1、Q3Base stage connects.
Beneficial effects of the present invention：Input uses the form of pseudo-differential, reduces common-mode noise, eliminates and drawn due to interior
The upset that line coupling generates, improves sensitivity and the stability of circuit；Post-amplifier uses Cherry-Hooper amplitude limits
Amplifier obtains larger output voltage swing；Buffer is differential configuration, and the load resistance of 50 ohm of cooperation makes circuit drive
It being capable of unattenuated signal amplitude when dynamic 50 ohm load；DC drift eliminator makes circuit be remained to when input current is larger
Keep a smaller direct current offset so that the dynamic range of circuit increases.
Description of the drawings
Fig. 1 is a kind of circuit diagram of the high-speed light receiver of transmission rate 25Gbps of one embodiment of the invention；Its
In, Fig. 1 (a) is the present embodiment trans-impedance amplifier and Dummy circuit diagrams, and Fig. 1 (b) is this practicality example first order limited range enlargement
Device circuit diagram, Fig. 1 (c) are this practicality example second level clipping amplifier circuit schematic diagram, and Fig. 1 (d) exports for this practicality example
Buffer stage circuit diagram, Fig. 1 (e) are this practicality example DC drift eliminator schematic diagram；
Fig. 2 is the vertical view of the main channel EM electromagnetic simulation models of one embodiment of the invention；
Fig. 3 is the 3-D view of the main channel EM electromagnetic simulation models of one embodiment of the invention；
Fig. 4 (a) is the gain-bandwidth simulation curve of one embodiment of the invention, and Fig. 4 (b) is one embodiment of the invention
Output reflection coefficient simulation curve；
Fig. 5 is the output eye pattern when inputting 25Gbps pseudo-random signals of one embodiment of the invention.
Specific implementation mode
Embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.
The present embodiment is achieved through the following technical solutions, a kind of high-speed light receiver of transmission rate 25Gbps,
Disappear including trans-impedance amplifier, Dummy, first order limiting amplifier, second level limiting amplifier, output buffer stage, direct current offset
Except circuit；
Trans-impedance amplifier access input photo-signal IinWith offset cancellation current Ioffset1, by the output of photodetector
Current signal is converted into voltage signal, and is tentatively amplified, and exports as forward voltage signal VOUTN1；
Dummy accesses offset cancellation current Ioffset2, export as DC voltage reference signal VOUTP1；
First order limiting amplifier, access forward voltage signal VOUTN1With DC voltage reference signal VOUTP1, voltage is believed
It number is further amplified, output one end is forward voltage signal VOUTN2, the other end is reverse voltage signal VOUTP2；
Second level limiting amplifier, access forward voltage signal VOUTN2With reverse voltage signal VOUTP2, by voltage signal into
One step is amplified, and the input voltage signal of Larger Dynamic range is carried out limited range enlargement, make output signal suitable dynamic range it
Between, and the bandwidth of circuit is expanded, output one end is forward voltage signal VOUTN3, the other end is reverse voltage signal VOUTP3；
Output buffer stage is responsible for making output voltage to reach suitable output voltage swing, and is carried out with 50 Ω resistance of rear end
Match, access forward voltage signal VOUTN3With reverse voltage signal VOUTP3, one section of output is forward voltage signal VOUTN, the other end is
Reverse voltage signal VOUTP；
DC drift eliminator accesses forward voltage signal VOUTN3With reverse voltage signal VOUTP3, detect limited range enlargement
The direct current offset of device difference output end generates control voltage by amplifier, the input of trans-impedance amplifier is adjusted, to eliminate direct current
Electric current I is eliminated in offset, outputoffset；
Moreover, trans-impedance amplifier circuit includes transistor Q1、Q2, resistance R1、RF、R2.Transistor Q1Base stage and feedback resistance
RFIt is connected, and accesses input current Iin, emitter ground connection, collector and resistance R1With transistor Q2Base stage be connected.Resistance R1Separately
One termination input voltage VCC.Transistor Q2Emitter and resistance R2And RFIt is connected, collector accesses voltage VCC, base stage output forward direction
Voltage signal VOUTN1.Resistance R2The other end is grounded.
Moreover, Dummy circuits include transistor Q3、Q4, resistance R3、RF2、R4.Transistor Q3Base stage and feedback resistance RF2Phase
Even, emitter ground connection, collector and resistance R3With transistor Q4Base stage be connected.Resistance R3Another termination input voltage VCC.Crystal
Pipe Q4Emitter and resistance R4And RF2It is connected, collector accesses voltage VCC, base stage output DC voltage reference signal VOUTP1.Resistance
R4The other end is grounded.
Moreover, first order limiting amplifier includes transistor Q5、Q6、Q7、Q8、Q9、Q10、Q11、Q12, resistance R5、R6、R7、R8、
R9、R10、RF3、RF4.Transistor Q5Base stage accesses forward voltage signal VOUTN1, collector and resistance RF3With transistor Q7Base stage
It is connected, emitter and transistor Q12Collector, Q6Emitter be connected.Q11, Q12As tail current electricity is provided to circuit
Stream, emitter respectively with resistance R9、R10Be connected, collector respectively with Q7、Q8、Q5、Q6It is connected.Q7、Q8Collector respectively with
R7, R8It is connected.R7、R8The other end and Q9、Q10、R5、R6It is connected.Voltage VDDIt is input to R5、R6、Q9Collector, Q10Collection
Electrode.Q9、Q10Emitter and feedback resistance RF3、RF4Line connects.Export reverse voltage signal VOUTP2By transistor Q9Base stage
It draws, forward voltage signal VOUTN2By transistor Q10Base stage draw.Second level limiting amplifier includes transistor Q13~Q20,
Resistance R11~R16、RF5、RF6, structure is consistent with first order limiting amplifier.
Moreover, output buffer includes transistor Q21、Q22、Q23、Q24.Transistor Q21、Q22Base stage be respectively connected to forward direction
Voltage signal VOUTN3, reverse voltage signal VOUTP3, emitter and resistance R19And transistor Q23、Q24Collector be connected,
Collector and resistance R17、R18It is connected and exports forward voltage signal VOUTP, reverse voltage signal VOUTN.Voltage VDDIt is input to electricity
Hinder R17With R18。
Moreover, DC drift eliminator includes transistor M1、M2、M3、M4、M5、M6、M7、M8、M9、M10、M11、M12, resistance
R20、R21、R22、R23And capacitance C1、C2、C3.Forward voltage signal VOUTN3With reverse voltage signal VOUTP3Pass through respectively by resistance
R20Capacitance C1And resistance R21Capacitance C2After the low-pass filter of composition, it is input to transistor M3With M4Grid.Signal passes through
M1、M2、R22、M3、M4、M5And M6The amplifier of composition.It is mainly short disconnected with void by the void of amplifier, lock two input voltages.So
Afterwards, signal flows through M7、M8、M9And M10The current mirror network of composition amplifies the electric current of two branches by current mirror, and will be electric
The difference of stream exports in the form of a voltage.This output voltage is exactly Voffset。VoffsetIt exports to transistor M11With M12Grid
To generate offset cancellation current Ioffset1With Ioffset2, reach the function of direct current offset elimination.
When it is implemented, as shown in Figure 1, a kind of high-speed light receiver of transmission rate 25Gbps include trans-impedance amplifier,
Dummy, first order limiting amplifier, second level limiting amplifier, output buffer stage, DC drift eliminator.Amplify across resistance
Device trans-impedance amplifier converts the output current signal of photodetector to voltage signal, exports as forward voltage signal VOUTN1；
Dummy accesses offset cancellation current, exports as DC voltage reference signal VOUTP1；First order limiting amplifier accesses positive electricity
Press signal VOUTN1With DC voltage reference signal VOUTP1, output forward voltage signal VOUTN2And reverse voltage signal VOUTP2；The
Two level limiting amplifier, access forward voltage signal VOUTN2With reverse voltage signal VOUTP2, export as forward voltage signal VOUTN3
And reverse voltage signal VOUTP3；Output buffer stage is responsible for that 50 Ω resistance of output voltage rear end is made to be matched, and accesses positive electricity
Press signal VOUTN3With reverse voltage signal VOUTP3, export as forward voltage signal VOUTNWith reverse voltage signal VOUTP；Direct current is inclined
It moves and eliminates circuit access forward voltage signal VOUTNWith reverse voltage signal VOUTP, output elimination electric current.
Also, trans-impedance amplifier circuit includes transistor Q1、Q2, resistance R1、RF、R2.Transistor Q1Base stage and feedback resistance
RFIt is connected, and accesses input current Iin, emitter ground connection, collector and resistance R1With transistor Q2Base stage be connected.Resistance R1Separately
One termination input voltage VCC.Transistor Q2Emitter and resistance R2And RFIt is connected, collector accesses voltage VCC, base stage is to export just
To voltage signal VOUTN1.Resistance R2The other end is grounded.
Also, Dummy circuits include transistor Q3、Q4, resistance R3、RF2、R4.Transistor Q3Base stage and feedback resistance RF2Phase
Even, emitter ground connection, collector and resistance R3With transistor Q4Base stage be connected.Resistance R3Another termination input voltage VCC.Crystal
Pipe Q4Emitter and resistance R4And RF2It is connected, collector accesses voltage VCC, base stage is output DC voltage reference signal VOUTP1.Electricity
Hinder R4The other end is grounded.
Also, first order limiting amplifier includes transistor Q5、Q6、Q7、Q8、Q9、Q10、Q11、Q12, resistance R5、R6、R7、R8、
R9、R10、RF3、RF4.Transistor Q5Base stage accesses forward voltage signal VOUTN1, collector and resistance RF3With transistor Q7Base stage
It is connected, emitter and transistor Q12Collector, Q6Emitter be connected.Q11, Q12As tail current electricity is provided to circuit
Stream, emitter respectively with resistance R9、R10Be connected, collector respectively with Q7、Q8、Q5、Q6It is connected.Q7、Q8Collector respectively with
R7, R8It is connected.R7、R8The other end and Q9、Q10、R5、R6It is connected.Voltage VDDIt is input to R5、R6、Q9Collector, Q10Collection
Electrode.Q9、Q10Emitter and feedback resistance RF3、RF4Line connects.Export reverse voltage signal VOUTP2By transistor Q9Base stage
It draws, forward voltage signal VOUTN2By transistor Q10Base stage draw.Second level limiting amplifier includes transistor Q13~Q20,
Resistance R11~R16、RF5、RF6, structure is consistent with first order limiting amplifier.
Also, output buffer includes transistor Q21、Q22、Q23、Q24.Transistor Q21、Q22Base stage be respectively connected to forward direction
Voltage signal VOUTN3, reverse voltage signal VOUTP3, emitter and resistance R19And transistor Q23、Q24Collector be connected,
Collector and resistance R17、R18It is connected and exports reverse voltage signal VOUTP, forward voltage signal VOUTN.Voltage VDDIt is input to electricity
Hinder R17With R18。
Also, DC drift eliminator includes transistor M1、M2、M3、M4、M5、M6、M7、M8、M9、M10、M11、M12, resistance
R20、R21、R22、R23And capacitance C1、C2、C3.Forward voltage signal VOUTN3With reverse voltage signal VOUTP3Pass through respectively by resistance
R20Capacitance C1And resistance R21Capacitance C2After the low-pass filter of composition, it is input to transistor M3With M4Grid.Signal passes through
M1、M2、R22、M3、M4、M5And M6The amplifier of composition.It is mainly short disconnected with void by the void of amplifier, lock two input voltages.So
Afterwards, signal flows through M7、M8、M9And M10The current mirror network of composition amplifies the electric current of two branches by current mirror, and will be electric
The difference of stream exports in the form of a voltage.This output voltage is exactly Voffset。VoffsetIt exports to transistor M11With M12Grid
To generate offset cancellation current Ioffset1With Ioffset2, reach the function of direct current offset elimination.
The operation principle of the present embodiment is as follows：Photo-signal inputs trans-impedance amplifier, is converted into voltage signal and carries out
Certain amplification, and export composition artifact sub-signal with Dummy and be input to first order limiting amplifier；First order limiting amplifier
Voltage signal is further amplified, second level limiting amplifier is then input to；Second level limiting amplifier will move greatly
The input voltage signal of state range carries out limited range enlargement, makes output signal between suitable dynamic range, later that signal is defeated
Go out to output buffer stage；Output buffer stage is then responsible for making output voltage to reach suitable output voltage swing, and with 50 ohm of rear end electricity
Resistance is matched.DC drift eliminator monitors the direct current offset of limiting amplifier difference output end, passes through operational amplifier
It generates control voltage and then controls the offset cancellation current of photoreceiver input terminal, the input of trans-impedance amplifier is adjusted, to disappear
Except direct current offset expands dynamic range.
The high-speed light receiver of the present embodiment includes transistor Q1、Q2, resistance R1、RF、R2The trans-impedance amplifier of composition, crystal
Pipe Q3、Q4, resistance R3、RF2、R4The Dummy of composition, transistor Q5、Q6、Q7、Q8、Q9、Q10、Q11、Q12, resistance R5、R6、R7、R8、
R9、R10、RF3、RF4The first order limiting amplifier of composition, transistor Q21、Q22、Q23、Q24The output buffer stage of composition, transistor
M1、M2、M3、M4、M5、M6、M7、M8、M9、M10、M11、M12, resistance R20、R21、R22、R23And capacitance C1、C2、C3The direct current of composition is inclined
It moves and eliminates circuit.
First order circuit of the trans-impedance amplifier as photoreceiver, will come from the output current of photodetector
On the one hand reason carries out the conversion of dimension, i.e. current signal is converted to voltage signal, on the other hand into the amplification of line amplitude.Meanwhile
The equivalent input noise current for efficiently reducing input terminal, improves the sensory characteristic of photoreceiver, and with Dummy circuits
The input for forming pseudo-differential together, reduces common-mode noise, while reducing the influence generated due to lead coupling, improves
The stability and sensory characteristic of circuit.The output end of TIA modules and Dummy modules, in Q1The collector of pipe.Select the point
As output end, there are three advantages：First, Q1The ac small signal gain of pipe is slightly above Q2Pipe, improves the small-signal gain of circuit；
Second is that Q1The collector DC level of pipe is higher than Q2The emitter DC level of pipe, facilitates the selection of dc point, effectively drives
Rear class differential limiting amplifier：Third, the reference input noise for rear class has inhibiting effect, if with Q2The emitter of pipe is made
For output end, then rear class input noise can pass through feedback resistance feedthrough to input terminal, introduce big noise, if selecting Q1The current collection of pipe
Pole will pass through a Q as output end, then rear class input noise1Pipe equivalent could arrive input terminal, and noise reduces g at this timem1
(R1||Ro1) times.First order limiting amplifier uses follow-on Cherry-Hooper types limiting amplifier, uses emitter following
Device rather than resistance are as feedback network, in order to drive load capacitance.In addition to this, the collector of follower has been isolated
With load capacitance, this circuit another advantage is that reducing the output resistance of emitter follower.Limiting amplifier, with its height
The peaking gain of the characteristics of bandwidth, especially high frequency treatment, when having effectively compensated for trans-impedance amplifier with limiting amplifier cascade, because
Bandwidth loss caused by parasitic capacitance.Second level limiting amplifier uses same bandwidth, further increases light-receiving
The gain of machine and bandwidth, while the input voltage signal of Larger Dynamic range is subjected to limited range enlargement, make output signal suitable
Between dynamic range.DC drift eliminator filters high-frequency signal using low-pass filter, then to low frequency signal at
Reason.Processing method is mostly to form negative feedback path using high gain operational amplifier, reduces the gain of low frequency signal, increases common mode
Inhibit ratio, to cancellation of DC offset.Direct current offset is eliminated so that photoreceiver still is able to just when input direct-current electric current is larger
Normal work improves the dynamic range of circuit to a certain extent.The load resistance for exporting buffer stage is 50 ohm, improves output
The amplitude of oscillation, and late-class circuit impedance matching, to drive late-class circuit.
As shown in Fig. 2, the vertical view of the present embodiment photoreceiver main channel EM electromagnetic simulation models.Main channel generally remains
Symmetrical structure, the good analog simulation differential configuration form of circuit.
As shown in figure 3, the 3-D view of the present embodiment photoreceiver main channel EM electromagnetic simulation models.Test PAD and spiral shell
Revolving inductance uses top-level metallic, main channel to be effectively reduced the parasitic capacitance in domain using time top-level metallic, improved electricity
Road performance.
As shown in figure 4, the gain of the present embodiment photoreceiver, bandwidth and output port reflectance factor simulation curve.Light
The low-frequency gain of receiver is 65dB, and bandwidth 25.3GHz, output port reflectance factor is -15dB in 22.8GHz, is realized
Good input matching.
As shown in figure 5, the present embodiment photoreceiver exports eye diagram results when inputting 25Gbps pseudo-random signals.Light-receiving
The amplitude of oscillation of machine is up to 361mV.Eye pattern eyes opening width is big, and eyelid is relatively thin, and global shape is preferable.
It should be understood that the part that this specification does not elaborate belongs to the prior art.
Although describing the specific implementation mode of the present invention above in association with attached drawing, those of ordinary skill in the art should
Understand, these are merely examples, and various deformation or modification can be made to these embodiments, without departing from the original of the present invention
Reason and essence.The scope of the present invention is only limited by the claims that follow.
Claims (6)
1. a kind of transmission rate 25Gbps high-speed light receivers, including input photo-signal, characterized in that including amplifying across resistance
Device, Dummy, first order limiting amplifier, second level limiting amplifier, output buffer stage and DC drift eliminator；Across resistance
Amplifier is separately connected input photo-signal, Dummy and first order limiting amplifier, Dummy connection first order limited range enlargements
Device, first order limiting amplifier connect second level limiting amplifier, second level limiting amplifier be separately connected output buffer stage and
DC drift eliminator, DC drift eliminator are connect with trans-impedance amplifier and Dummy respectively.
2. transmission rate 25Gbps high-speed light receivers as described in claim 1, characterized in that trans-impedance amplifier circuit includes
Transistor Q1、Q2, resistance R1、R2, feedback resistance RF；Transistor Q1Base stage and feedback resistance RFIt is connected, and accesses input current Iin,
Emitter is grounded, collector and resistance R1With transistor Q2Base stage be connected；Resistance R1Another termination input voltage VCC；Transistor
Q2Emitter and resistance R2With feedback resistance RFIt is connected, collector accesses input voltage VCC, base stage output forward voltage signal
VOUTN1；Resistance R2The other end is grounded.
3. transmission rate 25Gbps high-speed light receivers as claimed in claim 2, characterized in that Dummy circuits include crystal
Pipe Q3、Q4, resistance R3、R4, feedback resistance RF2, transistor Q3Base stage and feedback resistance RF2Be connected, emitter ground connection, collector with
Resistance R3With transistor Q4Base stage be connected；Resistance R3Another termination input voltage VCC, transistor Q4Emitter and resistance R4With it is anti-
Feed resistance RF2It is connected, collector meets input voltage VCC, base stage output DC voltage reference signal VOUTP1；Resistance R4Another termination
Ground.
4. transmission rate 25Gbps high-speed light receivers as claimed in claim 3, characterized in that first order limiting amplifier packet
Include transistor Q5、Q6、Q7、Q8、Q9、Q10、Q11、Q12, resistance R5、R6、R7、R8、R9、R10, feedback resistance RF3、RF4；Transistor Q5Base
Forward voltage signal V is accessed in poleOUTN1, collector and feedback resistance RF3With transistor Q7Base stage be connected, emitter and crystal
Pipe Q12Collector, Q6Emitter be connected；Q6Base stage meets DC voltage reference signal VOUTP1, collector and resistance RF4And crystal
Pipe Q8Base stage be connected, emitter and transistor Q12Collector, Q5Emitter be connected；Transistor Q11, Q12As tail electricity
Flow to circuit provide electric current, emitter respectively with resistance R9、R10Be connected, collector respectively with Q7、Q8、Q5、Q6It is connected；Crystal
Pipe Q7、Q8Collector respectively with resistance R7, R8It is connected；Resistance R7、R8The other end and transistor Q9、Q10、R5、R6It is connected；Electricity
Press VDDIt is input to resistance R5、R6And transistor Q9、Q10Collector；Transistor Q9、Q10Emitter and feedback resistance RF3、RF4
Line connects；Transistor Q9Base stage output reverse voltage signal VOUTP2, transistor Q10Base stage export forward voltage signal
VOUTN2；Second level limiting amplifier includes transistor Q13~Q20, resistance R11~R16, feedback resistance RF5、RF6, structure and first
Grade limiting amplifier is identical, transistor Q17Base stage output reverse voltage signal VOUTP3, transistor Q18The positive electricity of base stage output
Press signal VOUTN3。
5. transmission rate 25Gbps high-speed light receivers as claimed in claim 4, characterized in that output buffer includes crystal
Pipe Q21、Q22、Q23、Q24；Transistor Q21、Q22Base stage be respectively connected to forward voltage signal VOUTN3, reverse voltage signal VOUTP3,
Emitter and resistance R19And transistor Q23、Q24Collector be connected, collector and resistance R17、R18It is connected and exports anti-
To voltage signal VOUTP, forward voltage signal VOUTN；Voltage VDDIt is input to resistance R17With R18。
6. transmission rate 25Gbps high-speed light receivers as claimed in claim 4, characterized in that DC drift eliminator packet
Include transistor M1、M2、M3、M4、M5、M6、M7、M8、M9、M10、M11、M12, resistance R20、R21、R22、R23And capacitance C1、C2、C3；Just
To voltage signal VOUTN3With reverse voltage signal VOUTP3Pass through resistance R respectively20Capacitance C1And resistance R21Capacitance C2What is formed is low
After bandpass filter, it is input to transistor M3With M4Grid；Signal passes through transistor M1、M2、R22、M3、M4、M5And M6The fortune of composition
It puts；It is short disconnected with void by the void of amplifier, lock two input voltages；Then, signal flows through transistor M7、M8、M9And M10Composition
Current mirror network amplifies the electric current of two branches by current mirror, by the difference of electric current with voltage VoffsetForm output, electricity
Press VoffsetIt exports to transistor M11With M12Grid to generate offset cancellation current Ioffset1With Ioffset2, transistor M11、
M12Drain electrode respectively with transistor Q1、Q3Base stage connects.
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| CN109698723A (en) * | 2018-12-29 | 2019-04-30 | 武汉大学 | A kind of fully integrated photoreceiver of silica-based high speed for chip chamber light network |
| CN109861661A (en) * | 2019-03-05 | 2019-06-07 | 深圳市傲科光电子有限公司 | A kind of trans-impedance amplifier and trans-impedance amplifier circuit |
| CN117079975A (en) * | 2023-07-28 | 2023-11-17 | 厦门亿芯源半导体科技有限公司 | High-speed TIA (wireless local area network) 5G WIFI electromagnetic interference resisting method |
| CN117079975B (en) * | 2023-07-28 | 2024-04-30 | 厦门亿芯源半导体科技有限公司 | High-speed TIA (wireless local area network) 5G WIFI electromagnetic interference resisting method |
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Application publication date: 20180928 |