CN108597427A - AUX output channels amplitude controller and method in DP interfaces - Google Patents
AUX output channels amplitude controller and method in DP interfaces Download PDFInfo
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- CN108597427A CN108597427A CN201810251013.4A CN201810251013A CN108597427A CN 108597427 A CN108597427 A CN 108597427A CN 201810251013 A CN201810251013 A CN 201810251013A CN 108597427 A CN108597427 A CN 108597427A
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- aux
- interfaces
- switch chip
- switch
- divider resistance
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Abstract
The invention discloses AUX output channel amplitude controllers in a kind of DP interfaces, including the AUX electrode input ends divider resistance being connected between AUX electrode input ends and AUX cathode output ends, the AUX negative inputs divider resistance being connected between AUX negative inputs and AUX cathode output ends, electronic switch chip and multiple switch chip divider resistance, the electronic switch chip under the control of various AUX magnitude parameters enable signals for gating between corresponding switch chip divider resistance access AUX cathode output ends and AUX cathode output ends.The present invention realizes the adjusting of the channels AUX amplitude in DP interfaces, improves display model testing efficiency.
Description
Technical field
The present invention relates to signal processing technology fields, and dress is adjusted in particular to AUX output channel amplitudes in a kind of DP interfaces
It sets and method.
Background technology
DP interfaces (DisplayPort) are a kind of image display interfaces, it can not only support full HD display resolution
(1920 × 1080), moreover it is possible to support 4k resolution ratio (3840 × 2160) and newest 8k resolution ratio (7680 × 4320).DP connects
Not only transmission rate is high but also reliable and stable for mouth, data channel signal and transmission of the signal that interface transmits by transmission image
The relevant state of image, the auxiliary channel signal composition for controlling information include specifically DisplayPort data transmissions main thoroughfare
(Main Link), accessory channel (AUX Channel) with connect (Link Training).
Accessory channel (AUX Channel) is used as an independent transmitted in both directions accessory channel in DP interfaces, using exchange
Coupled differential transmission mode is a bi-directional half-duplex transmission channel, single direction rate only 1Mbit/s or so, for transmitting
Setting and control instruction.
The purposes of AUX (Auxiliary) includes reading expanded display recognition data (EDID), to ensure the correct of DP signals
Transmission；The information for reading the DP interfaces that display is supported, such as the transmission rate of the quantity and DP signals of main thoroughfare；It carries out each
Kind shows the setting of configuration buffer；Read display state buffer.
Therefore, only first ensure that the signal of AUX correctly just can be such that the signal of DP interfaces correctly transmits, and difference DP agreements
Liquid crystal module has the amplitude of AUX output signals different requirements.Currently, being carried out to liquid crystal module in liquid crystal module detection device
When detection, for the liquid crystal module of different DP agreements, need to design the liquid crystal module test dress that various AUX output amplitudes match
It sets, hence it is evident that improve the testing cost of liquid crystal module.
Invention content
Present invention aim to provide AUX output channels amplitude controller and method in a kind of DP interfaces, the dress
It sets and method can conveniently be adjusted AUX output channel amplitudes in DP interfaces.
In order to achieve this, AUX output channel amplitude controllers in DP interfaces designed by the present invention, it includes connection
AUX electrode input ends divider resistance between AUX electrode input ends and AUX cathode output ends is connected to AUX negative inputs
AUX negative inputs divider resistance, electronic switch chip between AUX cathode output ends and multiple switch chip partial pressure electricity
Resistance, the electronic switch chip under the control of various AUX magnitude parameters enable signals for gating corresponding switch chip point
Piezoresistance accesses between AUX cathode output ends and AUX cathode output ends.
AUX output channel amplitude adjusting methods in a kind of DP interfaces of above-mentioned apparatus, it includes the following steps：
Step 1：In AUX transmission datas, electronic switch chip receives AUX magnitude parameters enable signals；
Step 2：Electronic switch chip gates corresponding switch chip under the control of above-mentioned AUX magnitude parameters enable signal
Divider resistance accesses between AUX cathode output ends and AUX cathode output ends；
Step 3：AUX electrode input ends divider resistance, AUX negative inputs point between AUX input terminals and AUX output ends
Piezoresistance and switch chip divider resistance form corresponding electric resistance partial pressure value and receive signal amplitude to adjust AUX.
Beneficial effects of the present invention：
The present invention is by being arranged AUX electrode input ends divider resistance, AUX negative inputs divider resistance, electronic switch core
Piece and multiple switch chip divider resistance so that the present invention inputs under the control of various AUX magnitude parameters enable signals in AUX
Electric resistance partial pressure value corresponding with being formed between AUX output ends is held to realize that AUX output channel amplitudes are adjusted, liquid crystal module test fills
It sets after having used the present invention, liquid crystal module point screen and the test of different DP agreements may be implemented, liquid crystal module greatly improved
The applicability of test device, hence it is evident that the testing cost for reducing liquid crystal module significantly improves the testing efficiency of liquid crystal module.
Description of the drawings
Fig. 1 is the structure diagram of the present invention.
Fig. 2 is the liquid crystal module testing device for having used the present invention.
Specific implementation mode
Below in conjunction with the drawings and specific embodiments, the present invention is described in further detail：
Due to AUX channel datas to the importance of DP point screens and different DP agreements and liquid crystal module to the amplitude of AUX
There is a different requirements, ensure that the signal quality in the channels AUX is the precondition of DP point screens, therefore the present invention devises a kind of DP and connects
AUX output channel amplitude controllers in mouthful, as shown in Figure 1, it includes being connected to AUX electrode input ends AUX_P and AUX anodes
AUX electrode input end divider resistances R1 between output terminals A UX_SRCP, AUX negative input AUX_N and AUX cathode are connected to
AUX negative input divider resistances R2, electronic switch chip U1 between output terminals A UX_SRCN and multiple switch chip partial pressure
Resistance, the electronic switch chip U1 under the control of various AUX magnitude parameters enable signals for gating corresponding switch core
Piece divider resistance accesses between AUX cathode output end AUX_SRCP and AUX cathode output ends AUX_SRCN so that AUX input terminals
Corresponding electric resistance partial pressure value is generated between AUX output ends to realize that AUX output channel amplitudes are adjusted.
In above-mentioned technical proposal, the AUX electrode input ends divider resistance R1 and AUX negative input divider resistances R2's
Resistance value is equal, for ensureing the variation synchronous with AUX negative input signals of AUX anodes input signal so that the AUX signals of output
It meets the requirements.In this example, R1=R2=49.9 Ω.
In above-mentioned technical proposal, the switch A1 interfaces of the electronic switch chip U1 are connected by switch chip divider resistance R3
AUX cathode output end AUX_SRCP are met, switch B1 interfaces connect AUX cathode output end AUX_SRCN, and electronic switch chip U1 connects
The AUX magnitude parameters enable signals SW1 of receipts is used to control the switch A1 interfaces of electronic switch chip U1 and switch B1 interfaces are connected.
The switch A2 interfaces of the electronic switch chip U1 pass through switch chip divider resistance R4 connection AUX cathode output ends
AUX_SRCP, switch B2 interfaces connect AUX cathode output end AUX_SRCN, the AUX magnitude parameters that electronic switch chip U1 is received
Enable signal SW2 is used to control the switch A2 interfaces of electronic switch chip U1 and switch B2 interfaces are connected.
The switch A3 interfaces of the electronic switch chip U1 pass through switch chip divider resistance R5 connection AUX cathode output ends
AUX_SRCP, switch B3 interfaces connect AUX cathode output end AUX_SRCN, the AUX magnitude parameters that electronic switch chip U1 is received
Enable signal SW3 is used to control the switch A3 interfaces of electronic switch chip U1 and switch B3 interfaces are connected.
The switch A4 interfaces of the electronic switch chip U1 pass through switch chip divider resistance R6 connection AUX cathode output ends
AUX_SRCP, switch B4 interfaces connect AUX cathode output end AUX_SRCN, the AUX magnitude parameters that electronic switch chip U1 is received
Enable signal SW4 is used to control the switch A4 interfaces of electronic switch chip U1 and switch B4 interfaces are connected.
In above-mentioned technical proposal, the electronic switch chip U1 is for receiving each of various AUX magnitude parameters enable signals
A logic control input interface is grounded by corresponding pull down resistor.Wherein, the logic control input of electronic switch chip U1
The logic control input interface IN2 that interface IN1 is used to receive AUX magnitude parameters enable signal SW1, electronic switch chip U1 is used for
The logic control input interface IN3 of AUX magnitude parameters enable signal SW2, electronic switch chip U1 are received for receiving AUX amplitudes
The logic control input interface IN4 of parameter enable signal SW3, electronic switch chip U1 are for receiving the enabled letter of AUX magnitude parameters
Number SW4, the logic control input interface IN1 of electronic switch chip U1 are grounded by pull down resistor R7, electronic switch chip U1's
Logic control input interface IN2 is grounded by pull down resistor R8, and the logic control input interface IN3 of electronic switch chip U1 passes through
Pull down resistor R9 ground connection, the logic control input interface IN4 of electronic switch chip U1 are grounded by pull down resistor R10.This implementation
Pull down resistor is 4.7K Ω in example, the purpose of pull down resistor be make the logic control input interface IN1 of electronic switch chip U1~
The acquiescence IO level of IN4 is low level so that is to disconnect between corresponding switch interface under electronic switch chip U1 original states
State.It may be implemented to gate corresponding switch chip divider resistance access under the control of AUX magnitude parameters enable signals in this way
Between AUX cathode output end AUX_SRCP and AUX cathode output ends AUX_SRCN.
In above-mentioned technical proposal, the feeder ear VCC of the electronic switch chip U1 connects power supply, and electronic switch chip U1's connects
Ground terminal GND ground connection.
In above-mentioned technical proposal, various AUX magnitude parameters enable signals are by fpga chip (Field-Programmable
Gate Array, field programmable gate array) it configures.
In above-mentioned technical proposal, between the AUX cathode output ends AUX_SRCP and AUX cathode output end AUX_SRCN
AUX receives signal amplitude=AUX and sends switch chip divider resistance/(AUX electrode input ends point that the amplitude * of signal is strobed
The switch chip divider resistance that piezoresistance R1+AUX negative input divider resistances R2+ is strobed).
In the present embodiment, AUX electrode input end divider resistance R1=AUX negative input divider resistance R2=49.9 Ω,
Switch chip divider resistance R3=20 Ω, switch chip divider resistance R4=30 Ω, switch chip divider resistance R5=40.2 Ω,
Switch chip divider resistance R6=49.9 Ω, thus, when switch chip divider resistance R3 is strobed, AUX receives signal
Adjusting multiple=20 Ω/(+20 Ω of+49.9 Ω of 49.9 Ω)=0.167；When switch chip divider resistance R4 is strobed, AUX
Receive adjusting multiple=30 Ω/(+30 Ω of+49.9 Ω of 49.9 Ω)=0.231 of signal；When switch chip divider resistance R5 is selected
When logical, AUX receives Ω/(+40.2 Ω of+49.9 Ω of 49.9 Ω)=0.287 of the adjusting multiple of signal=40.2；When switch chip point
When piezoresistance R6 is strobed, AUX receives adjusting multiple=49.9 Ω/(+49.9 Ω of+49.9 Ω of 49.9 Ω)=0.333 of signal；
AUX output channel amplitude adjusting methods in a kind of DP interfaces of above-mentioned apparatus, include the following steps：
Step 1：In AUX transmission datas, electronic switch chip U1 receives AUX magnitude parameters enable signals；
Step 2：Electronic switch chip U1 gates corresponding switch core under the control of above-mentioned AUX magnitude parameters enable signal
Piece divider resistance accesses between AUX cathode output end AUX_SRCP and AUX cathode output ends AUX_SRCN；
Step 3：AUX electrode input end divider resistance R1, AUX negative inputs between AUX input terminals and AUX output ends
Divider resistance R2 and switch chip divider resistance form corresponding electric resistance partial pressure value and receive signal amplitude to adjust AUX.
Step 4：When AUX receives data, electronic switch chip U1, which is closed, receives AUX magnitude parameters enable signals, electronics
Switch chip U1 disconnects the connection between AUX cathode output end AUX_SRCP and AUX cathode output ends AUX_SRCN, at this time AUX
It receives signal and AUX input terminals is reversely directly transported to by AUX output ends in AUX output channel amplitude controllers.
AUX output channels amplitude controller in the present invention and fpga chip, DP interfaces, PC (computer), DP driving chips,
Protection interface circuit and DP interfaces collectively constitute display module test device, and in the device, fpga chip is for realizing DP signals
Generation and control, and the interaction between the PC of upper layer；DP driving chips for realizing DP signals adjusting and driving；Interface
Protection circuit come prevent it is counter fill and prevent electrostatic, be not damaged to protective device.DP interfaces are for connecting tested display module.
AUX output channels amplitude controller in DP interfaces is adjusted for realizing the amplitude of AUX signals in DP interfaces.
The content that this specification is not described in detail belongs to the prior art well known to professional and technical personnel in the field.
Claims (10)
1. AUX output channel amplitude controllers in a kind of DP interfaces, it is characterised in that：It includes being connected to the input of AUX anodes
Hold between AUX cathode output ends AUX electrode input ends divider resistance, be connected to the output of AUX negative inputs and AUX cathode
AUX negative inputs divider resistance, electronic switch chip between end and multiple switch chip divider resistance, the electronic switch
Chip under the control of various AUX magnitude parameters enable signals for gating corresponding switch chip divider resistance access AUX just
Between pole output end and AUX cathode output ends.
2. AUX output channel amplitude controllers in DP interfaces according to claim 1, it is characterised in that：The AUX is just
Pole input terminal divider resistance is equal with the resistance value of AUX negative input divider resistances.
3. AUX output channel amplitude controllers in DP interfaces according to claim 1, it is characterised in that：The electronics
The switch A1 interfaces of switch chip connect AUX by switch chip divider resistance R3 connection AUX cathode output ends, switch B1 interfaces
Cathode output end, the AUX magnitude parameters enable signals SW1 that electronic switch chip receives are used to control the switch of electronic switch chip
A1 interfaces are connected with switch B1 interfaces.
4. AUX output channel amplitude controllers in DP interfaces according to claim 1, it is characterised in that：The electronics
The switch A2 interfaces of switch chip connect AUX by switch chip divider resistance R4 connection AUX cathode output ends, switch B2 interfaces
Cathode output end, the AUX magnitude parameters enable signals SW2 that electronic switch chip receives are used to control the switch of electronic switch chip
A2 interfaces are connected with switch B2 interfaces.
5. AUX output channel amplitude controllers in DP interfaces according to claim 1, it is characterised in that：The electronics
The switch A3 interfaces of switch chip connect AUX by switch chip divider resistance R5 connection AUX cathode output ends, switch B3 interfaces
Cathode output end, the AUX magnitude parameters enable signals SW3 that electronic switch chip receives are used to control the switch of electronic switch chip
A3 interfaces are connected with switch B3 interfaces.
6. AUX output channel amplitude controllers in DP interfaces according to claim 1, it is characterised in that：The electronics
The switch A4 interfaces of switch chip connect AUX by switch chip divider resistance R6 connection AUX cathode output ends, switch B4 interfaces
Cathode output end, the AUX magnitude parameters enable signals SW4 that electronic switch chip receives are used to control the switch of electronic switch chip
A4 interfaces are connected with switch B4 interfaces.
7. AUX output channel amplitude controllers in DP interfaces according to claim 1, it is characterised in that：The electronics
Switch chip is used to receive each logic control input interface of various AUX magnitude parameters enable signals by corresponding drop-down
Resistance eutral grounding.
8. AUX output channel amplitude controllers in DP interfaces according to claim 1, it is characterised in that：The AUX is just
AUX between pole output end and AUX cathode output ends receives signal amplitude=AUX and sends the switch that the amplitude * of signal is strobed
Chip divider resistance/(AUX electrode input end divider resistance+AUX negative input divider resistances+switch chip being strobed point
Piezoresistance).
9. AUX output channel amplitude adjusting methods in a kind of DP interfaces of claim 1 described device, which is characterized in that it is wrapped
Include following steps：
Step 1：In AUX transmission datas, electronic switch chip receives AUX magnitude parameters enable signals；
Step 2：Electronic switch chip gates corresponding switch chip partial pressure under the control of above-mentioned AUX magnitude parameters enable signal
Resistance accesses between AUX cathode output ends and AUX cathode output ends；
Step 3：AUX electrode input ends divider resistance, AUX negative inputs partial pressure electricity between AUX input terminals and AUX output ends
Resistance and switch chip divider resistance form corresponding electric resistance partial pressure value and receive signal amplitude to adjust AUX.
10. AUX output channels amplitude adjusting method in DP interfaces according to claim 9, it is characterised in that：Step 4：
When AUX receives data, electronic switch chip, which is closed, receives AUX magnitude parameters enable signals, and electronic switch chip disconnects AUX anodes
Connection between output end and AUX cathode output ends, the signal of AUX receptions at this time are straight in AUX output channel amplitude controllers
It connects and AUX input terminals is reversely transported to by AUX output ends.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810251013.4A CN108597427B (en) | 2018-03-26 | 2018-03-26 | Amplitude adjusting device and method for AUX output channel in DP interface |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810251013.4A CN108597427B (en) | 2018-03-26 | 2018-03-26 | Amplitude adjusting device and method for AUX output channel in DP interface |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108597427A true CN108597427A (en) | 2018-09-28 |
| CN108597427B CN108597427B (en) | 2021-03-09 |
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| CN201810251013.4A Active CN108597427B (en) | 2018-03-26 | 2018-03-26 | Amplitude adjusting device and method for AUX output channel in DP interface |
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| CN103050073A (en) * | 2012-12-26 | 2013-04-17 | 武汉精测电子技术有限公司 | DP (Digital Processing) decoding and automatic resolution adjusting liquid crystal display module testing method and device |
| US8570092B2 (en) * | 2011-12-26 | 2013-10-29 | Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. | Control circuit for connector |
| CN104821484A (en) * | 2015-04-30 | 2015-08-05 | 无锡亮源激光技术有限公司 | Pulse modulation drive circuit of miniature semiconductor laser |
-
2018
- 2018-03-26 CN CN201810251013.4A patent/CN108597427B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040136209A1 (en) * | 2003-01-09 | 2004-07-15 | Renesas Technology Corp. | Switching power supply device and the semiconductor integrated circuit for power supply control |
| CN2912099Y (en) * | 2006-06-19 | 2007-06-13 | 刘程宇 | Mobile power source circuit having CUK converter |
| US20090240965A1 (en) * | 2008-03-21 | 2009-09-24 | Mstar Semiconductor, Inc. | Electronic apparatus and auto wake-up circuit thereof |
| CN101277395A (en) * | 2008-04-09 | 2008-10-01 | 深圳市创凯电子有限公司 | Method and apparatus for partitioning HDMI and Display Port image signal |
| US8570092B2 (en) * | 2011-12-26 | 2013-10-29 | Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. | Control circuit for connector |
| CN103050073A (en) * | 2012-12-26 | 2013-04-17 | 武汉精测电子技术有限公司 | DP (Digital Processing) decoding and automatic resolution adjusting liquid crystal display module testing method and device |
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| CN108597427B (en) | 2021-03-09 |
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