CN108596160B - Ultrasonic wave recognition circuit and fingerprint recognition sensor - Google Patents
Ultrasonic wave recognition circuit and fingerprint recognition sensor Download PDFInfo
- Publication number
- CN108596160B CN108596160B CN201810645441.5A CN201810645441A CN108596160B CN 108596160 B CN108596160 B CN 108596160B CN 201810645441 A CN201810645441 A CN 201810645441A CN 108596160 B CN108596160 B CN 108596160B
- Authority
- CN
- China
- Prior art keywords
- tft transistor
- voltage
- receiver
- transistor
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000000694 effects Effects 0.000 claims abstract description 16
- 230000000295 complement effect Effects 0.000 claims description 14
- 239000013589 supplement Substances 0.000 claims description 9
- 230000001502 supplementing effect Effects 0.000 claims description 9
- 230000010355 oscillation Effects 0.000 claims description 8
- 230000000153 supplemental effect Effects 0.000 claims description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 238000003491 array Methods 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 101100537098 Mus musculus Alyref gene Proteins 0.000 description 3
- 101150095908 apex1 gene Proteins 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000001902 propagating effect Effects 0.000 description 2
- 238000002604 ultrasonography Methods 0.000 description 2
- 238000002592 echocardiography Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1306—Sensors therefor non-optical, e.g. ultrasonic or capacitive sensing
Landscapes
- Engineering & Computer Science (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Theoretical Computer Science (AREA)
- Measurement Of Velocity Or Position Using Acoustic Or Ultrasonic Waves (AREA)
Abstract
The invention relates to the technical field of ultrasonic fingerprint identification, in particular to an ultrasonic identification circuit and a fingerprint identification sensor. The ultrasonic identification circuit comprises a receiver Rx, three TFT transistors M1, M3 and M4, wherein the receiver Rx is provided with a piezoelectric effect, a first end of the receiver Rx is electrically connected with an external control circuit, a second end of the receiver Rx is electrically connected with a grid electrode of the TFT transistor M4 and a first end of the TFT transistor M1, the grid electrode and the second end of the TFT transistor M1 are electrically connected with an external control circuit, the first end of the TFT transistor M4 is electrically connected with an external power supply Vcc, the second end of the TFT transistor M4 is electrically connected with a first end of the TFT transistor M3, the grid electrode of the TFT transistor M3 is electrically connected with an external control circuit, and a second end acquisition module of the TFT transistor M3 is electrically connected. The fingerprint identification sensor adopts the ultrasonic identification circuit.
Description
[ field of technology ]
The invention relates to the technical field of ultrasonic fingerprint identification, in particular to an ultrasonic identification circuit and a fingerprint identification sensor.
[ background Art ]
Biometric identification is a technique for distinguishing between different biometric features, including fingerprint, palmprint, face, dna, voice, etc. identification techniques. The fingerprint refers to uneven lines on the skin at the front surface of the tail end of the finger of a person, and the lines are regularly arranged to form different patterns. Fingerprint identification refers to identity authentication by comparing minutiae of different fingerprints. Fingerprint recognition is increasingly used due to lifetime invariance, uniqueness and convenience. As the effect of ultrasonic waves for fingerprint recognition is good, more and more manufacturers are devoted to researching ultrasonic fingerprint sensors. The ultrasonic recognition circuit of the existing ultrasonic fingerprint recognition sensor is complex in structure and difficult to manufacture.
Therefore, how to provide an ultrasonic recognition circuit with simple structure is the requirements of the technical field of ultrasonic fingerprint recognition!
[ invention ]
In order to solve the technical problem that an ultrasonic recognition circuit of an existing ultrasonic fingerprint recognition sensor is complex in structure, the invention provides an ultrasonic recognition circuit and a fingerprint recognition sensor.
The invention provides an ultrasonic recognition circuit for receiving control of an external control circuit, generating ultrasonic waves and receiving reflected ultrasonic waves to generate electric signals to be transmitted to an acquisition module, wherein the ultrasonic recognition circuit comprises a receiver Rx, three T F T transistors M1, M3 and M4, the receiver Rx has a piezoelectric effect, the first end of the receiver Rx is electrically connected with the external control circuit, the external control circuit provides pulse voltage for the first end of the receiver Rx to enable the receiver Rx to generate ultrasonic waves, the second end of the receiver Rx is electrically connected with a grid electrode of the T F T transistor M4 and the first end of the T F T transistor M1 at the same time, the grid electrode of the T F T transistor M1 and the second end of the T F T transistor M4 are electrically connected with the external control circuit, the second end of the T F T transistor M4 is electrically connected with the first end of the T F T transistor M3, and the second end of the T transistor M3 is electrically connected with the external control circuit; the ultrasonic wave identification circuit further comprises a T F T transistor M5, the second end of the T F T transistor M3 is electrically connected with the first end of the T F T transistor M5, the grid electrode of the T F T transistor M5 is electrically connected with an external control circuit, and the second end of the T F T transistor M5 is electrically connected with the acquisition module.
Preferably, the ultrasonic recognition circuit further includes a T F T transistor M2, a first end of the T F T transistor M2 is electrically connected to a second end of the T F T transistor M3, and a gate and a second end of the T F T transistor M2 are electrically connected to an external control circuit.
Preferably, the acquisition module is a silicon-based processing chip.
Preferably, an external control circuit connected to the drain of the T F T transistor M1 is a supplemental energy circuit that provides a stable voltage and/or current.
Preferably, the external control circuit provides a receiver reset level for the gate of the T-F-T transistor M1, the source and the drain of the T-F-T transistor M1 are electrically connected, the voltage at the second end of the receiver Rx is equal to the voltage provided by the complementary energy circuit, then the external control circuit provides a short pulse signal for the first end of the receiver Rx, the receiver Rx generates an ultrasonic signal and emits the ultrasonic signal, then the external control circuit provides a gate voltage level for the gate of the T-F-T transistor M1, the ultrasonic wave is blocked and reflected, the receiver Rx receives the ultrasonic oscillation to generate an oscillation signal, when the voltage of the oscillation signal is low, the complementary energy circuit supplements energy for the second end of the receiver Rx through the T-F-T transistor M1, the voltage at the second end of the receiver Rx is high, the current and/or the voltage of the external power V c c is high through the drain and source of the T-F transistor M4, the external control circuit provides a high level for the gate of the T-F-T transistor M3, the electrical signal M3 and the voltage TF and the drain of the T-F-T transistor M3 are high, and the voltage TF-c is high through the gate voltage of the receiver module is high, and the voltage is high through the gate voltage of the gate of the T-F-T transistor M3 is high, and the voltage is high.
Preferably, when the external control circuit provides the receiver reset level to the gate of the TF T transistor M1, the external control circuit provides a voltage with a proper magnitude to the source of the TF T transistor M2 and a constant whole period, the external control circuit provides a short high level to the gate of the TF T transistor M2, the external energy supplementing circuit always provides a constant whole period voltage to the second terminal of the TF T transistor M1, the external power supply Vc c continuously provides a constant whole period current and/or voltage to the first terminal of the TF T transistor M4, the external control circuit provides a low level to the gate of the TF T transistor M1, the external control circuit provides a constant whole period voltage to the first terminal of the receiver Rx, and the external control circuit provides a low level to the gate of the TF T transistor M3.
Preferably, the voltage of the electrical node between the source of the T-F-T transistor M3 and the drain of the TF-T transistor M5 is reset, so that the voltage Vp e at the second end of the receiver Rx is reset, so that the voltage Vp e is equal to the voltage provided by the external control circuit, then the receiver Rx is made to generate a piezoelectric effect to emit ultrasonic waves, then the TF-T transistor M1 is ready for receiving the ultrasonic waves, the voltage provided by the external complementary energy circuit to the second end of the TF-T transistor M1 is raised, the raised voltage is greater than the threshold voltage of the T-F-T transistor M1, the external control circuit provides a gate voltage level to the gate of the TF-T transistor M1, so that the TF-T transistor M1 is in a critical conduction state, at this time, the voltage Vp e at the second end of the receiver Rx is gradually raised by the T-T transistor M1, the voltage Vp e at the second end of the receiver Rx is raised to a certain voltage, then the ultrasonic waves are returned to be received by the receiver Rx, due to the Rx effect, the voltage at both ends of the receiver Rx gradually increases, the voltage generator at the receiver Rx is also gradually raised to the voltage Vp e at the second end of the receiver Rx is gradually, the voltage Vp e is gradually raised to be higher by the voltage Vp e at the second end of the receiver Rx, the voltage at the end of the receiver Rx is gradually, the voltage Vp e is gradually raised by the external complementary energy is increased by the second end of the voltage Vp e, and the external complementary energy is gradually, and the voltage is increased by the voltage at the second end of the receiver Rx, and the voltage is gradually, which is gradually higher by the voltage is gradually higher than the voltage, and is higher by the voltage is higher than the voltage, and has a voltage is gradually, and higher voltage is higher by the voltage, and is, and stable, and is stable, and has the voltage is stable, and is, the source electrode and the drain electrode of the TF T transistor M3 are conducted, and the electric signal of Vc c is sensed by the acquisition module through the TF T transistors M4 and M3.
The invention also provides a fingerprint identification sensor which adopts the ultrasonic identification circuit.
Preferably, the ultrasonic recognition circuit includes a plurality of the ultrasonic recognition circuit arrays.
Compared with the prior art, the ultrasonic identification circuit comprises a receiver Rx, three TF T transistors M1, M3 and M4, wherein the receiver Rx has a piezoelectric effect, the first end of the receiver Rx is electrically connected with an external control circuit, the second end of the receiver Rx is electrically connected with the grid electrode of the TF T transistor M4 and the first end of the TF T transistor M1 at the same time, the grid electrode and the second end of the TF T transistor M1 are electrically connected with an external control circuit, the first end of the TF T transistor M4 is electrically connected with an external power supply Vc, the second end of the TF T transistor M4 is electrically connected with the first end of the TF T transistor M3, the grid electrode of the TF T transistor M3 is electrically connected with an external control circuit, and the second end acquisition module of the TF T transistor M3 is not connected with the TF T transistor in parallel by a diode.
Compared with the prior art, the fingerprint identification sensor provided by the invention adopts the ultrasonic identification circuit, does not need to use a diode to be connected with a T F T transistor in parallel, has the advantages of simple structure, good manufacturing process compatibility, simple process and easiness in manufacturing, and an external control circuit can supplement energy to the receiver Rx through the TF T transistor M1, so that the pulse voltage provided by the external control circuit to the first end of the receiver Rx is reduced, and the energy of ultrasonic waves emitted by the receiver Rx is not excessively large.
The ultrasonic recognition circuit comprises a plurality of ultrasonic recognition circuits, the ultrasonic recognition circuits are arranged in an array, the fingerprint recognition sensor is simple in structure, the positions of the circuits for receiving ultrasonic waves can be easily detected, and the detection is accurate.
[ description of the drawings ]
Fig. 1 is a schematic diagram of a specific circuit configuration of an ultrasonic recognition circuit of the present invention.
FIG. 2 is a timing diagram of different input signals in the ultrasonic recognition circuit of the present invention.
FIG. 3 is a timing diagram of another different input signal in the ultrasonic identification circuit of the present invention.
Reference numerals illustrate: 10. an ultrasonic recognition circuit; 11. and an acquisition module.
[ detailed description ] of the invention
For the purpose of making the technical solution and advantages of the present invention more apparent, the present invention will be further described in detail below with reference to the accompanying drawings and examples of implementation. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
Referring to fig. 1, the present invention provides an ultrasonic recognition circuit 10 for receiving control of an external control circuit, generating ultrasonic waves and receiving reflected ultrasonic waves to generate an electrical signal to be transmitted to an external acquisition module 11.
The ultrasonic recognition circuit 10 includes a receiver Rx, TF T transistors M1, T ft transistors M2, TF T transistors M3, TF T transistors M4, and TF T transistors M5.
The receiver Rx has a piezoelectric effect and has a first end and a second end. When an electric field is applied to the first and second ends of the receiver Rx, the receiver Rx is deformed, for example, a stable voltage is applied to one end of the receiver Rx and a pulse voltage is applied to the other end of the receiver Rx, and the receiver Rx continuously vibrates and generates ultrasonic waves for a short time. If the receiver Rx is deformed by a force, opposite positive and negative charges are generated at both ends of the receiver Rx, for example, if the receiver Rx receives ultrasonic waves, pulse charges are generated at the first and second ends of the receiver Rx. The first end of the receiver Rx is electrically connected to an external control circuit, which can provide a pulse voltage to the first end of the receiver Rx to make the receiver Rx generate ultrasonic waves. The second terminal of the receiver Rx is electrically connected to the gate of the TFT transistor M4 and the source of the TFT transistor M1. The node voltage at the second terminal of the receiver Rx is labeled Vpe. It should be understood that the first end and the second end of each element in the present invention are only for better describing the electrical connection pins of the connection relationship of each element, and are not limited to specific one of the first end and the second end of the original document.
The TFT transistor is a thin film transistor. The gate and drain of the TFT transistor M1 are electrically connected to an external control circuit. An external control circuit provides a high level or a low level to the gate of the TFT transistor M1 to control the on-off of the source and drain of the TFT transistor M1, and the level provided to the gate of the TFT transistor M1 by the external control circuit is labeled Gdbias. The external control circuit marks the level provided to the drain of TFT transistor M1 as Dbias. When the gate voltage difference to the TFT transistor M1 is sufficiently large, the source and the drain of the TFT transistor M1 are fully turned on, i.e., the source and the drain of the TFT transistor M1 are bi-directionally turned on. Preferably, the external control circuit provides the gate of the TFT transistor M1 with a receiver reset level, a gate voltage level, and a low level, wherein the receiver reset level is greater than the gate voltage level, and the gate voltage level is greater than the low level. An external control circuit connected to the drain of TFT transistor M1 is a supplemental energy circuit that provides a stable voltage and/or current. When the level of the gate of the TFT transistor M1 is the receiver reset level, the source and the drain of the TFT transistor M1 are turned on bidirectionally, so that the drain voltage of the TFT transistor M1 is approximately equal to the voltage Vpe of the second terminal of the receiver Rx, that is, the voltage Vpe of the second terminal of the receiver Rx is approximately equal to Dbias (in the present invention, the influence and the theoretical deviation of the properties of the TFT transistor itself are ignored, the voltage Vpe of the second terminal of the receiver Rx is considered to be equal to Dbias), and the receiver reset level is preferably 9-16V, preferably 10V, 12V or 15V. When the gate voltage level of the TFT transistor M1 is the gate voltage level, the source and the drain of the TFT transistor M1 are in a critical on state, and if the voltage is lower than the gate voltage level, the source and the drain of the TFT transistor M1 are turned off, i.e., the gate voltage level is equal to the threshold voltage of the TFT transistor M1. When the level of the gate of the TFT transistor M1 is low, the source and drain of the TFT transistor M1 are in an off state.
The drain of the TFT transistor M4 is electrically connected to the external power source Vcc, and the source of the TFT transistor M4 is electrically connected to the drain of the TFT transistor M3.
The grid electrode of the TFT transistor M3 is electrically connected with an external control circuit, and the source electrode of the TFT transistor M3 is electrically connected with the drain electrode of the TFT transistor M2 and the drain electrode of the TFT transistor M5. An external control circuit supplies a high level or a low level to the gate of the TFT transistor M3 to control on-off of the source and drain of the TFT transistor M3. The level of the gate of the TFT transistor M3 is labeled ROW.
The gate and source of the TFT transistor M2 are electrically connected to an external control circuit. An external control circuit provides a high level or a low level to the gate of the TFT transistor M2 to control on/off of the source and drain of the TFT transistor M2. An external control circuit supplies a reset level to the source of the TFT transistor M2. When the external control circuit provides a high level to the gate of the TFT transistor M2 and the source and the drain of the TFT transistor M2 are turned on, the voltage of the source of the TFT transistor M2 is a reset voltage, and the magnitude of the reset voltage is set according to the requirement, for example, 3V. The level of the gate of the TFT transistor M2 is labeled Ref1 and the level of the source of the TFT transistor M2 is labeled Rst.
The gate of the TFT transistor M5 is electrically connected to an external control circuit, and the drain of the TFT transistor M5 is electrically connected to the acquisition module 11. An external control circuit supplies a high level or a low level to the gate of the TFT transistor M5 to control on/off of the source and drain of the TFT transistor M5. The level of the gate of TFT transistor M5 is labeled COL. In this embodiment, the TFT transistors M1 to M5 are all N-type TFT transistors, and it is understood that the TFT transistors M1 to M5 may be P-type TFT transistors, and the connection mode of the source and the drain of the P-type TFT transistors is opposite to the connection mode of the source and the drain of the N-type TFT transistors. The source electrode or the drain electrode of the TFT is used as two electrical connection stages, one of the source electrode or the drain electrode of the TFT is a first end of the TFT, and the other is a second end of the TFT. If the collection module 11 is electrically connected to the first end of the N-type TFT transistor M5, the collection module 11 needs to be electrically connected to the second end of the P-type TFT transistor M5 when the TFT transistor M5 is a P-channel. It is understood that the TFT transistors M2 and M5 may be omitted, so that the drain of the TFT transistor M3 is electrically connected to the collection module.
The acquisition module 11 is used for detecting the electrical signal transmitted by the ultrasonic recognition circuit 10. The acquisition module 11 may be a silicon-based processing chip. It is understood that the acquisition module 11 may be electrically connected to other circuits.
Referring to fig. 2, in use, in a period, the voltage of the electrical node between the source of TFT transistor M3 and the drain of TFT transistor M5 is reset during phase T0. Specifically, the signals are controlled as follows: the external control circuit provides a voltage Ref1 with proper size and constant whole period size for the source electrode of the TFT transistor M2, such as 3V, and provides a short high level Rst for the grid electrode of the TFT transistor M2, the source electrode and the drain electrode of the TFT transistor M2 are conducted, so that the voltage of the source electrode of the TFT transistor M3 and the drain electrode of the TFT transistor M5 are reset, and the voltage of the source electrode of the TFT transistor M2 is equal to the voltage of the Ref 1. The external energy supply circuit always supplies the drain of the TFT transistor M1 with a voltage Dbias which is constant over the entire period and which is smaller than the threshold voltage of the TFT transistor M1. The external power supply Vcc continues to supply a constant current and/or voltage for the entire period to the source of the TFT transistor M4. Assuming that the reception of the ultrasonic wave has been performed before this stage, the voltage Vpe of the second terminal of the receiver Rx is greater than the drain supply voltage Dbias of the TFT transistor M1, and the level Gdbias supplied to the gate of the TFT transistor M1 by the external control circuit is at a low level, the TFT transistor M1 is in an off state because the low level Gdbias is smaller than the threshold voltage of the TFT transistor M1. The voltage Tx provided by the external control circuit to the first terminal of the receiver Rx is a stable voltage, such as 0V, 5V or 10V, which is set according to the requirement, and is not limited in this embodiment. The external control circuit supplies a low level ROW to the gate of the TFT transistor M3, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off.
In the T1 stage, the voltage Vpe at the second terminal of the receiver Rx is reset, so that the voltage Vpe is equal to the voltage Dbias provided by the external control circuit. Specifically, the signals are controlled as follows: the external control circuit provides a receiver reset level for the gate of the TFT transistor M1, the source and the drain of the TFT transistor M1 are electrically conductive, the voltage Vpe of the second terminal of the receiver Rx is reduced, and the voltage Vpe of the second terminal of the receiver Rx is equal to the voltage Dbias provided by the energy supplementing circuit for the drain of the TFT transistor M1. The voltage provided by the external control circuit to the first terminal of the receiver Rx is not changed at this time. The external control circuit supplies a low level ROW to the gate of the TFT transistor M3, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off.
In the T2 phase, the receiver Rx is made to generate a piezoelectric effect to transmit ultrasonic waves. Specifically, the signals are controlled as follows: the external control circuit provides a short pulse signal Tx to the first terminal of the receiver Rx, which generates an ultrasonic signal due to the piezoelectric effect and emits the ultrasonic signal, to the gate of the TFT transistor M1, while the receiver reset level is maintained. The second terminal of the receiver Rx generates a coupling signal of a certain magnitude, vpe oscillates, and the voltage Vpe at the second terminal of the receiver Rx is equal to the voltage Dbias provided by the energy supply circuit due to the bi-directional electrical conduction of the source and the drain of the TFT transistor M1. The external control circuit supplies a low level ROW to the gate of the TFT transistor M3, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off.
In the T3 stage, a large amount of ultrasonic waves are propagating outwards, i.e. the propagation time is reserved for ultrasonic waves. Specifically, the control signals are as follows: the voltage provided by the external control circuit to the first end of the receiver Rx is consistent with the phase T0, the receiver Rx no longer generates ultrasonic waves, the level ROW provided by the external control circuit to the gate of the TFT transistor M3 is low, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off. The receiver reset level provided by the external control circuit to the gate of TFT transistor M1 remains unchanged.
In the T4 stage, the TFT transistor M1 is ready for receiving ultrasonic waves. Specifically, the control signals are as follows: the emitted ultrasonic waves start to return against the object, such as against a person's finger. At the beginning of the T4 stage, an external control circuit provides a gate voltage level to the gate of TFT transistor M1, leaving TFT transistor M1 in a critical on state, ready for receiving ultrasound echoes. It will be appreciated that the external control circuit may provide a gate voltage level to the gate of TFT transistor M1 at other times during phase T4, before a significant amount of the ultrasound hits the object and returns to the receiver Rx. The voltage provided by the external control circuit to the first terminal of the receiver Rx is constant with respect to the T3 phase. The external control circuit supplies a low level ROW to the gate of the TFT transistor M3, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off.
In the period T5, the ultrasonic wave is received by the receiver Rx after being returned by the object, such as a finger, the voltage at the two ends of the receiver Rx is changed to generate an oscillation signal due to the piezoelectric effect, when the voltage at the second end of the receiver Rx is lower than the drain voltage Dbias of the TFT transistor, the TFT transistor M1 is changed from the critical on state to the micro-on state, the external complementary energy circuit supplements energy to the second end of the receiver Rx through the TFT transistor M1, the voltage difference between the gate and the source of the TFT transistor M1 is reduced, the TFT transistor M1 is in the off state, the energy at the second end of the receiver Rx cannot flow from the source to the drain of the TFT transistor M1, the voltage at the second end of the receiver Rx is gradually increased due to the complementary energy at the second end of the receiver Rx, the source and the drain of the TFT transistor M4 are enabled to be more and more obviously conducted, and the current and/or the voltage of the external power supply Vcc can be gradually increased through the drain and the source of the TFT transistor M4. In this stage, the gate voltage level provided by the external control circuit to the gate of the TFT transistor M1 is maintained constant, and the voltage provided by the external control circuit to the first terminal of the receiver Rx is maintained constant with respect to the T4 stage. The external control circuit supplies a low level ROW to the gate of the TFT transistor M3, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off.
In the T6 stage, the receiver Rx no longer receives the reflected ultrasonic wave, and the second terminal voltage Vpe of the receiver Rx is stabilized. Specifically, the control signals are as follows: the external control circuit provides a low level to the gate of the TFT transistor M1, which is electrically disconnected from the source and gate. An external control circuit supplies a high level to the gate of the TFT transistor M3, turning on the source and drain of the TFT transistor. The T transistor M3 corresponds to a switching transistor. The voltage provided by the external control circuit to the first terminal of the receiver Rx is constant with respect to the T5 phase. The external control circuit supplies a low level to the gate of the tt transistor M5 at the level cl, and the tt transistor M5 is turned off. The external control circuit supplies a low level Rs T to the gate of the T-ft transistor M2, and the T-ft transistor M2 is turned off.
In stage T7, the acquisition module 11 detects the electrical signal through the tt transistor M3. Specifically, the control signals are as follows: the low level provided by the external control circuit to the gate of the T ft transistor M1 remains unchanged, and the voltage provided by the external control circuit to the first terminal of the receiver Rx remains unchanged with respect to the T6 phase. The external control circuit maintains the high level rw provided to the gate of the tt transistor M3. The external control circuit supplies a low level Rs T to the gate of the T-ft transistor M2, and the T-ft transistor M2 is turned off. The external control circuit provides a high level (ROW) to the gate of the TfT transistor M5, the source and drain of the TfT transistor M5 being turned on, and the VC electrical signal flowing through the TfT transistors M4, M3 and M5 being sensed by the acquisition module 11. The magnitude of the current and/or voltage Vc reaching the acquisition module 11 is related to the magnitude of the voltage at the gate of the tt transistor M4, and the greater the voltage at the gate of the TF transistor M4, the greater the current and/or voltage sensed by the acquisition module 11, so that the magnitude of the reflected ultrasonic signal can be sensed by the ultrasonic recognition circuit 10. Thus, one cycle of the control signal is completed and the control signal is reciprocated in a subsequent cycle.
Referring to fig. 3, another control method of the ultrasonic recognition circuit is provided in the present invention. In use, in one period, in the T0 phase, the voltage of the electrical node between the source of the tt transistor M3 and the drain of the tt transistor M5 is reset. Specifically, the signals are controlled as follows: the external control circuit provides a voltage Re F1, such as 3V, with a proper magnitude for the source electrode of the TF T transistor M2 and a constant whole period, and provides a short high level Rs T for the gate electrode of the TF T transistor M2, wherein the source electrode and the drain electrode of the TF T transistor M2 are turned on, so that the voltages of the source electrode of the TF T transistor M3 and the drain electrode of the TF T transistor M5 are reset, and the source voltage Ref1 of the TFT transistor M2 is equal. The external supplemental energy circuit provides a voltage Dbias to the drain of TFT transistor M1, which is less than the threshold voltage of TFT transistor M1. The external power supply Vcc continues to supply a constant current and/or voltage for the entire period to the source of the TFT transistor M4. Assuming that the reception of the ultrasonic wave has been performed before this stage, the voltage Vpe of the second terminal of the receiver Rx is greater than the drain supply voltage Dbias of the TFT transistor M1, and the level Gdbias supplied to the gate of the TFT transistor M1 by the external control circuit is at a low level, the TFT transistor M1 is in an off state because the low level Gdbias is smaller than the threshold voltage of the TFT transistor M1. The voltage Tx provided by the external control circuit to the first terminal of the receiver Rx is a stable voltage, such as 0V, 5V or 10V, which is set according to the requirement, and is not limited in this embodiment. The external control circuit supplies a low level ROW to the gate of the TFT transistor M3, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off.
In the T1 stage, the voltage Vpe at the second terminal of the receiver Rx is reset, so that the voltage Vpe is equal to the voltage Dbias provided by the external control circuit. Specifically, the signals are controlled as follows: the voltage Dbias provided by the external energy supplementing circuit to the drain electrode of the TFT transistor M1 is kept unchanged, the external control circuit provides a receiver reset level to the gate electrode of the TFT transistor M1, the source electrode and the drain electrode of the TFT transistor M1 are electrically conducted, the voltage Vpe of the second end of the receiver Rx is reduced, and the voltage Vpe of the second end of the receiver Rx is equal to the voltage Dbias provided by the energy supplementing circuit to the drain electrode of the TFT transistor M1. The voltage provided by the external control circuit to the first terminal of the receiver Rx is not changed at this time. The external control circuit supplies a low level ROW to the gate of the TFT transistor M3, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off.
In the T2 phase, the receiver Rx is made to generate a piezoelectric effect to transmit ultrasonic waves. Specifically, the signals are controlled as follows: the external energy supplementing circuit maintains the voltage Dbias provided by the drain electrode of the TFT transistor M1 unchanged, the external control circuit maintains the receiver reset level provided by the grid electrode of the TFT transistor M1 unchanged, the external control circuit provides a short pulse signal Tx for the first end of the receiver Rx, and the receiver Rx generates an ultrasonic signal and emits the ultrasonic signal due to the piezoelectric effect. The second terminal of the receiver Rx generates a coupling signal of a certain magnitude, vpe oscillates, and the voltage Vpe at the second terminal of the receiver Rx is equal to the voltage Dbias provided by the energy supply circuit due to the bi-directional electrical conduction of the source and the drain of the TFT transistor M1. The external control circuit supplies a low level ROW to the gate of the TFT transistor M3, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off.
In the T3 stage, a large amount of ultrasonic waves are propagating outward. Specifically, the control signals are as follows: the voltage Dbias provided by the external energy supplementing circuit to the drain electrode of the TFT transistor M1 is kept unchanged, the voltage provided by the external control circuit to the first end of the receiver Rx is consistent with the phase T0, the receiver Rx does not generate ultrasonic wave any more, the level ROW provided by the external control circuit to the gate electrode of the TFT transistor M3 is low level, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off. The receiver reset level provided by the external control circuit to the gate of TFT transistor M1 remains unchanged.
In the T4 stage, the TFT transistor M1 is ready for receiving ultrasonic waves. Specifically, the control signals are as follows: the emitted ultrasonic waves start to return against the object, such as against a person's finger. At the beginning of the period T4, the external energy supplementing circuit provides voltage Dbias for the drain electrode of the TFT transistor M1 to rise, the raised voltage Dbias is larger than the threshold voltage of the TFT transistor M1, the external control circuit provides gate voltage level for the gate electrode of the TFT transistor M1 to enable the TFT transistor M1 to be in a critical conduction state, at the moment, the external energy supplementing circuit supplements energy for the second end of the receiver Rx through the TFT transistor M1, the voltage Vpe of the second end of the receiver Rx gradually rises, and the voltage Vpe of the second end of the receiver Rx rises to a certain voltage to be stable. The voltage provided by the external control circuit to the first terminal of the receiver Rx corresponds to the T3 phase. The external control circuit supplies a low level ROW to the gate of the TFT transistor M3, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off.
In the period T5, the ultrasonic wave is received by the receiver Rx after being returned by the object, such as a finger, the voltage at the two ends of the receiver Rx is changed to generate an oscillation signal due to the piezoelectric effect, when the voltage at the second end of the receiver Rx is lower than the drain voltage Dbias of the TFT transistor, the TFT transistor M1 is changed from the critical on state to the micro-on state, the external complementary energy circuit supplements energy to the second end of the receiver Rx through the TFT transistor M1, the voltage difference between the gate and the source of the TFT transistor M1 is reduced, the TFT transistor M1 is in the off state, the energy at the second end of the receiver Rx cannot flow from the source to the drain of the TFT transistor M1, the voltage at the second end of the receiver Rx is gradually increased due to the complementary energy at the second end of the receiver Rx, the source and the drain of the TFT transistor M4 are enabled to be more and more obviously conducted, and the current and/or the voltage of the external power supply Vcc can be gradually increased through the drain and the source of the TFT transistor M4. In this stage, the voltage Dbias supplied to the drain of the TFT transistor M1 by the external power supply circuit is kept constant, consistent with the T4 stage. The gate voltage level provided by the external control circuit to the gate of TFT transistor M1 remains unchanged and the voltage provided by the external control circuit to the first terminal of receiver Rx coincides with the T4 phase. The external control circuit supplies a low level ROW to the gate of the TFT transistor M3, and the TFT transistor M3 is turned off. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off.
In the T6 stage, the receiver Rx no longer receives the reflected ultrasonic wave, and the second terminal voltage Vpe of the receiver Rx is stabilized. Specifically, the control signals are as follows: the external energy supply circuit provides a reduced voltage Dbias to the drain of TFT transistor M1, which is consistent with the voltage Dbias at stage T0. The external control circuit provides a low level to the gate of the TFT transistor M1, which is electrically disconnected from the source and gate. An external control circuit supplies a high level to the gate of the TFT transistor M3, turning on the source and drain of the TFT transistor. The TFT transistor M3 corresponds to a switching transistor. The voltage provided by the external control circuit to the first terminal of the receiver Rx corresponds to the T5 phase. The external control circuit supplies a low level to the gate of the TFT transistor M5, and the TFT transistor M5 is turned off. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off.
In stage T7, the acquisition module 11 detects the electrical signal through the TFT transistor M3. Specifically, the control signals are as follows: the voltage Dbias provided by the external supplemental power circuit to the drain of TFT transistor M1 remains unchanged. The low level provided by the external control circuit to the gate of TFT transistor M1 remains unchanged and the voltage provided by the external control circuit to the first terminal of receiver Rx coincides with the T6 phase. The high level ROW provided by the external control circuit to the gate of TFT transistor M3 remains unchanged. The external control circuit supplies a low level Rst to the gate of the TFT transistor M2, and the TFT transistor M2 is turned off. The external control circuit provides a high level (RO W) to the gate of the tt transistor M5, the source and drain of said tt transistor M5 being turned on, and the Vc c electrical signal flowing through the tt transistors M4, M3 and M5 being sensed by the acquisition module 11. The magnitude of the current and/or voltage that vc can reach the acquisition module 11 is related to the magnitude of the voltage at the gate of the tt transistor M4, and the greater the voltage at the gate of the tt transistor M4, the greater the current and/or voltage that the acquisition module 11 senses, so that the ultrasonic recognition circuit 10 can sense the magnitude of the reflected ultrasonic signal. Thus, one cycle of the control signal is completed and the control signal is reciprocated in a subsequent cycle.
The invention also provides a fingerprint identification sensor which adopts the ultrasonic identification circuit 10. The fingerprint recognition sensor includes a plurality of the above-mentioned ultrasonic recognition circuits 10, and the plurality of ultrasonic recognition circuits 10 are arrayed, wherein a signal received by the gate of the T F T transistor M3 in each ultrasonic recognition circuit 10 is recorded as a row selection signal, and a signal received by the gate of the T F T transistor M4 is recorded as a column selection signal. When the acquisition module 11 acquires the electric signal of vc, the control circuit can know the position, such as the number of rows and the number of columns, of the ultrasonic recognition circuit 10 that detects the received ultrasonic wave.
Compared with the prior art, the ultrasonic identification circuit comprises a receiver Rx, three T-shaped transistors M1, M3 and M4, wherein the receiver Rx has a piezoelectric effect, a first end of the receiver Rx is electrically connected with an external control circuit, a second end of the receiver Rx is electrically connected with a grid electrode of the T-shaped transistor M4 and a first end of the T-shaped transistor M1 at the same time, the grid electrode and the second end of the T-shaped transistor M1 are electrically connected with an external control circuit, the first end of the T-shaped transistor M4 is electrically connected with an external power Vc, the second end of the T-shaped transistor M4 is electrically connected with the first end of the T-shaped transistor M3, the grid electrode of the T-shaped transistor M3 is electrically connected with an external control circuit, a second end acquisition module of the T-shaped transistor M3 is not connected with the T-shaped transistor in parallel by a diode, the ultrasonic identification circuit is simple in structure, manufacturing process compatibility is good, the process is easy, and the external control circuit can not supplement the ultrasonic energy to the first end of the receiver Rx through the T-shaped transistor M1, and the external control circuit can not supplement the pulse energy to the external receiver Rx.
Compared with the prior art, the fingerprint identification sensor provided by the invention adopts the ultrasonic identification circuit, does not need to use a diode to be connected with the TF T transistor in parallel, has a simple structure, good manufacturing process compatibility and simple process, is easy to manufacture, and can supplement energy to the receiver Rx through the TF T transistor M1 by an external control circuit, so that the pulse voltage provided by the external control circuit to the first end of the receiver Rx is reduced, and the energy of ultrasonic waves emitted by the receiver Rx is not excessively large.
The ultrasonic recognition circuit comprises a plurality of ultrasonic recognition circuits, the ultrasonic recognition circuits are arranged in an array, the fingerprint recognition sensor is simple in structure, the positions of the circuits for receiving ultrasonic waves can be easily detected, and the detection is accurate.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the invention, but any modifications, equivalents, improvements, etc. within the principles of the present invention should be included in the scope of the present invention.
Claims (9)
1. An ultrasonic recognition circuit for receiving control of an external control circuit, generating ultrasonic waves and receiving reflected ultrasonic waves to generate electric signals to be transmitted to an acquisition module, characterized in that: the ultrasonic wave identification circuit comprises a receiver Rx, three TFT transistors M1, M3 and M4, wherein the receiver Rx has a piezoelectric effect, a first end of the receiver Rx is electrically connected with an external control circuit, and the external control circuit provides pulse voltage for the first end of the receiver Rx so as to enable the receiver Rx to generate ultrasonic waves; the second end of the receiver Rx is electrically connected with the gate of the TFT transistor M4 and the first end of the TFT transistor M1, the gate and the second end of the TFT transistor M1 are electrically connected with an external control circuit, the first end of the TFT transistor M4 is electrically connected with the external power supply Vcc, the second end of the TFT transistor M4 is electrically connected with the first end of the TFT transistor M3, the gate of the TFT transistor M3 is electrically connected with the external control circuit, and the second end of the TFT transistor M3 is electrically connected with the acquisition module; the ultrasonic recognition circuit further comprises a TFT transistor M5, the second end of the TFT transistor M3 is electrically connected with the first end of the TFT transistor M5, the grid electrode of the TFT transistor M5 is electrically connected with an external control circuit, and the second end of the TFT transistor M5 is electrically connected with the acquisition module.
2. The ultrasonic identification circuit of claim 1, wherein: the ultrasonic recognition circuit further comprises a TFT transistor M2, wherein a first end of the TFT transistor M2 is electrically connected with a second end of the TFT transistor M3, and a grid electrode and the second end of the TFT transistor M2 are electrically connected with an external control circuit.
3. The ultrasonic identification circuit of claim 1, wherein: the acquisition module is a silicon-based processing chip.
4. The ultrasonic identification circuit of claim 1, wherein: an external control circuit connected to the drain of the TFT transistor M1 is a supplemental energy circuit that provides a stable voltage and/or current.
5. The ultrasonic identification circuit of claim 4, wherein: the external control circuit provides a receiver reset level for the grid electrode of the TFT transistor M1, the source electrode and the drain electrode of the TFT transistor M1 are electrically conducted, the voltage of the second end of the receiver Rx is equal to the voltage provided by the complementary energy circuit, then the external control circuit provides a short pulse signal for the first end of the receiver Rx, the receiver Rx generates an ultrasonic signal and emits the ultrasonic signal, then the external control circuit provides a gate voltage level for the grid electrode of the TFT transistor M1, the ultrasonic wave is blocked and reflected back, the receiver Rx receives the ultrasonic oscillation to generate an oscillation signal, when the voltage of the oscillation signal is low, the complementary energy circuit supplements energy for the second end of the receiver Rx through the TFT transistor M1, the voltage of the second end of the receiver Rx is high, the current and/or the voltage of the electric signal of an external power supply Vcc are made large through the drain electrode and the source electrode of the TFT transistor M4, the external control circuit provides a gate voltage level for the TFT transistor M3, the source electrode and the electric signal of the TFT transistor Vcc are conducted through the TFT transistor M4, and the voltage of the electric signal is sensed by the TFT transistor M3 to the voltage of the gate voltage of the reset module is greater than the voltage of the receiving level.
6. The ultrasonic identification circuit of claim 5, wherein: when the external control circuit provides a receiver reset level for the gate of the TFT transistor M1, the external control circuit provides a voltage with proper size for the source of the TFT transistor M2 and constant whole period size, the external control circuit provides a short high level for the gate of the TFT transistor M2, the external energy supplementing circuit always provides a constant whole period size voltage for the second end of the TFT transistor M1, the external power supply Vcc continuously provides a constant whole period size current and/or voltage for the first end of the TFT transistor M4, the external control circuit provides a low level for the gate of the TFT transistor M1, the external control circuit provides a stable voltage for the voltage Tx provided by the first end of the receiver Rx, and the external control circuit provides a low level for the gate of the TFT transistor M3.
7. The ultrasonic identification circuit of claim 4, wherein: the voltage of an electrical node between the source electrode of the TFT transistor M3 and the drain electrode of the TFT transistor M5 is reset, so that the voltage Vpe of the second end of the receiver Rx is reset, the voltage Vpe of the second end of the receiver Rx is equal to the voltage provided by an external control circuit, then the receiver Rx generates a piezoelectric effect to emit ultrasonic waves, the TFT transistor M1 is ready for receiving the ultrasonic waves, the voltage provided by an external complementary energy circuit to the second end of the TFT transistor M1 is raised, the voltage after the rise is larger than the threshold voltage of the TFT transistor M1, the gate voltage level is provided for the grid electrode of the TFT transistor M1 by the external control circuit, the TFT transistor M1 is in a critical conduction state, the voltage Vpe of the second end of the receiver Rx is enabled to be complementary energy through the TFT transistor M1, the voltage Vpe of the second end of the receiver Rx is gradually raised, the voltage Vpe of the second end of the receiver Rx is enabled to be gradually stabilized, then the ultrasonic waves touch objects to be received by the receiver Rx, an oscillating signal is generated due to the fact that the voltage change of the two ends of the receiver Rx is generated, the external complementary energy circuit is gradually raised to be larger than the threshold voltage of the TFT transistor M1, the voltage of the TFT transistor M1 is enabled to be gradually raised to be higher than the threshold voltage of the TFT transistor M1, the voltage is enabled to be higher than the voltage of the TFT transistor M4, the voltage is enabled to be higher than the voltage Vpe is enabled to be lower than the other end of the TFT transistor Vpe is enabled to be lower than the other end is enabled to be higher, and the TFT is enabled to be lower than the object is enabled to be lower.
8. A fingerprint identification sensor, characterized in that: the fingerprint recognition sensor employs the ultrasonic recognition circuit of any one of claims 1-7.
9. The fingerprint recognition sensor of claim 8, wherein: the ultrasonic recognition circuit comprises a plurality of ultrasonic recognition circuits and a plurality of ultrasonic recognition circuit arrays.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810645441.5A CN108596160B (en) | 2018-06-21 | 2018-06-21 | Ultrasonic wave recognition circuit and fingerprint recognition sensor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810645441.5A CN108596160B (en) | 2018-06-21 | 2018-06-21 | Ultrasonic wave recognition circuit and fingerprint recognition sensor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108596160A CN108596160A (en) | 2018-09-28 |
| CN108596160B true CN108596160B (en) | 2023-10-31 |
Family
ID=63628611
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810645441.5A Active CN108596160B (en) | 2018-06-21 | 2018-06-21 | Ultrasonic wave recognition circuit and fingerprint recognition sensor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108596160B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110110691B (en) | 2019-05-16 | 2021-04-02 | 京东方科技集团股份有限公司 | Fingerprint identification driving circuit, fingerprint identification driving device, touch screen and driving method |
| CN110245636B (en) * | 2019-06-20 | 2021-08-10 | 京东方科技集团股份有限公司 | Fingerprint identification module, display panel, display device and fingerprint identification method |
| CN112181187B (en) * | 2019-07-04 | 2022-04-15 | 京东方科技集团股份有限公司 | Ultrasonic induction circuit, driving method thereof and display device |
| CN111079719B (en) * | 2020-01-19 | 2024-08-13 | 成都芯曌科技有限公司 | Ultrasonic circuit, fingerprint identification sensor and electronic equipment |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106897715A (en) * | 2017-03-31 | 2017-06-27 | 努比亚技术有限公司 | A kind of unlocked by fingerprint processing method and mobile terminal |
| CN107092900A (en) * | 2017-06-01 | 2017-08-25 | 京东方科技集团股份有限公司 | Fingerprint recognition circuit and its driving method, display panel |
| CN107220630A (en) * | 2017-06-07 | 2017-09-29 | 京东方科技集团股份有限公司 | Display base plate and its driving method, display device |
| CN107923969A (en) * | 2015-09-01 | 2018-04-17 | 高通股份有限公司 | The pixel receiver with capacitance elimination for supersonic imaging device |
| CN107977602A (en) * | 2017-10-10 | 2018-05-01 | 成都安瑞芯科技有限公司 | Ultrasonic fingerprint identification module, module, device and electronic equipment |
| CN108024792A (en) * | 2015-09-26 | 2018-05-11 | 高通股份有限公司 | Ultrasonic imaging apparatus and method |
| CN208521297U (en) * | 2018-06-21 | 2019-02-19 | 成都安瑞芯科技有限公司 | Ultrasonic wave identification circuit and fingerprint Identification sensor |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011143279A1 (en) * | 2010-05-11 | 2011-11-17 | Ultra-Scan Corporation | Reflex longitudinal imaging using through sensor insonification |
| US20140266262A1 (en) * | 2013-03-14 | 2014-09-18 | Perkinelmer Holdings, Inc. | High resolution fingerprint imaging device |
| JP2016525751A (en) * | 2013-07-15 | 2016-08-25 | クアルコム，インコーポレイテッド | Method and integrated circuit for operating a sensor array |
| US9817108B2 (en) * | 2014-01-13 | 2017-11-14 | Qualcomm Incorporated | Ultrasonic imaging with acoustic resonant cavity |
| US10095907B2 (en) * | 2016-08-11 | 2018-10-09 | Qualcomm Incorporated | Single transducer fingerprint system |
-
2018
- 2018-06-21 CN CN201810645441.5A patent/CN108596160B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107923969A (en) * | 2015-09-01 | 2018-04-17 | 高通股份有限公司 | The pixel receiver with capacitance elimination for supersonic imaging device |
| CN108024792A (en) * | 2015-09-26 | 2018-05-11 | 高通股份有限公司 | Ultrasonic imaging apparatus and method |
| CN106897715A (en) * | 2017-03-31 | 2017-06-27 | 努比亚技术有限公司 | A kind of unlocked by fingerprint processing method and mobile terminal |
| CN107092900A (en) * | 2017-06-01 | 2017-08-25 | 京东方科技集团股份有限公司 | Fingerprint recognition circuit and its driving method, display panel |
| CN107220630A (en) * | 2017-06-07 | 2017-09-29 | 京东方科技集团股份有限公司 | Display base plate and its driving method, display device |
| CN107977602A (en) * | 2017-10-10 | 2018-05-01 | 成都安瑞芯科技有限公司 | Ultrasonic fingerprint identification module, module, device and electronic equipment |
| CN208521297U (en) * | 2018-06-21 | 2019-02-19 | 成都安瑞芯科技有限公司 | Ultrasonic wave identification circuit and fingerprint Identification sensor |
Non-Patent Citations (1)
| Title |
|---|
| Ultrasonic Fingerprint Sensor With Transmit Beamforming Based on a PMUT Array Bonded to CMOS Circuitry;X. Jiang等;IEEE Transactions on Ultrasonics, Ferroelectrics, and Frequency Control;第66卷(第9期);第1401-1408页 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108596160A (en) | 2018-09-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108596160B (en) | Ultrasonic wave recognition circuit and fingerprint recognition sensor | |
| US11106884B2 (en) | Fingerprint identification component, fingerprint identification method and fingerprint identification device | |
| CN107092900B (en) | Fingerprint recognition circuit and its driving method, display panel | |
| CN107659204B (en) | Ultrasonic driving circuit and fingerprint identification sensor | |
| US10318787B2 (en) | Fingerprint photocurrent detection unit, fingerprint identifier, driving method and display device | |
| US11620847B2 (en) | Fingerprint recognition device and a driving method thereof | |
| CN110110691B (en) | Fingerprint identification driving circuit, fingerprint identification driving device, touch screen and driving method | |
| WO2018090366A1 (en) | Fingerprint sensor and electronic terminal | |
| US8113433B2 (en) | Memory device | |
| US11302859B2 (en) | Zero-power wake-up sensing circuit in piezoelectric haptic feedback | |
| CN102710241A (en) | Passive radio-frequency recognition power-on-reset circuit and passive radio-frequency recognition tag | |
| CN108776797B (en) | Fingerprint identification circuit, driving method thereof and display device | |
| US10921158B2 (en) | Power supply generating circuit, capacitive array sensing apparatus and terminal device | |
| CN113158737A (en) | Ultrasonic fingerprint detection sensor and module | |
| EP1435563A2 (en) | Input apparatus having electrostatic sensor | |
| EP4205020A1 (en) | Biometric skin contact sensor and method of operating a biometric skin contact sensor | |
| CN208521297U (en) | Ultrasonic wave identification circuit and fingerprint Identification sensor | |
| CN111435833A (en) | Pen with writing-in function | |
| CN111259708A (en) | Fingerprint identification method, storage medium, fingerprint identification system and intelligent device | |
| US11010578B2 (en) | Capacitive fingerprint recognition unit, capacitive measurement circuit of fingerprint sensor, and fingerprint recognition device having same | |
| US20080266061A1 (en) | Transponder circuit with double clock extractor unit | |
| US10732734B2 (en) | Transmitting type electronic pen and signal transmitting circuit thereof | |
| WO2019127580A1 (en) | Photosensitive circuit, photosensitive device, and electronic device | |
| US20210264846A1 (en) | Pixel circuit, method for driving the same, and display panel | |
| WO2021228043A1 (en) | Press button system and interactive device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20190704 Address after: 611600 Bajiao Village Group 5, Shou'an Town, Pujiang County, Chengdu City, Sichuan Province Applicant after: Fang Rong Address before: 610000 South Tianfu Avenue, Tianfu New District, Chengdu City, Sichuan Province, 2039 Tianfu Jingrong Building, 16th Floor, 1609 Applicant before: CHENGDU ANRUIXIN TECHNOLOGY CO.,LTD. |
|
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20200624 Address after: No.88, Yingbin Avenue, Shouan Town, Pujiang County, Chengdu City, Sichuan Province Applicant after: Chengdu Dachao Technology Co.,Ltd. Address before: 611600 Bajiao Village Group 5, Shou'an Town, Pujiang County, Chengdu City, Sichuan Province Applicant before: Fang Rong |
|
| TA01 | Transfer of patent application right | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |