CN108594279B - Device suitable for monitoring and receiving multi-system navigation signals - Google Patents

Device suitable for monitoring and receiving multi-system navigation signals Download PDF

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CN108594279B
CN108594279B CN201810634590.1A CN201810634590A CN108594279B CN 108594279 B CN108594279 B CN 108594279B CN 201810634590 A CN201810634590 A CN 201810634590A CN 108594279 B CN108594279 B CN 108594279B
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signal
processing module
frequency
intermediate frequency
signals
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CN108594279A (en
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孟祥�
艾伦
成洁
张彦超
曾辉艳
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Beijing Research Institute of Telemetry
Aerospace Long March Launch Vehicle Technology Co Ltd
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Beijing Research Institute of Telemetry
Aerospace Long March Launch Vehicle Technology Co Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/35Constructional details or hardware or software details of the signal processing chain
    • G01S19/37Hardware or software details of the signal processing chain
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/33Multimode operation in different systems which transmit time stamped messages, e.g. GPS/GLONASS

Abstract

A device suitable for monitoring and receiving multi-system navigation signals comprises a radio frequency processing module and the like. The radio frequency signal processed by the receiving antenna and the low noise amplifier firstly enters a radio frequency processing module to complete the analog down conversion processing to obtain an analog intermediate frequency signal; secondly, after AD sampling, the digital intermediate frequency signal enters an intermediate frequency processing unit of an intermediate frequency and information processing module to complete intermediate frequency processing and anti-interference functions of the signal, and a digital intermediate frequency signal is obtained; the signal enters the baseband processing module again, the despreading and demodulation of the signal are completed, the signal is sent to an information processing unit of the intermediate frequency and information processing module, and the required observation data is obtained through resolving; finally, the observation data is sent to external data processing software through the network port by the interface module to complete the monitoring function of the navigation signal; the device has the characteristics of small volume, low power consumption, high integration level and high measurement precision, and can receive signals to cover all civil signals of the Beidou global, GPS, GLONASS and Galileo systems.

Description

Device suitable for monitoring and receiving multi-system navigation signals
Technical Field
The invention relates to a device suitable for monitoring and receiving multi-system navigation signals, and belongs to the field of Beidou navigation.
Background
With the development of global satellite navigation systems, satellite navigation signals existing in space are greatly changed from the signal component number or the signal system. The current Beidou navigation system has seven civil signals B1I, B2I, B3I, B1C, B2a, B2B and B3C, the GPS has four signals L1C/A, L2P, L2C and L5, the Galileo has three signals E1B/C, E5a and E5B, and the GLONASS has two frequency division multiple access signals L1 and L2 and one code division multiple access signal L3. With global networking of the Beidou system and modernization of the GPS, signals B1C, B2a, L2C and L5 of a new system will replace signals B1I, B2I, B3I and L1C/A. In addition, with the development of Galileo and GLONASS, joint positioning of multiple satellite navigation systems becomes inevitable. Most of the existing navigation signal monitoring and receiving devices are based on a design of receiving only some signal components in the navigation signals of the second beidou satellite navigation signals B1I, B2I and B3I or the double-frequency navigation signals of the second beidou satellite navigation signals plus GPS L1C/A and L2P, and the design can not meet the requirements of the current satellite navigation signal receiving equipment.
Therefore, hundreds of independent receiving channels need to be designed on software of a navigation signal monitoring and receiving device for receiving all civil signals of the Beidou global system, the GPS system, the GLONASS system and the Galileo system, and higher signal processing speed and more FPGA logic resources are needed on hardware, so that the increase of the volume, the complexity and the power consumption of the navigation signal monitoring and receiving device is certainly brought.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: the device for monitoring and receiving the navigation signals overcomes the defects of the conventional navigation signal monitoring and receiving device, and provides the device suitable for monitoring and receiving the navigation signals of multiple systems, wherein the received navigation signals cover all civil signals of the Beidou global system, the GPS system, the GLONASS system and the Galileo system, and the device has the characteristics of small volume, low power consumption, high integration level and high measurement precision.
The technical scheme adopted by the invention is as follows: a device suitable for monitoring and receiving multi-system navigation signals is characterized by comprising a radio frequency processing module, an intermediate frequency and information processing module, a baseband processing module, an interface module, a display module and a time frequency module;
the radio frequency processing module comprises a preamplifier, a power divider, an F1 signal channel and an F2 signal channel, wherein the preamplifier of the radio frequency processing module is used for amplifying radio frequency signals processed by a receiving antenna and a low noise amplifier, the radio frequency signals are divided into two paths through the power divider, the two paths of radio frequency signals respectively enter an F1 signal channel and an F2 signal channel, and the radio frequency signals in the F1 signal channel and the F2 signal channel are respectively subjected to band-pass filtering, amplification, down-conversion and low-pass filtering to complete analog down-conversion processing so as to obtain analog intermediate frequency signals;
the intermediate frequency and information processing module comprises an intermediate frequency processing unit and an information processing unit, wherein the intermediate frequency processing unit performs analog-to-digital conversion, digital down-conversion, narrowband and pulse anti-interference processing and digital signal quantization on received analog intermediate frequency signals to obtain digital intermediate frequency signals, and the digital intermediate frequency signals are sent to the baseband processing module; the information processing unit receives original observation data, navigation messages and state parameters which are de-spread and demodulated by the baseband processing module, and provides pseudo range, carrier phase, Doppler, navigation messages, working condition parameters, state parameters, time parameters and local time scale signals for the interface module and the display module through local time establishment and calibration, pseudo range calculation, navigation message analysis and positioning calculation;
the baseband processing module completes the receiving measurement, loop state indication, multipath inhibition and channel delay monitoring of the multi-system navigation signals through the acquisition, tracking, pseudo-range measurement, carrier phase measurement, Doppler measurement, navigation message demodulation and conversion and signal quality monitoring of the digital intermediate frequency signals;
the interface module realizes the functions of setting and responding a control instruction of the device, inquiring an operation log and self-checking and restarting the device through a network port, a serial communication interface and a CF card;
the display module displays pseudo range, carrier phase, Doppler, navigation message parameters and positioning resolving results, and simultaneously provides the functions of inquiring the working state parameters of the device and displaying abnormal working state alarms;
the time-frequency module comprises a phase-locked constant-temperature crystal oscillator and a driving amplifying circuit, the phase-locked constant-temperature crystal oscillator generates a frequency scale signal required by the working of the device, when the input of an external frequency scale signal is detected, the internal frequency scale is automatically locked to the external frequency scale, the automatic switching of the working of the internal frequency scale and the external frequency scale is realized, and a locking indication signal is output to the intermediate frequency and information processing module; the driving amplification circuit amplifies the frequency scale signal output by the phase-locked constant-temperature crystal oscillator, and the frequency scale signal is respectively input to the radio frequency processing module, the intermediate frequency processing module and the information processing module through the power divider.
The parameters of the F1 signal path are as follows: the frequency band is 1155.99 MHz-1288.75 MHz, the bandwidth is 133MHz, the central frequency point is 1222.37MHz, and navigation signals which can be processed by an F1 signal channel comprise B2I, B2a/B, B3I, B3C, L5, L2C, L2P, E5a, E5B and G2C/A, G3OC navigation signals.
The parameters of the F2 signal path are as follows: the frequency band is 1550.92 MHz-1599.92 MHz, the bandwidth is 49MHz, the central frequency point is 1575.42MHz, and navigation signals which can be processed by an F2 signal channel comprise B1C, B1I, L1C/A, L1C and G1C/A, E1B/C navigation signals.
The F1 signal channel comprises a first radio frequency amplifier, a first attenuation network, a first band-pass filter, a first VGA amplifier, a first balun, a first quadrature down converter and a first frequency synthesizer; the signal that the ware output is divided to merit gets into first decay network after carrying out signal amplification through first radio frequency amplifier and carries out signal attenuation and impedance matching, the signal after the attenuation passes through first band pass filter filtering clutter, reentrant first VGA amplifier carries out controllable gain amplification, then get into first balun, single-end signal conversion is differential signal output and gives first quadrature down converter, first frequency synthesizer output local oscillator signal to first positive pole down converter, first quadrature down converter is according to received local oscillator signal with differential signal down conversion for intermediate frequency signal and output.
The F2 signal channel comprises a second radio frequency amplifier, a second attenuation network, a second band-pass filter, a second VGA amplifier, a second balun, a second quadrature down converter and a second frequency synthesizer; the signal that the ware was exported is carried out signal amplification through the second radio frequency amplifier and then gets into the second decay network and carry out signal attenuation and impedance matching, the signal after the attenuation passes through the clutter of second band pass filter filtering, reentry second VGA amplifier carries out controllable gain amplification, then get into the second balun, convert the single-end signal into the difference signal and export for the second quadrature down converter, the local oscillator signal is exported to the second frequency synthesizer, the second quadrature down converter is according to the local oscillator signal received with the difference signal down conversion to intermediate frequency signal and export.
The intermediate frequency and information processing module is a MicroTCA embedded architecture and has a structure form of a carrier plate, and the intermediate frequency and information processing module serving as the carrier plate is interconnected with the AMC daughter card through an AMC connector; the intermediate frequency and information processing module adopts a DSP + FPGA architecture.
The baseband processing module is a MicroTCA embedded architecture and has a structure form of an AMC daughter card, and the baseband processing module is used as the AMC daughter card and is interconnected with the carrier plate through an AMC connector; the baseband processing module adopts a DSP + FPGA architecture.
And a RapidIO interconnection bus is adopted between the intermediate frequency and information processing module and the DSP of the baseband processing module to realize inter-board communication, and the RapidIO interconnection bus is configured into a 4-path 1x mode RapidIO interface.
LVDS SerDes communication is adopted between the FPGA of the intermediate frequency and information processing module and the FPGA of the baseband processing module.
The power supply module comprises a primary power supply and a secondary power supply, the primary power supply is an industrial standard 3U CPCI power supply module, the primary power supply is inserted into a power supply back plate in the device through a guide rail, and the primary power supply is connected with the power supply back plate through a PCIH47M400A 147 pin connector; the secondary power supply converts the voltage output by the primary power supply into the required direct-current voltage through the DC/DC power supply chip.
Compared with the prior art, the invention has the following advantages:
(1) the navigation signal received by the device of the invention covers all civil signals of the four systems of the Beidou global system, the GPS system, the GLONASS system and the Galileo system; the device has the characteristics of small volume, low power consumption and high integration level: the size of the case is 2U, the power consumption is less than or equal to 90W, and 826 independent receiving channels are designed;
(2) the radio frequency processing module of the invention designs the navigation signal into two frequency bands, and respectively amplifies, frequency converts and filters the two frequency bands and the local carrier frequency, thereby having the advantages of high sensitivity of receiving and processing weak signals, high dynamic capability of processing strong signals (interference signals), simple circuit structure and high reliability;
(3) the device of the invention has strong expandability: the intermediate frequency and information processing module and the baseband processing module are designed according to a MicroTCA embedded architecture to form a compact structural form of a carrier plate and an AMC daughter card, the intermediate frequency and information processing module is realized by one carrier plate, the baseband processing module is realized by a plurality of standard AMC daughter cards with the same hardware design, the carrier plate and the AMC daughter cards are interconnected through an AMC connector, and the whole machine supports eight daughter cards at most;
(4) the intermediate frequency and information processing module and the baseband processing module of the device adopt a design scheme of a DSP + FPGA architecture: the DSP is a fixed-point processor and has a 1.25GHz main frequency, a 2MB memory, rich peripheral resources, a larger DDR external storage, a RapidIO interconnection bus, a VCP decoder and a TCP decoder, and the two DSPs are communicated through the RapidIO interconnection bus, so that the DSP has the advantages of small delay, high reliability and no occupation of a CPU (central processing unit); the two modules FPGA communicate through LVDS SerDes, so that the advantages of high-speed long-distance transmission and IO resource saving are achieved;
(5) the device adopts a modular design, has the characteristics of easy disassembly and assembly, misplug prevention, generalization, serialization and combination, has good equipment interchangeability, strong universality and compatibility and high reliability, can accurately position the corresponding module after a fault occurs through the design of automatic test software, and is convenient for test and maintenance.
Drawings
FIG. 1 is a block diagram of a multi-system navigation signal monitoring and receiving device;
FIG. 2 is a block diagram of the RF processing module;
fig. 3 is a navigation band division diagram.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
The satellite navigation receiving device is integrated in a 2U case, and can simultaneously receive 28 Beidou global satellite civil signals (comprising B1I, B1C, B2I, B2a/B, B3I and B3C), 18 GPS satellite civil signals (comprising L1C/A, L1C, L2C, L2P and L5), 15 GLONASS satellite civil signals (comprising G1C/A, G2C/A, G3OC) and 15 Galileo satellite civil signals (comprising E1B/C, E5a and E5B) and 826 independent receiving channels in total.
The device adopts a modular design, as shown in figure 1, the device suitable for monitoring and receiving the multi-system navigation information comprises a radio frequency processing module, an intermediate frequency and information processing module, a baseband processing module, an interface module, a display module, a power supply module and a time frequency module, has definite functions, can accurately position the corresponding module after a fault occurs by means of automatic test software design, simultaneously adopts a design with easy disassembly, easy installation, error insertion prevention, generalization, serialization and combination, has good equipment interchangeability, strong universality and compatibility, high reliability and is convenient for testing and maintenance.
The radio frequency processing module comprises a preamplifier, a power divider, an F1(1.2GHz) signal channel and an F2(1.5GHz) signal channel, wherein the two signal channels are completely consistent in hardware design and comprise an amplifier, an attenuation network, a band-pass filter, a VGA amplifier, a balun, a quadrature down converter and a frequency synthesizer, and a block diagram of the radio frequency processing module is shown in figure 2. The radio frequency signals processed by the receiving antenna and the low noise amplifier are firstly amplified by a preposed broadband amplifier of a radio frequency processing module, then divided into two channels F1 and F2 by a power divider to be respectively amplified, and then enter an attenuation network to be subjected to signal attenuation and impedance matching, the attenuated signals pass through a band-pass filter to filter noise waves, then enter a VGA amplifier to be subjected to controllable gain amplification, then enter a balun to convert single-end signals into differential signals and output the differential signals to an orthogonal down converter, local oscillator signals are output by means of a received frequency synthesizer, and the orthogonal down converter down converts the differential signals into intermediate frequency signals according to the output signals of the received frequency synthesizer and outputs the intermediate frequency signals. In order to meet the requirement that the received signals cover all civil signals of four systems, namely the Beidou global system, the GPS system, the GLONASS system and the Galileo system, the navigation signals are designed in two frequency bands as shown in figure 3:
1) the parameters of the F1 frequency band are as follows: the frequency band is 1155.99 MHz-1288.75 MHz, the bandwidth is 133MHz, the central frequency point is 1222.37MHz, and navigation signals which can be processed by an F1 signal channel comprise B2I, B2a/B, B3I, B3C, L5, L2C, L2P, E5a, E5B and G2C/A, G3OC signals;
2) the parameters of the F2 frequency band are as follows: the frequency band is 1550.92 MHz-1599.92 MHz, the bandwidth is 49MHz, the central frequency point is 1575.42MHz, and navigation signals which can be processed by an F2 signal channel comprise B1C, B1I, L1C/A, L1C and G1C/A, E1B/C signals.
The radio frequency processing module respectively amplifies, frequency converts and filters the two frequency bands and the local carrier frequency, and has the advantages of high sensitivity for receiving and processing weak signals, high dynamic capability for processing strong signals, particularly interference signals, simple circuit structure and high reliability.
The analog intermediate frequency signal is subjected to the functions of analog-to-digital conversion, digital down conversion, narrowband and pulse anti-interference processing and digital signal quantization of the analog intermediate frequency signal by the intermediate frequency processing unit, and a digital intermediate frequency signal is provided for the baseband processing module; the information processing unit receives original observation data, navigation messages and state parameters which are de-spread and demodulated by the baseband processing module, and provides pseudo range, carrier phase, Doppler, navigation messages, working condition parameters, state parameters, time parameters and local time scale signals for the interface module and the display module through local time establishment and calibration, pseudo range calculation, navigation message analysis and positioning calculation.
The baseband processing module completes the receiving measurement, loop state indication, multipath inhibition and channel delay monitoring of the multi-system navigation signals through the capturing, tracking, pseudo-range measurement, carrier phase measurement, Doppler measurement, navigation message demodulation and conversion and signal quality monitoring of the digital intermediate frequency signals.
The intermediate frequency and information processing module and the baseband processing module refer to a MicroTCA embedded architecture in design to form a compact structural form of a carrier plate and an AMC daughter card. The intermediate frequency and information processing module is realized by one carrier plate, the baseband processing module is realized by a plurality of standard AMC daughter cards with the same hardware design, the carrier plate and the AMC daughter cards are interconnected through AMC connectors, the whole machine supports eight daughter cards at most, and the expandability is good.
The intermediate frequency and information processing module and the baseband processing module both adopt a design scheme of a 'DSP + FPGA' architecture, the model specifications of DSP processors selected by the two modules are the same, and the two modules are a fixed-point processor and have the characteristics of 1.25GHz main frequency, 2MB memory, abundant peripheral resources, larger DDR external storage, RapidIO interconnection bus, VCP decoder and TCP decoder.
And a high-speed RapidIO interconnection bus technology is adopted between the information processing unit of the intermediate frequency and information processing module and the DSP of the baseband processing module to realize the inter-board communication. The RapidIO bus has the characteristics of high speed, high bandwidth, low time delay and transparency to software, the DSP selected by the device can be configured into a 4-path 1x mode RapidIO interface, and the communication speed can reach 3.125 Gbps. The communication is based on a packet switching communication protocol, the read-write request tasks are all based on configuring corresponding DMA registers, CPU intervention is not needed after the tasks are started, and the method is suitable for transmission of mass data. The original observed quantity and the navigation message data quantity between the information processing unit and the baseband processing module are large, and RapidIO communication has the advantages of small delay, high reliability and no occupation of a CPU (central processing unit).
The intermediate frequency processing unit of the intermediate frequency and information processing module and the FPGA of the baseband processing module communicate by adopting LVDS SerDes (Low Voltage differential Signal serializer/deserializer). The FPGA selected by the two modules provides an IP core for LVDS signal processing, and a special IP core can be directly called for high-speed LVDS signals (digital intermediate frequency signals) to complete data transmission. An intermediate frequency processing unit FPGA of the intermediate frequency and information processing module designs a plurality of LVDS transmitting cores (altlvds _ tx): the parallel signals are serialized into LVDS signals and then transmitted, and a baseband processing module FPGA designs a plurality of LVDS receiving cores (altlvds _ rx): and receiving the LVDS serial signals and parallelizing the signals for post-processing. Major features of LVDS SerDes include:
1) the LVDS SerDes is embedded in a data line by a clock, and a clock signal does not need to be transmitted;
2) LVDS SerDes can realize high-speed long-distance transmission through an emphasis/equalization technology, LVDS SerDes data in the device of the invention is communicated through an AMC connector, and the designed speed is 400 Mbps;
3) LVDS SerDes uses less FPGA pins, one SerDes channel only uses 4 pins (TX +/-, RX +/-), the current FPGA can achieve the communication speed of 28Gbps, the line speed of 16-bits DDR3-1600 is 25Gbps, but 50 pins are needed, and the advantage of the LVDS SerDes on the transmission bandwidth can be seen through comparison.
The interface module is an operation interface between a user and the device, and realizes the functions of setting and responding a control instruction of the device, inquiring an operation log and self-checking and restarting the device through a network port, a serial communication interface and a CF card.
The display module is a touch liquid crystal screen, communicates with the intermediate frequency and information processing module through an asynchronous serial interface, displays pseudo-range, carrier phase, Doppler, navigation message parameters and positioning resolving results, and simultaneously provides the functions of working state parameter query and working state abnormity warning display of the device.
The power module consists of a primary power supply and a secondary power supply, wherein the primary power supply is an industrial standard 3U CPCI power module, the power module is inserted into a power supply back plate in the device through a guide rail, and the power module and the power supply back plate are connected through a PCIH47M400A 147 pin connector, so that the installation and replacement are very convenient, and meanwhile, the overcurrent and overvoltage protection functions are realized; the secondary power supply outputs +5V and + -12V of the primary power supply through a DC/DC power supply chip according to the working requirement of each module circuit in the device, and the direct current voltage required by design generation comprises +3.3V, +2.5V, +1.8V, +1.25V, +1.1V and + 0.9V.
The time-frequency module consists of a phase-locked constant-temperature crystal oscillator and a driving amplifying circuit, the phase-locked constant-temperature crystal oscillator is a core component of the time-frequency module and can independently generate frequency scale signals required by equipment to work, when the input of external frequency scale signals is detected, an internal frequency scale can be automatically locked to an external frequency scale, the automatic switching of the work of the internal frequency scale and the external frequency scale is realized, and locking indication signals are output; the driving amplifying circuit amplifies the output of the phase-locked constant-temperature crystal oscillator, and frequency standard signal input is respectively provided for the radio frequency processing module, the intermediate frequency processing module and the information processing module through the power divider.
Those skilled in the art will appreciate that the details of the invention not described in detail in this specification are well within the skill of those in the art.

Claims (8)

1. A device suitable for monitoring and receiving multi-system navigation signals is characterized by comprising a radio frequency processing module, an intermediate frequency and information processing module, a baseband processing module, an interface module, a display module and a time frequency module;
the radio frequency processing module comprises a preamplifier, a first power divider, an F1 signal channel and an F2 signal channel, wherein the preamplifier of the radio frequency processing module is used for amplifying radio frequency signals processed by a receiving antenna and a low noise amplifier, the radio frequency signals are divided into two paths through the first power divider, the two paths of radio frequency signals respectively enter an F1 signal channel and an F2 signal channel, and the radio frequency signals in the F1 signal channel and the F2 signal channel are respectively subjected to band-pass filtering, amplification, down-conversion and low-pass filtering to complete analog down-conversion processing so as to obtain analog intermediate frequency signals;
the intermediate frequency and information processing module comprises an intermediate frequency processing unit and an information processing unit, wherein the intermediate frequency processing unit performs analog-to-digital conversion, digital down-conversion, narrowband and pulse anti-interference processing and digital signal quantization on received analog intermediate frequency signals to obtain digital intermediate frequency signals, and the digital intermediate frequency signals are sent to the baseband processing module; the information processing unit receives original observation data, navigation messages and state parameters which are de-spread and demodulated by the baseband processing module, and provides pseudo range, carrier phase, Doppler, navigation messages, working condition parameters, state parameters, time parameters and local time scale signals for the interface module and the display module through local time establishment and calibration, pseudo range calculation, navigation message analysis and positioning calculation;
the baseband processing module completes the receiving measurement, loop state indication, multipath inhibition and channel delay monitoring of the multi-system navigation signals through the acquisition, tracking, pseudo-range measurement, carrier phase measurement, Doppler measurement, navigation message demodulation and conversion and signal quality monitoring of the digital intermediate frequency signals;
the interface module realizes the functions of setting and responding a control instruction of the device, inquiring an operation log and self-checking and restarting the device through a network port, a serial communication interface and a CF card;
the display module displays pseudo range, carrier phase, Doppler, navigation message parameters and positioning resolving results, and simultaneously provides the functions of inquiring the working state parameters of the device and displaying abnormal working state alarms;
the time-frequency module comprises a phase-locked constant-temperature crystal oscillator and a driving amplifying circuit, the phase-locked constant-temperature crystal oscillator generates a frequency scale signal required by the working of the device, when the input of an external frequency scale signal is detected, the internal frequency scale is automatically locked to the external frequency scale, the automatic switching of the working of the internal frequency scale and the external frequency scale is realized, and a locking indication signal is output to the intermediate frequency and information processing module; the driving amplification circuit amplifies a frequency scale signal output by the phase-locked constant-temperature crystal oscillator, and the frequency scale signal is input to the radio frequency processing module, the intermediate frequency processing module and the information processing module through the second power divider;
the F1 signal channel comprises a first radio frequency amplifier, a first attenuation network, a first band-pass filter, a first VGA amplifier, a first balun, a first quadrature down converter and a first frequency synthesizer; the signal output by the power divider is subjected to signal amplification through a first radio frequency amplifier, then enters a first attenuation network for signal attenuation and impedance matching, the attenuated signal is filtered to remove noise waves through a first band-pass filter, then enters a first VGA amplifier for controllable gain amplification, then enters a first balun, a single-end signal is converted into a differential signal and is output to a first orthogonal down converter, a first frequency synthesizer outputs a local oscillation signal to a first anode down converter, and the first orthogonal down converter down converts the differential signal into an intermediate frequency signal according to the received local oscillation signal and outputs the intermediate frequency signal;
the F2 signal channel comprises a second radio frequency amplifier, a second attenuation network, a second band-pass filter, a second VGA amplifier, a second balun, a second quadrature down converter and a second frequency synthesizer; the signal that the ware was exported is carried out signal amplification through the second radio frequency amplifier and then gets into the second decay network and carry out signal attenuation and impedance matching, the signal after the attenuation passes through the clutter of second band pass filter filtering, reentry second VGA amplifier carries out controllable gain amplification, then get into the second balun, convert the single-end signal into the difference signal and export for the second quadrature down converter, the local oscillator signal is exported to the second frequency synthesizer, the second quadrature down converter is according to the local oscillator signal received with the difference signal down conversion to intermediate frequency signal and export.
2. The apparatus of claim 1, wherein the apparatus is adapted to monitor reception of multiple system navigation signals: the parameters of the F1 signal path are as follows: the frequency band is 1155.99 MHz-1288.75 MHz, the bandwidth is 133MHz, the central frequency point is 1222.37MHz, and navigation signals which can be processed by an F1 signal channel comprise B2I, B2a/B, B3I, B3C, L5, L2C, L2P, E5a, E5B and G2C/A, G3OC navigation signals.
3. An apparatus for monitoring reception of a multi-system navigation signal according to claim 1 or 2, wherein: the parameters of the F2 signal path are as follows: the frequency band is 1550.92 MHz-1599.92 MHz, the bandwidth is 49MHz, the central frequency point is 1575.42MHz, and navigation signals which can be processed by an F2 signal channel comprise B1C, B1I, L1C/A, L1C and G1C/A, E1B/C navigation signals.
4. The apparatus of claim 1, wherein the apparatus is adapted to monitor reception of multiple system navigation signals: the intermediate frequency and information processing module is a MicroTCA embedded architecture and has a structure form of a carrier plate, and the intermediate frequency and information processing module serving as the carrier plate is interconnected with the AMC daughter card through an AMC connector; the intermediate frequency and information processing module adopts a DSP + FPGA architecture.
5. The apparatus of claim 4, wherein the apparatus is adapted to monitor reception of the multi-system navigation signal, and comprises: the baseband processing module is a MicroTCA embedded architecture and has a structure form of an AMC daughter card, and the baseband processing module is used as the AMC daughter card and is interconnected with the carrier plate through an AMC connector; the baseband processing module adopts a DSP + FPGA architecture.
6. An apparatus for monitoring reception of a multi-system navigation signal according to claim 4 or 5, wherein: and a RapidIO interconnection bus is adopted between the intermediate frequency and information processing module and the DSP of the baseband processing module to realize inter-board communication, and the RapidIO interconnection bus is configured into a 4-path 1x mode RapidIO interface.
7. The apparatus of claim 6, wherein the apparatus is adapted to monitor reception of the multi-system navigation signal, and further comprising: LVDS SerDes communication is adopted between the FPGA of the intermediate frequency and information processing module and the FPGA of the baseband processing module.
8. The apparatus of claim 1, wherein the apparatus is adapted to monitor reception of multiple system navigation signals: the power supply module comprises a primary power supply and a secondary power supply, the primary power supply is an industrial standard 3U CPCI power supply module, the primary power supply is inserted into a power supply back plate in the device through a guide rail, and the primary power supply is connected with the power supply back plate through a PCIH47M400A 147 pin connector; the secondary power supply converts the voltage output by the primary power supply into the required direct-current voltage through the DC/DC power supply chip.
CN201810634590.1A 2018-06-20 2018-06-20 Device suitable for monitoring and receiving multi-system navigation signals Active CN108594279B (en)

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