CN108574033A - LED device and preparation method thereof with field plate structure - Google Patents
LED device and preparation method thereof with field plate structure Download PDFInfo
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
Abstract
The present invention is a kind of LED device and preparation method thereof with field plate structure, and it includes substrate, buffer layer, N types semiconductor transport layer, multiple quantum well layer, P types current barrier layer, P types semiconductor transport layer, P type heavily-doped semiconductors transport layer, field plate structure layer, current extending and P type Ohmic electrodes successively which, which is along epitaxial growth direction,；The N type semiconductor pass layer segments expose, and N type Ohmic electrodes are distributed on exposed N type semiconductor transport layers；Wherein, field plate structure layer is located between P type heavily-doped semiconductor transport layers and current extending, and is embedded in current extending；Used insulating material is undoped SiO2, Al2O3, Si3N4, AlN, LiF, diamond or PMMA.LED device with field plate structure in the present invention, manufacture craft is simple, easily operated, and repeatability is strong, and production cost is low.
Description
Technical field
The present invention relates to LED semiconductor technical fields, specifically a kind of to have luminous the two of field plate structure
The preparation method of pole pipe device.
Background technology
In the fifties in last century, the appearance with germanium, silicon materials as first generation semiconductor, using integrated circuit as core
Microelectronics industry starts to have gradually developed, and such material is widely used in integrated circuit.Into after the nineties, second
For Semiconductor GaAs, indium phosphide etc. there is the semi-conducting material of high mobility to gradually appear so that wire communication technology is rapid
Development.Then in the beginning of this century, there is silicon carbide, gallium nitride etc. the third generation semi-conducting material of broad stopband also to come out one after another, with
Being constantly progressive for semiconductor devices technology of preparing, nitride LED LED technology correspondingly achieves sufficient development,
It is illuminated in communication, national defense and military, the fields such as sterilizing suffer from wide application prospect.
Currently, nitride LED LED technology main problem urgently to be resolved hurrily is the efficiency decline under high current.Phase
It closes research institution and finds mainly have lower hole injection efficiency, the delocalization of carrier and Auger multiple the reason of causing this phenomenon
The reasons such as conjunction.As previously noted the reason of, is all based on vertical distribution of the carrier in multiple quantum wells (MQWs).However in face
The Carrier Profile of (horizontal direction) is uneven, i.e., current crowding phenomenon influences equally to merit attention caused by device.It is related
The study found that hole has the effective mass heavier compared to electronics, therefore the mobility in hole then can be relatively low, in addition P-type material
The resistivity of the bed of material is higher, so that hole is easier crowded in the generation of P-type Ohmic electrode edge.Thereby result in LED light emitting diodes
The rate of radiative recombination of local high current concentration range reduces, so that the efficiency of LED declines extremely serious, while local height
Temperature area can seriously affect the performance and used life of device.Therefore the property of the current expansion to improvement LED component in hole is improved
Its service life can and be improved to have great importance.Researcher has been transformed LED's to improve the extending transversely of carrier
Device architecture, for example hole vertical direction is increased using the superlattice structure being positioned between multiple quantum wells and P-type material layer
Potential barrier, to improve hole current expansion in the horizontal direction, improve device external quantum efficiency [Yi-Jung Liu,
Chih-Hung Yen,et al.On a GaN-Based Light-Emitting Diode With a p-GaN/i-InGaN
Superlattice Structure,IEEE Electron Device Lett.30,1149(2009).]；In addition, proposing one
The kind LED with graphical silica current barrier layer structure, this LED enhance the current expansion effect of device, simultaneously
Make patterned cylinder as light dispersion centers, the probability that light has bigger is enable to project device, improves device performance [Jae-
Seong Park,Young Hoon Sung,et al.Use of a patterned current blocking layer to
enhance the light output power of InGaN-based light-emitting diodes,
Opt.Express 25,17556-17561(2017).].Although above two structure improves the cross of electric current to a certain extent
To expansion effect, device performance is made to have obtained certain promotion, but the hole vertical barrier layer of either superlattice type, or profit
With with graphical silica current barrier layer structure, their structure is complex, the requirement for growth technique
Height, general commercial production levels are relatively inaccessible to the standard that two kinds of devices are proposed.
Invention content
The technical problem to be solved by the present invention is to：LED device with field plate structure and its preparation side are provided
Method.The characteristics of device among current extending by being embedded in field plate structure, can share electric field using field plate structure so that
Higher electric field is weakened existing for the script of P-type Ohmic electrode edge, to which the current crowding for reducing the position is existing
As, so that the carrier of entire device inside is obtained preferably extending transversely, to enhance performance when LED operation,
Improve the efficiency of light emitting diode.In addition, due to transverse current distribution more uniformly, thus alleviate light emitting diode
Localized hyperthermia's phenomenon, extend the service life of device.
Technical solution is used by the present invention solves the technical problem：
A kind of LED device with field plate structure, the device main body are to include successively along epitaxial growth direction
Substrate, buffer layer, N-type semiconductor transport layer, multiple quantum well layer, P-type current barrier layer, P-type semiconductor transport layer, P-type
Heavily-doped semiconductor transport layer, field plate structure layer, current extending and P-type Ohmic electrode；The N-type semiconductor transport layer
Part exposes, and N-type Ohmic electrode is distributed on exposed N-type semiconductor transport layer；Wherein, field plate structure layer is located at P-type weight
Between doped semiconductor transport layer and current extending, and it is embedded in current extending；Used insulating material is undoped
SiO2, Al2O3, Si3N4, AlN, LiF, diamond or PMMA, thickness be 0.1~1000 μm, width be 1~1000 μm.
The substrate is sapphire, SiC, Si, AlN, GaN or quartz glass；Substrate along epitaxial growth direction difference
It is segmented into polar surface [0001] substrate, semi-polarity face [11-22] substrate or non-polar plane [1-100] substrate.
The material of the buffer layer is Alx1Iny1Ga1-x1-y1N；In formula, 0≤x1≤1,0≤y1≤1,0≤1-x1-y1≤
1, thickness is 10~50nm.
The material of the N-type semiconductor transport layer is Alx2Iny2Ga1-x2-y2N, wherein should ensure that each component coefficient 0≤
X2≤1,0≤y2≤1,0≤1-x2-y2≤1, thickness are 1~5 μm；The area of expose portion accounts for total N-type semiconductor transport layer
The ratio of area is 5%~90%, 1~5 μm of thickness range.
The multiple quantum well layer material is Alx3Iny3Ga1-x3-y3N/Alx4Iny4Ga1-x4-y4N, in formula, 0≤x3≤1,0≤
Y3≤1,0≤1-x3-y3≤1,0≤x4≤1,0≤y4≤1,0≤1-x4-y4≤1, the energy gap amount of should be higher than that quantum is built
The number of the energy gap of sub- trap, Quantum Well is more than or equal to 1；Quantum Well Alx3Iny3Ga1-x3-y3N thickness is 1~10nm, and quantum is built
Alx4Iny4Ga1-x4-y4N thickness is 5~50nm.
The material of the P-type current barrier layer is Alx5Iny5Ga1-x5-y5N, in formula, 0≤x5≤1,0≤y5≤1,0≤1-
X5-y5≤1, thickness are 10~100nm.
The material of the P-type semiconductor transport layer is Alx6Iny6Ga1-x6-y6N, in formula, 0≤x6≤1,0≤y6≤1,0≤
1-x6-y6≤1, thickness are 50~250nm.
The material of the P-type heavily-doped semiconductor transport layer is Alx7Iny7Ga1-x7-y7N, in formula, 0≤x7≤1,0≤y7
≤ 1,0≤1-x7-y7≤1, material doped is p-type heavy doping, and thickness is 10~50nm.
The material of the current extending can be ITO, Ni/Au, zinc oxide, graphene, aluminium or metal nanometer line, thickness
For 10~500nm.
The material of the p-type Ohmic electrode is P-type Ohmic electrode Ni/Au, Cr/Au, Pt/Au or Ni/Al, P-type ohm
The projected area of electrode is the 5%~100% of current extending area.
The material of the N-type Ohmic electrode is N-type Ohmic electrode Al/Au, Cr/Au or Ti/Al/Ti/Au, wherein N-type
The projected area of Ohmic electrode is the 5%~100% of the N-type semiconductor transport layer area of exposure.
The above-mentioned LED device with field plate structure, preparation process are as follows：
The first step, in MOCVD (i.e. metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) reacting furnace
In, substrate at 950 DEG C~1400 DEG C toast under environment, the foreign matter of substrate surface is purged；
Second step, in MOCVD MBE reacting furnaces, the epitaxial growth thickness on the first step treated substrate surface
For 10~50nm buffer layers, to which the stress that dislocation defects are filtered and make lattice mismatch generate is released；
Third walk, in MOCVD MBE reacting furnaces, on the buffer layer that second step obtains epitaxial growth thickness be 1~
5 μm of N-type semiconductor transport layer；
4th step, in MOCVD MBE reacting furnaces, extension on the N-type semiconductor transport layer that is obtained in second step
Grow multiple quantum wells.Wherein, quantum builds Alx4Iny4Ga1-x4-y4N thickness is 5~50nm, Quantum Well Alx3Iny3Ga1-x3-y3N is thick
Degree is 1~10nm, and the energy gap that quantum is built should be higher than that the energy gap of Quantum Well, the number of Quantum Well are more than or equal to 1.
5th step, in MOCVD MBE reacting furnaces, epitaxial growth P- on the multiple quantum well layer that obtains in the third step
Type current barrier layer Alx5Iny5Ga1-x5-y5N, thickness are 10~100nm.And the P-type that continued growth thickness is 50~250nm half
Conductor propagation layer and the P-type heavily-doped semiconductor transport layer that thickness is 10~50nm；
6th step passes through photoetching and dry etch process in the P-type heavily-doped semiconductor transport layer that the 5th step obtains
Step is made, N-type semiconductor transport layer is exposed；
Field plate structure layer, field plate structure is deposited in 7th step in the P-type heavily-doped semiconductor transport layer that the 5th step obtains
Insulating material used in layer is undoped SiO2、Al2O3、Si3N4, AlN, LiF, diamond or PMMA, thickness is 1000 μ
m.Pattern is etched to insulating material followed by photoetching technique, the pattern along P-type heavily-doped semiconductor transport layer side
Edge and cover, width be 1000 μm；
8th step, is deposited current extending on the field plate structure layer that the 7th step obtains, and material can be ITO, Ni/
Au, zinc oxide, graphene, aluminium or metal nanometer line, thickness are 10~500nm.And figure is made by photoetching and wet etching
Galvanic current extension layer is located above P-type heavily-doped semiconductor transport layer and field plate structure layer.
9th step, is deposited and optical graving makes P-type Ohmic electrode and N-type Ohmic electrode.
Thus the LED device with field plate structure of the present invention is made.
The above-mentioned LED device with field plate structure, involved raw material can be obtained by general sexual approach
, the operating procedure in preparation method is that those skilled in the art are had.
The beneficial effects of the invention are as follows：Compared with prior art, the present invention have following substantive distinguishing features outstanding and
Marked improvement：
(1) LED device with field plate structure in the present invention, has been embedded into light emitting diode by insulator
Current extending in, this light emitting diode construction takes full advantage of the characteristics of electric field is shared possessed by field plate structure, makes
Field plate structure is cleverly integrated with light emitting diode, is computed so that P-type Ohmic electrode edge it is existing compared with
It is the 83.3% of standard light emitting diode device that high electric field, which weakens, to reduce the current crowding phenomenon at the position, is made whole
The carrier of a device inside obtain preferably it is extending transversely, i.e. the carrier concentration at electrode edge position has dropped 12.5%,
Correspondingly the carrier concentration of device edge both sides promotes 7.2%, to make the luminous power of light emitting diode improve 19.2%,
Internal quantum efficiency improves 18.7%.
(2) in addition, the device design structure alleviates electric current in existing standard light emitting diode device to a certain extent gathers around
Effect is squeezed, to reduce the influence of the device degradation as caused by increasing device junction temperature, and then extends the service life of device.
(3) LED device with field plate structure in the present invention, manufacture craft is simple, easily operated, repeats
Property is strong, and production cost is low.
Description of the drawings
Explanation further is made to the present invention below in conjunction with the accompanying drawings.
Fig. 1 is standard light emitting diode epitaxial slice structure schematic diagram in the prior art.
Fig. 2 is the epitaxial slice structure schematic diagram of the light emitting diode with field plate structure in the method for the present invention.
Fig. 3 is in P-type heavily-doped semiconductor transport layer, to pass through photoetching and dry etch process in the method for the present invention
Step is made, the epitaxial slice structure schematic diagram of N-type semiconductor transport layer is exposed.
Fig. 4 is in the method for the present invention, and field plate structure is deposited in P-type heavily-doped semiconductor transport layer in product shown in Fig. 3
Layer, and the epitaxial wafer configuration diagram for having field plate structure shown in Fig. 3 is obtained by photoetching technique, lithographic technique.
Fig. 5 is in the method for the present invention, and product shown in Fig. 4 makes graphical current extending by photoetching and wet etching
Epitaxial slice structure schematic diagram.
Fig. 6 is in embodiment 1 there is field plate structure LED P-type Ohm contact electrode cell-edge to be sent out with standard
The comparison diagram of optical diode P-type Ohm contact electrode cell-edge.
Fig. 7 is the lateral hole concentration and mark with the last one Quantum Well of field plate structure light emitting diode in embodiment 1
The comparison diagram of the lateral hole concentration of quasi- the last one Quantum Well of light emitting diode.
Fig. 8 is the structural schematic diagram of embodiment 4.
Wherein, 101. substrate, 102. buffer layers, 103.N- type semiconductor transport layers, 104. multiple quantum well layers, 105.P- types
Current barrier layer, 106.P- type semiconductor transport layers, 107.P- type heavily-doped semiconductor transport layers, 108. field plate structure layers,
109. current extending, 110.P- type Ohmic electrodes, 111.N- type Ohmic electrodes.
Specific implementation mode
With reference to embodiment and attached drawing, the invention will be further described, but not in this, as to the application claim
The restriction of protection domain.
Embodiment illustrated in fig. 1 shows standard light emitting diode epitaxial slice structure in the prior art, along epitaxial growth
Direction includes successively：Substrate 101, buffer layer 102, N-type semiconductor transport layer 103, multiple quantum well layer 104, P-type current blocking
Layer 105, P-type semiconductor transport layer 106, P-type heavily-doped semiconductor transport layer 107, current extending 109, P-type ohm electricity
Pole 110 and N-type Ohmic electrode 111.
Embodiment illustrated in fig. 2 shows that the present invention has the epitaxial slice structure of the light emitting diode of field plate structure, along outer
Epitaxial growth direction includes successively：Substrate 101, buffer layer 102, N-type semiconductor transport layer 103, multiple quantum well layer 104, P-type electricity
Flow barrier 105, P-type semiconductor transport layer 106, P-type heavily-doped semiconductor transport layer 107, field plate structure layer 108, electric current
Extension layer 109, P-type Ohmic electrode 110 and N-type Ohmic electrode 111.
Embodiment illustrated in fig. 3 shows in method of the invention, in P-type heavily-doped semiconductor transport layer 107, passes through light
It carves and dry etch process makes step, the epitaxial slice structure of N-type semiconductor transport layer 103 is exposed, along epitaxial growth
Direction includes successively：Substrate 101, buffer layer 102, N-type semiconductor transport layer 103, multiple quantum well layer 104, P-type current blocking
Layer 105, P-type semiconductor transport layer 106 and P-type heavily-doped semiconductor transport layer 107.
Embodiment illustrated in fig. 4 shows in method of the invention, and field is deposited in P-type heavily-doped semiconductor transport layer 107
Harden structure layer 108, and make the epitaxial slice structure of field plate structure by lithography, include successively along epitaxial growth direction：Substrate 101,
Buffer layer 102, N-type semiconductor transport layer 103, multiple quantum well layer 104, P-type current barrier layer 105, P-type semiconductor pass
Layer 106, P-type heavily-doped semiconductor transport layer 107 and field plate structure layer 108.
Embodiment illustrated in fig. 5 shows in method of the invention, and graphical current expansion is made by photoetching and wet etching
Layer epitaxial slice structure, include successively along epitaxial growth direction：Substrate 101, buffer layer 102, N-type semiconductor transport layer
103, multiple quantum well layer 104, P-type current barrier layer 105, P-type semiconductor transport layer 106, the transmission of P-type heavily-doped semiconductor
Layer 107, field plate structure layer 108 and current extending 109.
Curve shown in Fig. 6 shows the use due to field plate structure in embodiment 1, has field plate knot representated by dotted line
Structure LED P-type Ohm contact electrode cell-edge is compared with standard light emitting diode P-type Ohm contact electrode cell-edge
Have dropped 16.7%.This is because the field plate structure of insulating material plays the role of sharing electric field.
Curve shown in Fig. 7 shows in embodiment 1 due to field plate structure LED P-type Ohm contact electrode
Cell-edge is reduced compared with standard light emitting diode P-type Ohm contact electrode cell-edge, therefore the hole concentration at the position
12.5% is reduced, plays the role of alleviation to the current crowding phenomenon of electrode edge, has obtained better current expansion effect
It answers, device edge both sides carrier concentration promotes 7.2%.
The epitaxial slice structure for showing the light emitting diode with field plate structure in embodiment 4 shown in Fig. 8, along extension
The direction of growth includes successively：Substrate 101, buffer layer 102, N-type semiconductor transport layer 103, multiple quantum well layer 104, P-type electric current
Barrier layer 105, P-type semiconductor transport layer 106, P-type heavily-doped semiconductor transport layer 107, field plate structure layer 108, electric current expand
Open up layer 109, P-type Ohmic electrode 110 and N-type Ohmic electrode 111.
Embodiment 1
The LED device with field plate structure of the present embodiment includes successively along epitaxial growth direction：Substrate
101, buffer layer 102, N-type semiconductor transport layer 103, multiple quantum well layer 104, P-type current barrier layer 105, P-type semiconductor
Transport layer 106, P-type heavily-doped semiconductor transport layer 107, field plate structure layer 108, current extending 109, P-type Ohmic electrode
110 and N-type Ohmic electrode 111.Wherein, insulating material used in field plate structure layer 108 is undoped SiO2, thickness
For 300nm, width is 20 μm.
Among the above, substrate 101 uses sapphire, structure epitaxial to grow along [0001] direction；The material of buffer layer 102 is
GaN, thickness 15nm；The material of N-type semiconductor transport layer 103 is GaN, and thickness is 3 μm；The structure of multiple quantum well layer 104 is
The In in 5 periods0.07Ga0.93N/GaN layers, the thickness of wherein quantum base GaN is set as 8nm, Quantum Well In0.07Ga0.93The thickness of N
Degree is set as 4nm；The material of P-type current barrier layer 105 is Al0.09Ga0.91N, thickness 15nm；P-type semiconductor transport layer
106 material is GaN, thickness 50nm；The material of P-type heavily-doped semiconductor transport layer 107 is GaN, thickness 10nm；
The material of harden structure layer 108 is SiO2, thickness 2nm, width 5nm；The material of current extending 109 is ITO, and thickness is
10nm；The material of P-type Ohmic electrode 110 is P-type Ohmic electrode Cr/Au；The material of N-type-Ohmic electrode 111 is N-type ohm
Electrode Cr/Au.
The above-mentioned LED device epitaxial structure with field plate structure, preparation method are as follows：
The first step toasts substrate 101, by substrate 101 in MOCVD reacting furnaces under 1300 DEG C of hot environments
The foreign matter on surface is purged；
Second step, in MOCVD reacting furnaces, epitaxial growth thickness is on the first step treated 101 surface of substrate
15nm buffer layers 102, growth temperature is 1020 DEG C, air pressure 380mbar, to be filtered dislocation defects and lattice is made to lose
Stress with generation is released；
Third walks, and in MOCVD reacting furnaces, epitaxial growth thickness is 3 μm of N- on the buffer layer 102 that second step obtains
Type semiconductor transport layer 103, growth temperature are 1020 DEG C, air pressure 380mbar；
4th step, in MOCVD reacting furnaces, epitaxial growth on the N-type semiconductor transport layer 103 that obtains in the third step
Multiple quantum well layer 104.Wherein, it is 8nm, Quantum Well In that quantum, which builds GaN thickness,0.07Ga0.93N thickness is 4nm, the forbidden band that quantum is built
Width should be higher than that the energy gap of Quantum Well, and the growth cycle of multiple quantum wells is 5, and growth temperature is 900 DEG C, and air pressure is
400mbar。
5th step, in MOCVD reacting furnaces, epitaxial growth P-type electricity on the multiple quantum well layer 104 that obtains in the third step
Flow barrier 105, thickness 15nm, growth temperature are 950 DEG C, air pressure 120mbar.And the P- that continued growth thickness is 50nm
Type semiconductor transport layer 106 and the P-type heavily-doped semiconductor transport layer 107 that thickness is 10nm, growth temperature are 950 DEG C, air pressure
For 320mbar；
6th step passes through photoetching and dry etching work in the P-type heavily-doped semiconductor transport layer 107 that the 5th step obtains
Skill makes step, exposes N-type semiconductor transport layer 103；
Field plate structure layer 108, field is deposited in 7th step in the P-type heavily-doped semiconductor transport layer 107 that the 5th step obtains
Insulating material used in harden structure layer is undoped SiO2, thickness 300nm.Followed by photoetching technique to insulator
Material etch goes out rectangular patterns, which covers along the edge of P-type heavily-doped semiconductor transport layer 107, and width is 20 μ
m；
Current extending 109 is deposited in 8th step on the field plate structure layer that the 7th step obtains, and material is ITO, and thickness is
10nm.And graphical current extending is made by photoetching and wet etching, it is located at 107 He of P-type heavily-doped semiconductor transport layer
The top of field plate structure layer 108.
9th step, is deposited and optical graving makes P-type Ohmic electrode 110, is then deposited and optical graving is made positioned at N-
N-type Ohmic electrode 111 on type semiconductor transport layer 103.
Thus the LED device with field plate structure of the present invention is made.According to Fig.6, in the present embodiment by
In the use of field plate structure, there is field plate structure LED P-type Ohm contact electrode cell-edge mark representated by dotted line
Quasi- LED P-type Ohm contact electrode cell-edge has dropped 16.7%.This is because the field plate structure of insulating material
Play the role of sharing electric field.Curve shown in Fig. 7 shows in the present embodiment due to field plate structure LED P-type
Ohm contact electrode cell-edge is reduced compared with standard light emitting diode P-type Ohm contact electrode cell-edge, therefore the position
The hole concentration at place reduces 12.5%, plays the role of alleviation to the current crowding phenomenon of electrode edge, has obtained more preferable
Current expansion effect, device edge both sides carrier concentration promoted 7.2%.
Embodiment 2
The LED device with field plate structure of the present embodiment includes successively along epitaxial growth direction：Substrate
101, buffer layer 102, N-type semiconductor transport layer 103, multiple quantum well layer 104, P-type current barrier layer 105, P-type semiconductor
Transport layer 106, P-type heavily-doped semiconductor transport layer 107, field plate structure layer 108, current extending 109, P-type Ohmic electrode
110 and N-type Ohmic electrode 111.Wherein, insulating material used in field plate structure layer 108 is undoped Al2O3, thickness
For 200nm, width is 15 μm.
Among the above, substrate 101 uses sapphire, structure epitaxial to grow along [0001] direction；The material of buffer layer 102 is
AlN, thickness 15nm；The material of N-type semiconductor transport layer 103 is Al0.60Ga0.40N, thickness are 4 μm；Multiple quantum well layer 104
Structure be 5 periods Al0.53Ga0.47N/Al0.44Ga0.56N layers, wherein quantum builds Al0.53Ga0.47The thickness of N is set as
11nm, Quantum Well Al0.44Ga0.56The thickness of N is set as 3nm；The material of P-type current barrier layer 105 is Al0.60Ga0.40N is thick
Degree is 15nm；The material of P-type semiconductor transport layer 106 is Al0.40Ga0.60N, thickness 180nm；P-type heavily-doped semiconductor passes
The material of defeated layer 107 is GaN, thickness 15nm；The material of field plate structure layer 108 is Al2O3, thickness 200nm, width is 10 μ
m；The material of current extending 109 is ITO, thickness 200nm；The material of P-type Ohmic electrode 110 is P-type Ohmic electrode Ni/
Au；The material of N-type-Ohmic electrode 111 is N-type Ohmic electrode Ni/Au.
The above-mentioned LED device epitaxial structure with field plate structure, preparation method are as follows：
The first step toasts substrate 101, by substrate 101 in MOCVD reacting furnaces under 1300 DEG C of hot environments
The foreign matter on surface is purged；
Second step, in MOCVD reacting furnaces, epitaxial growth thickness is on the first step treated 101 surface of substrate
15nm buffer layers 102, to which the stress that dislocation defects are filtered and make lattice mismatch generate is released；
Third walks, and in MOCVD reacting furnaces, epitaxial growth thickness is 4 μm of N- on the buffer layer 102 that second step obtains
Type semiconductor transport layer 103；
4th step, in MOCVD reacting furnaces, epitaxial growth on the N-type semiconductor transport layer 103 that obtains in the third step
Multiple quantum well layer 104.Wherein, quantum builds Al0.53Ga0.47N thickness is 11nm, Quantum Well Al0.44Ga0.56N thickness is 3nm, quantum
The energy gap at base should be higher than that the energy gap of Quantum Well, and the growth cycle of multiple quantum wells is 5.
5th step, in MOCVD reacting furnaces, epitaxial growth P-type electricity on the multiple quantum well layer 104 that obtains in the third step
Flow barrier 105, thickness 15nm.And continued growth thickness be 180nm P-type semiconductor transport layer 106 and thickness be 15nm
P-type heavily-doped semiconductor transport layer 107；
6th step passes through photoetching and dry etching work in the P-type heavily-doped semiconductor transport layer 107 that the 5th step obtains
Skill makes step, exposes N-type semiconductor transport layer 103；
Field plate structure layer 108, field is deposited in 7th step in the P-type heavily-doped semiconductor transport layer 107 that the 5th step obtains
Insulating material used in harden structure layer is undoped Al2O3, thickness 200nm.Followed by photoetching technique to insulator
Material etch goes out pattern, which covers along the edge of P-type heavily-doped semiconductor transport layer 107, and width is 15 μm；
8th step, is deposited current extending 109 on the field plate structure layer that the 7th step obtains, and material is that ITO/ metals close
Layer gold, ITO layer thickness are 2nm, metal layer thickness 200nm.And graphical current expansion is made by photoetching and wet etching
Layer is located at the top of P-type heavily-doped semiconductor transport layer 107 and field plate structure layer 108.
9th step, be deposited and optical graving make P-type Ohmic electrode 110 and positioned at N-type semiconductor transport layer 103 it
On N-type Ohmic electrode 111.
Thus the LED device with field plate structure of the present invention is made.
Embodiment 3
Except the material that field plate structure layer 108 uses is diamond；The material that current extending 109 uses be graphene it
Outside, other are the same as embodiment 1.
Embodiment 4
Other steps of the present embodiment with embodiment 2, unlike, there is no field plate structure is confined to current expansion for we
The edge of layer, but identical growing method is used, it is equally embedded in inside current extending after photoetching technique etches
Field plate structure, the material that in addition field plate structure layer 108 uses are LiF, and the material that current extending 109 uses is Al.
The above-mentioned LED device with field plate structure, involved raw material can be obtained by general sexual approach
, the operating procedure in preparation method is that those skilled in the art are had.
In conjunction with each embodiment acquired results, it has been found that with thickeing for field plate thickness, the electric field which plays is shared
Act on stronger, while the current expansion effect of device inside is with regard to more preferable.The variation of specific width and thickness is needed according to different
Device architecture, process do optimization appropriate, to make field plate structure play optimum efficiency.
Unaccomplished matter of the present invention is known technology.
Claims (10)
1. a kind of LED device with field plate structure, it is characterized in that the device includes successively along epitaxial growth direction
Substrate, buffer layer, N-type semiconductor transport layer, multiple quantum well layer, P-type current barrier layer, P-type semiconductor transport layer, P-type
Heavily-doped semiconductor transport layer, field plate structure layer, current extending and P-type Ohmic electrode；The N-type semiconductor transport layer
Part exposes, and N-type Ohmic electrode is distributed on exposed N-type semiconductor transport layer；
Wherein, field plate structure layer is between P-type heavily-doped semiconductor transport layer and current extending, and is embedded in current expansion
Layer；Used insulating material is undoped SiO2, Al2O3, Si3N4, AlN, LiF, diamond or PMMA, and thickness is
0.1~1000 μm, width is 1~1000 μm.
2. as described in claim 1 with field plate structure LED device, it is characterized in that the substrate be sapphire,
SiC, Si, AlN, GaN or quartz glass.
3. the LED device with field plate structure as described in claim 1, it is characterized in that the material of the buffer layer
It is Alx1Iny1Ga1-x1-y1N；In formula, 0≤x1≤1,0≤y1≤1,0≤1-x1-y1≤1, thickness is 10~50nm.
4. the LED device with field plate structure as described in claim 1, it is characterized in that the N-type semiconductor passes
The material of defeated layer is Alx2Iny2Ga1-x2-y2N, in formula, 0≤x2≤1,0≤y2≤1,0≤1-x2-y2≤1, thickness is 1~5 μ
m；The ratio that the area of expose portion accounts for total N-type semiconductor transport layer area is 5%~90%, 1~5 μm of thickness range.
5. the LED device with field plate structure as described in claim 1, it is characterized in that the multiple quantum well layer material
Matter is Alx3Iny3Ga1-x3-y3N/Alx4Iny4Ga1-x4-y4N, in formula, 0≤x3≤1,0≤y3≤1,0≤1-x3-y3≤1,0≤x4
≤ 1,0≤y4≤1,0≤1-x4-y4≤1, the energy gap that quantum is built should be higher than that the energy gap of Quantum Well, of Quantum Well
Number is more than or equal to 1；Quantum Well Alx3Iny3Ga1-x3-y3N thickness is 1~10nm, and quantum builds Alx4Iny4Ga1-x4-y4N thickness be 5~
50nm。
6. the LED device with field plate structure as described in claim 1, it is characterized in that the P-type current blocking
The material of layer is Alx5Iny5Ga1-x5-y5N, in formula, 0≤x5≤1,0≤y5≤1,0≤1-x5-y5≤1, thickness is 10~
100nm。
7. the LED device with field plate structure as described in claim 1, it is characterized in that the P-type semiconductor passes
The material of defeated layer is Alx6Iny6Ga1-x6-y6N, in formula, 0≤x6≤1,0≤y6≤1,0≤1-x6-y6≤1, thickness is 50~
250nm。
8. the LED device with field plate structure as described in claim 1, it is characterized in that the P-type heavy doping half
The material of conductor propagation layer is Alx7Iny7Ga1-x7-y7N, in formula, 0≤x7≤1,0≤y7≤1,0≤1-x7-y7≤1, material mixes
Miscellaneous is p-type heavy doping, and thickness is 10~50nm；
The material of the current extending is ITO, Ni/Au, zinc oxide, graphene, aluminium or metal nanometer line, thickness is 10~
500nm。
9. the LED device with field plate structure as described in claim 1, it is characterized in that the p-type Ohmic electrode
Material is P-type Ohmic electrode Ni/Au, Cr/Au, Pt/Au or Ni/Al, and the projected area of P-type Ohmic electrode is current extending
The 5%~100% of area；
The material of the N-type Ohmic electrode is N-type Ohmic electrode Al/Au, Cr/Au or Ti/Al/Ti/Au, wherein N-type ohm
The projected area of electrode is the 5%~100% of the N-type semiconductor transport layer area of exposure.
10. the preparation method of the LED device with field plate structure as described in claim 1, it is characterized in that including such as
Lower step：
The first step, in MOCVD (i.e. metallo-organic compound chemical gaseous phase deposition) or MBE (molecular beam epitaxy) reacting furnace,
Substrate is toasted at 950 DEG C~1400 DEG C；
Second step, in MOCVD MBE reacting furnaces, epitaxial growth thickness is 10 on the first step treated substrate surface
~50nm buffer layers；
Third walks, and in MOCVD MBE reacting furnaces, epitaxial growth thickness is 1~5 μm on the buffer layer that second step obtains
N-type semiconductor transport layer；
4th step, in MOCVD MBE reacting furnaces, epitaxial growth on the N-type semiconductor transport layer that is obtained in second step
Multiple quantum wells.Wherein, quantum builds Alx4Iny4Ga1-x4-y4N thickness is 5~50nm, Quantum Well Alx3Iny3Ga1-x3-y3N, thickness 1
~10nm, the energy gap that quantum is built should be higher than that the energy gap of Quantum Well, the number of Quantum Well are more than or equal to 1.
5th step, in MOCVD MBE reacting furnaces, epitaxial growth P-type electricity on the multiple quantum well layer that obtains in the third step
Flow barrier Alx5Iny5Ga1-x5-y5N, thickness are 10~100nm；And the P-type semiconductor that continued growth thickness is 50~250nm
Transport layer and the P-type heavily-doped semiconductor transport layer that thickness is 10~50nm；
6th step is made in the P-type heavily-doped semiconductor transport layer that the 5th step obtains by photoetching and dry etch process
Step exposes N-type semiconductor transport layer；
Field plate structure layer, field plate structure layer institute is deposited in 7th step in the P-type heavily-doped semiconductor transport layer that the 5th step obtains
The insulating material used is undoped SiO2、Al2O3、Si3N4, AlN, LiF, diamond or PMMA, thickness is 1000 μm；With
Pattern is etched to insulating material using photoetching technique afterwards, the pattern along the edge of P-type heavily-doped semiconductor transport layer and
Covering, width are 1000 μm；
8th step, is deposited current extending on the field plate structure layer that the 7th step obtains, and material can be ITO, Ni/Au, oxygen
Change zinc, graphene, aluminium or metal nanometer line, thickness is 10~500nm；And figure galvanic current is made by photoetching and wet etching
Extension layer is located above P-type heavily-doped semiconductor transport layer and field plate structure layer；
9th step, is deposited and optical graving makes P-type Ohmic electrode and N-type Ohmic electrode；
Thus the LED device with field plate structure of the present invention is made.
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