CN108573986A - 一种背照式宽动态范围cmos图像传感器的制作方法 - Google Patents
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Abstract
本发明涉及了CMOS图像传感器领域,尤其是涉及了一种背照式款动态范围图像传感器的制作方法。本发明通过在背面制作深槽隔离和P阱注入,减小了器件间像素单元的电光学串扰,增大了器件的满井容量,同时在背面进行离子注入减小背面照光后扩散电子引起的电学串扰。而CMOS像素单元结构采用5T有源像素结构作为单元结构,五管有源像素由于采用全并行曝光模式,像素势阱很快被填满,提高了图像传感器的动态范围。
Description
技术领域
本发明涉及CMOS图像传感器领域,特别是涉及一种减小背照式CMOS图像传感器串扰的制作方法。
背景技术
眼睛是人的视觉图像来源,而人类通过视觉系统获得的信息量约占总获取信息量的80%以上。而图像传感器(Image Sensor)就是视频采集设备的图像接受装置,类似人类的眼睛。图像传感器在如今电子数码产品中屡见不鲜,发挥着重要的作用。CMOS图像传感器可应用于PC终端摄像头、数码相机、手机及平板电脑监控摄像头、工业摄像机、可视门铃、汽车尾视、汽车防盗、机器视觉、安防监控等领域。在纵横交错的信息世界里,图像传感器作为图像信息采集系统的“视网膜”,因其能实现图像信息的实时采集、数字形式多层次呈现,在信息时代发挥着不可替代的作用。
半导体图像传感器包括电荷耦合器件图像传感器(Charge CoupledDevice,CCD)和互补金属氧化物半导体图像传感器(CMOS Image Sensor,CIS)。其中CMOS 图像传感器是指基于 CMOS 工艺制造的图像传感器,是将模拟光信号转化为数字电信号的器件单元。先,外界光源通过光学器件,将图像汇聚到 CMOS图像传感器感光区域像素阵列上。像素阵列将接收到的光信号转化为模拟电信号,并经过放大、去噪送到模数转换器(Analog-to-DigitalConverter, ADC)中数字化。最后,数字化的信号经过图像处理芯片运算得到一幅清晰真实的图像。
背照式(Back-Side illuminated sensor,BSI)CMOS 图像传感器的发展受到了诸多因素的限制,如因像素尺寸缩减而造成的满阱容量的过小、背照式技术下严重的短波串扰等问题。这对小尺寸背照式图像传感器,尤其是像素部分的设计提出了更苛刻的要求。因此,改善小尺寸像素的满阱容量与BSI 像素的电学串扰是本发明需要解决的问题。
发明内容
本发明的目的在于,提供一种减小背照式CMOS图像传感器串扰的制作方法。本发明的特点是通过改进传统光电二极管PPD结构来实现满阱容量(FWC)扩展的和正面浅沟槽隔离STI技术、背面沟槽隔离的BTI防串扰的方法。
本发明提供一种减小背照式CMOS图像传感器串扰的制作方法,包括:
提供了一种P型外延片,在P型外延片上制作T4型像素单元结构;
所述的半导体外延层上的每个像素单元内具有一个T5型像素单元结构;
所述的T5型像素单元结构包括光电二极管(PPD)和5个MOS管构成;
所述的四个MOS管分别指传输管 TX、复位管 RST、源极跟随器 SF、行选管SEL和信号开关选择管PR;
所述P型半导体外延层制作浅槽,所述浅槽位于相邻像素单元之间,称为正面浅沟槽隔离STI技术;
所述P半导体衬底制作深沟槽,所述深沟槽位于相邻像素单元感光面之间,称为背面沟槽隔离的BTI;
所述半导体外延层上制作T5型有源像素APS光电二极管;
进一步在半导体像素器件正面淀积绝缘层,在绝缘层内形成接触孔,为多晶硅与金属层提供电学连接;
最后在背面形成感光层,完成背照式像素结构的制作方法。
附图说明
图1为一实施例中的传统T4型有源像素APS结构;
图2为本发明为背照式CMOS图像传感器完成背面保护结构;
图3为本发明为背照式CMOS图像传感器完成标记定位;
图4为本发明为背照式CMOS图像传感器完成背面沟槽隔离的BTI结构及槽内填充;
图5为本发明为背照式CMOS图像传感器完成抗反射层淀积;
图6为本发明为背照式CMOS图像传感器完成背面沟槽(BPW)结构;
图7为本发明为背照式CMOS图像传感器完成晶圆进行绑定及正面减薄;
图8为本发明为背照式CMOS图像传感器完成正面的浅沟槽隔STI 结构;
图9为本发明为背照式CMOS图像传感器完成正面PPD的PN结和浮空所散区FD;
图10为本发明为背照式CMOS图像传感器完成正面PN结隔离区P+和浅沟槽隔STI的P阱;
图11为本发明为背照式CMOS图像传感器完成正面多晶硅栅型传输管TCK管;
图12为本发明为背照式CMOS图像传感器完成CMOS器件的复位管 RST、源极跟随器 SF和行选管 SEL、开关信号管、及电容C1、C2电路结构;
图13为本发明为背照式CMOS图像传感器工作时序图;
具体实施方法
本发明提供一种减小背照式CMOS图像传感器串扰的制作方法。下面结合附图进行具体的说明,通过对传统的T5型有源像素APS结构进行结构优化和像素单元工之间进行工艺处理,使背照式CMOS图像传感串扰最小、提高像素满阱容量,提高传感器的探测效率。
本发明提供一种减小背照式CMOS图像传感器串扰的制作方法共分为两部分:器件背面结构和器件正面结构。
CMOS图像传感器件背面结构具体步骤如下:
首先,在器件P型硅片背面和正面进行场氧化SiO2和化学气相淀积方法淀积一层Si3N4,目的是保护作为器件制作对齐标记和衬底的保护层,如图2;
进一步制作器件正反对齐标志,改对齐标志深度为最终器件厚度,作为器件后续制作掩膜版对准标记,如图3;
进一步制作背面沟槽隔离的BTI。沟槽深度为器件总厚度的60%~75%,深度过低会对器件串扰其不到隔离作用;宽度一般为2um,宽度过款会影响器件的填充因子和光响应。
进一步对沟槽利用高密度等离子体淀积法积SiO2,并使用快速热退火(RTA)消除因轰击造成的缺陷,如图4;
进一步对背面进行化学平坦化处理后,对背面进行淀积氧化层与氮化层作为抗反射层,这两层薄膜将有助于改善量子效率,如图5;
进一步在器件背面一侧,注入一层高浓度的 P+薄层,该注入层会因形成的浓度梯度产生内建电场,可以提高光生电子的收集效率;
进一步利用背面 P+阱掩膜版从背面注入杂质 Boron 将背面沟槽完全包埋(BPW),P阱可以利用高势垒阻挡光生电子的横向电学串扰,如图6;
进一步背面器件将做好的晶圆与另一个晶圆进行绑定(Carrier Wafer),对器件晶圆正面进行减薄到器件层最终的厚度,在整个减薄过程中,Carrier Wafer 作为临时载体为BSI 硅片提供了高强度的机械支撑,如图7。
以上就是背照式CMOS图像传感器背面结构。
CMOS图像传感器件正面结构具体步骤如下:
首先,如图,8所示,正面生成的浅沟槽隔STI 结构与背面生成的沟槽隔离坐标位置相同,主要用于器件层正面有源区的隔离;
进一步进行N+注入,注入杂质为砷,形成器件正面的N阱,目的是实现PPD管的PN结结构和器件的浮空所散区FD,如图9;
进一步进行P+的注入,注入杂质为硼,在 N+区中注入 P+层对其下的 PN 结实现隔离,光生电荷的收集远离周期性结构受到破坏、容易产生暗电流的半导体表面,从而极大地减小了暗电流,同时形成P 阱可以利用高势垒阻挡光生电子的横向电学串扰,如图10;
进一步进行图像传感器的栅极的制作,即在器件层正面淀积一层新的栅氧层,然后在该栅氧层上淀积一层多晶硅。随后经过栅掩膜版对特定区域进行定向刻蚀,形成多晶硅栅型传输管TCK,如图11;
进一步生成CMOS器件的复位管 RST、源极跟随器 SF和行选管 SEL、开关信号管、及电容C1、C2,最好取得背面晶圆绑定,如图12。
如图13所示,像素操作采用全并行曝光方式(global shutter),首先全局置位信号 PR为高电平,清空所有像素的光敏感节点PD,随后 PR 置为低电平曝光过程开始。当曝光结束后,TCK 信号置为高电平,将积分得到的光强信号传输到 FD 节点,TCK 变为低电平标志着完成了一次积分。
Claims (7)
1.一种背照式宽动态范围CMOS图像传感器的制作方法,所述背照式CMOS图像传感器采用5T有源像素结构和背面深槽、正面浅槽隔离技术,太高满井容量和减小像素间电、光学串扰。
2.根据权利要求1所述的一种背照式宽动态范围CMOS图像传感器的制作方法,其特征在于,所述的背照式是采用背面照光的一种探测方式。
3.根据权利要求1所述的一种背照式宽动态范围CMOS图像传感器的制作方法,其特征在于,背面采用深槽隔离BTI和P阱隔离BPW技术,减小背面电、光学串扰。
4.根据权利要求1所述的一种背照式宽动态范围CMOS图像传感器的制作方法,其特征在于,晶圆进行绑定(Carrier Wafer)技术,对器件晶圆正面进行减薄到器件层最终的厚度,提供了高强度的机械支撑。
5.根据权利要求1所述的一种背照式宽动态范围CMOS图像传感器的制作方法,其特征在于,正面采用浅槽隔离STI和P阱隔离BPW技术,减小正面电、光学串扰。
6.根据权利要求1所述的一种背照式宽动态范围CMOS图像传感器的制作方法,其特征在于,采用P+扩散对其下的 PN 结实现隔离,从而极大地减小了暗电流。
7.根据权利要求1所述的一种背照式宽动态范围CMOS图像传感器的制作方法,其特征在于,采用5T有源像素结构作为背照式CMOS图像传感器单元结构,并采用全并行曝光模式,曝光操作和像素读出操作可以并行,能够达到很高的帧频,满足监控系统的高速要求。
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