CN108566216B - Radio frequency reconstruction type double-channel receiving assembly - Google Patents
Radio frequency reconstruction type double-channel receiving assembly Download PDFInfo
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- CN108566216B CN108566216B CN201810218608.XA CN201810218608A CN108566216B CN 108566216 B CN108566216 B CN 108566216B CN 201810218608 A CN201810218608 A CN 201810218608A CN 108566216 B CN108566216 B CN 108566216B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/20—Monitoring; Testing of receivers
- H04B17/21—Monitoring; Testing of receivers for calibration; for correcting measurements
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
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- Electromagnetism (AREA)
- Radio Relay Systems (AREA)
- Circuits Of Receivers In General (AREA)
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Abstract
The invention relates to a radio frequency reconstruction type double-channel receiving component, which comprises an amplifying channel plate, a control board and a communication interface plate, wherein a power supply processing module and a signal processing module are just arranged in the control board, the power supply processing module is respectively connected with a power supply, the amplifying channel plate and a detection board, the communication interface plate is sequentially connected with the signal processing module and the amplifying channel plate to form a control circuit, the amplifying channel plate is sequentially connected with the detection board, the signal processing module and the communication interface plate to form a state and a fault circuit, and the amplifying channel plate is internally provided with a signal circuit I from a port A to a port C, a signal circuit II from a port B to a port D and a calibration circuit. The beneficial effects achieved by the invention are as follows: the radio frequency reconstruction is used as a design core, the amplifier is bypassed to realize large-limit reduction of gain, and finally the sensitivity can be improved by more than 20dB in a low-gain state of a receiving component.
Description
Technical Field
The invention relates to the technical field of wireless communication, in particular to a radio frequency reconstruction type double-channel receiving component.
Background
The conventional technical scheme of the large dynamic receiving assembly mainly comprises AGC, MGC, STC and the like, and dynamic expansion is realized by reducing channel gain. But when the gain is lowered too much, the sensitivity of the receiving circuit will be seriously deteriorated. A common circuit diagram is one attenuator in series with one amplifier, then in series with another attenuator, and then in series with another amplifier.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provide a radio frequency reconstruction type double-channel receiving component with high sensitivity. The aim of the invention is achieved by the following technical scheme: the radio frequency reconstruction type double-channel receiving component comprises an amplification channel plate, wherein the amplification channel plate is connected with an antenna, and a first signal line from a port A to a port C, a second signal line from a port B to a port D and a calibration line are arranged in the amplification channel plate;
in the first signal line, according to the signal transmission direction, a port A transmits a radio frequency signal to a calibration switch a, the calibration switch a is sequentially connected with a filter a, a bypass switch a, an amplifier a, a filter b, a bypass switch b, a digital control attenuator a, a bypass switch C, an amplifier b, a filter C and a bypass switch d in series, and the bypass switch d is finally connected to the port C;
in the signal line I, a bypass switch a and a bypass switch b are also directly communicated to form a branch I, signals in the branch I are transmitted from the bypass switch a to the bypass switch b, a bypass switch c and a bypass switch d are also directly communicated to form a branch II, and signals in the branch II are transmitted from the bypass switch c to the bypass switch d;
in the second signal line, according to the signal transmission direction, the port B transmits another radio frequency signal to the calibration switch B, the calibration switch B is sequentially connected with the filter D, the bypass switch e, the amplifier c, the filter e, the bypass switch f, the digital control attenuator B, the bypass switch g, the amplifier D, the filter f and the bypass switch h in series, and the bypass switch h is finally connected to the port D;
in the signal line II, a bypass switch e and a bypass switch f are also directly communicated to form a branch III, signals in the branch III are transmitted to the bypass switch f from the bypass switch e, a bypass switch g and a bypass switch h are also directly communicated to form a branch IV, and signals in the branch IV are transmitted to the bypass switch h from the bypass switch g;
in the calibration circuit, a calibration signal is transmitted to the power divider, and the power divider transmits the signal to the calibration switch a and the calibration switch b through two output ends respectively.
The power supply processing module is connected with the power supply, and the power supply processing module is further connected with the amplifying channel plate.
The power supply voltage is +12V, the power supply processing module converts the voltage of the power supply +12V into the direct-current voltage of +6V, and the direct-current voltage of +6V is introduced into the amplifying channel plate.
The receiving assembly further comprises a communication interface board, a signal processing module is further arranged in the control board, the communication interface board is connected with the signal processing module, the signal processing module is connected with the amplifying channel board, and the communication interface board transmits control command signals to the amplifying channel board through the signal processing module.
The interface in the communication interface board is a TTL interface, and the signal interface of the amplifying channel board is a CMOS interface.
The receiving assembly also comprises a detection plate, the detection plate is connected with the amplifying channel plate, the detection plate is also connected with the signal processing module in the control board, and the detection plate is used for collecting status signals and fault signals in the amplifying channel plate, converting the signals through the signal processing module in the control board and transmitting the signals to the computer through the communication interface board.
The detection board is also connected with a power supply processing module in the control board, and the power supply processing module converts +12V voltage of a power supply into +5V direct current voltage and leads the direct current voltage to the detection board.
Principle of: and the calibration signal is input into a first signal line and a second signal line of the power divider to respectively finish the amplitude phase calibration from the port A to the port C and from the port B to the port D.
The antenna signals received by the amplification channel plate are processed and corrected by the calibration signal. The detection board collects the status signals and fault signals in the amplifying channel board, processes the signals through the signal processing module in the control board, and then transmits the signals to the computer through the communication interface board. The communication interface board also transmits the control command to the amplifying channel board after processing the control command by the signal processing module in the control board. The voltage in the power supply is processed by the power supply processing module in the control panel to respectively supply power to the amplifying channel board and the detecting board.
The invention has the following advantages: the radio frequency reconstruction is used as a design core, the amplifier is bypassed to realize large-limit reduction of gain, and finally the sensitivity can be improved by more than 20dB in a low-gain state of a receiving component.
Drawings
FIG. 1 is a schematic illustration of the present invention;
fig. 2 is a schematic circuit diagram in an amplification channel plate.
Detailed Description
The present invention will be further described with reference to the accompanying drawings, but the scope of the present invention is not limited to the following.
As shown in fig. 1-2, the radio frequency reconstruction type dual-channel receiving component comprises an amplification channel plate, wherein the amplification channel plate is connected with an antenna, and a first signal line from a port a to a port C, a second signal line from a port B to a port D and a calibration line are arranged in the amplification channel plate.
In this embodiment, in the first signal line, according to the signal transmission direction, the port a transmits a radio frequency signal to the calibration switch a, the calibration switch a is sequentially connected in series with the filter a, the bypass switch a, the amplifier a, the filter b, the bypass switch b, the digitally controlled attenuator a, the bypass switch C, the amplifier b, the filter C, and the bypass switch d is finally connected to the port C.
Further, in the signal line one, the bypass switch a and the bypass switch b are also directly communicated to form a branch one, a signal in the branch one is transmitted from the bypass switch a to the bypass switch b, the bypass switch c and the bypass switch d are also directly communicated to form a branch two, and a signal in the branch two is transmitted from the bypass switch c to the bypass switch d.
In this embodiment, in the second signal line, according to the signal transmission direction, the port B transmits another radio frequency signal to the calibration switch B, the calibration switch B is sequentially connected in series with the filter D, the bypass switch e, the amplifier c, the filter e, the bypass switch f, the digitally controlled attenuator B, the bypass switch g, the amplifier D, the filter f, and the bypass switch h is finally connected to the port D.
Further, in the signal line two, the bypass switch e and the bypass switch f are also directly communicated to form a branch three, signals in the branch three are transmitted from the bypass switch e to the bypass switch f, the bypass switch g and the bypass switch h are also directly communicated to form a branch four, and signals in the branch four are transmitted from the bypass switch g to the bypass switch h;
in the calibration circuit, a calibration signal is transmitted to the power divider, and the power divider transmits the signal to the calibration switch a and the calibration switch b through two output ends respectively.
The power supply processing module is connected with the power supply, and the power supply processing module is further connected with the amplifying channel plate.
The power supply voltage is +12V, the power supply processing module converts the voltage of the power supply +12V into the direct-current voltage of +6V, and the direct-current voltage of +6V is introduced into the amplifying channel plate.
The receiving assembly further comprises a communication interface board, a signal processing module is further arranged in the control board, the communication interface board is connected with the signal processing module, the signal processing module is connected with the amplifying channel board, and the communication interface board transmits control command signals to the amplifying channel board through the signal processing module.
The interface in the communication interface board is a TTL interface, and the signal interface of the amplifying channel board is a CMOS interface.
The receiving assembly also comprises a detection plate, the detection plate is connected with the amplifying channel plate, the detection plate is also connected with the signal processing module in the control board, and the detection plate is used for collecting status signals and fault signals in the amplifying channel plate, converting the signals through the signal processing module in the control board and transmitting the signals to the computer through the communication interface board.
The detection board is also connected with a power supply processing module in the control board, and the power supply processing module converts +12V voltage of a power supply into +5V direct current voltage and leads the direct current voltage to the detection board.
The working principle is as follows:
the amplifying channel board contains two identical links, receives signals from the antenna, completes the amplification of the signals through the amplifier, completes the suppression of out-of-band useless signals (selection of useful signals) through the filter, and realizes the prescribed amplifying gain and suppression capacity through the alternate cascade design of the amplifier and the filter.
The calibration signal is distributed into two paths of signals with consistent amplitude and phase by the power divider and enters the amplifying channel, the external digital signal processing equipment obtains the signal amplitude-phase data of the two links, the calibration of the two links of the amplifying channel is completed through the comparison of the amplitude-phase data (the calibration principle, the signals with consistent amplitude and phase are input, the amplitude-phase error of the links is obtained according to the output amplitude-phase error, and the correction is performed on the digital signal processing).
The control board realizes the processing of power supply and communication, the amplifying channel and the detection board use the power supply of +6V and +5V, and the input power supply of +12V, and the voltage conversion is realized in the control board; the external communication is TTL interface, the control interface of the amplifying channel is CMOS, and the conversion from TTL to CMOS is realized in the control board.
The detection board collects state signals and fault signals and outputs the signals through the control board power supply/communication interface.
Claims (7)
1. The radio frequency reconstruction type double-channel receiving component is characterized in that: the antenna comprises an amplifying channel plate, wherein the amplifying channel plate is connected with an antenna, and a first signal line from a port A to a port C, a second signal line from a port B to a port D and a calibration line are arranged in the amplifying channel plate;
in the first signal line, according to the signal transmission direction, a port A transmits a radio frequency signal to a calibration switch a, the calibration switch a is sequentially connected with a filter a, a bypass switch a, an amplifier a, a filter b, a bypass switch b, a digital control attenuator a, a bypass switch C, an amplifier b, a filter C and a bypass switch d in series, and the bypass switch d is finally connected to the port C;
in the signal line I, a bypass switch a and a bypass switch b are also directly communicated to form a branch I, signals in the branch I are transmitted from the bypass switch a to the bypass switch b, a bypass switch c and a bypass switch d are also directly communicated to form a branch II, and signals in the branch II are transmitted from the bypass switch c to the bypass switch d;
in the second signal line, according to the signal transmission direction, the port B transmits another radio frequency signal to the calibration switch B, the calibration switch B is sequentially connected with the filter D, the bypass switch e, the amplifier c, the filter e, the bypass switch f, the digital control attenuator B, the bypass switch g, the amplifier D, the filter f and the bypass switch h in series, and the bypass switch h is finally connected to the port D;
in the signal line II, a bypass switch e and a bypass switch f are also directly communicated to form a branch III, signals in the branch III are transmitted to the bypass switch f from the bypass switch e, a bypass switch g and a bypass switch h are also directly communicated to form a branch IV, and signals in the branch IV are transmitted to the bypass switch h from the bypass switch g;
in the calibration circuit, a calibration signal is transmitted to the power divider, and the power divider transmits the signal to the calibration switch a and the calibration switch b through two output ends respectively.
2. The radio frequency reconfigurable dual channel receiver assembly of claim 1, wherein: the power supply processing module is connected with the power supply, and the power supply processing module is further connected with the amplifying channel plate.
3. The radio frequency reconfigurable dual channel receiver assembly of claim 2, wherein: the power supply voltage is +12V, the power supply processing module converts the voltage of the power supply +12V into the direct-current voltage of +6V, and the direct-current voltage of +6V is introduced into the amplifying channel plate.
4. A radio frequency reconfigurable dual channel receiver assembly according to claim 3, wherein: the control board is also provided with a signal processing module, the communication interface board is connected with the signal processing module, the signal processing module is connected with the amplifying channel board, and the communication interface board transmits control command signals to the amplifying channel board through the signal processing module.
5. The radio frequency reconfigurable dual channel receiver assembly of claim 4, wherein: the interface in the communication interface board is a TTL interface, and the signal interface of the amplifying channel board is a CMOS interface.
6. The radio frequency reconfigurable dual channel receiver assembly of claim 4, wherein: the detection board is connected with the signal processing module in the control board, and is used for collecting state signals and fault signals in the amplification channel board, converting the signals through the signal processing module in the control board and transmitting the signals to the computer through the communication interface board.
7. The radio frequency reconfigurable dual channel receiver assembly of claim 6, wherein: the detection board is also connected with a power supply processing module in the control board, and the power supply processing module converts +12V voltage of a power supply into +5V direct current voltage and leads the direct current voltage to the detection board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810218608.XA CN108566216B (en) | 2018-03-16 | 2018-03-16 | Radio frequency reconstruction type double-channel receiving assembly |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810218608.XA CN108566216B (en) | 2018-03-16 | 2018-03-16 | Radio frequency reconstruction type double-channel receiving assembly |
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| CN108566216A CN108566216A (en) | 2018-09-21 |
| CN108566216B true CN108566216B (en) | 2023-06-23 |
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