CN108550663B - A kind of light-emitting diode chip for backlight unit and preparation method thereof - Google Patents
A kind of light-emitting diode chip for backlight unit and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title abstract description 5
- 239000004065 semiconductor Substances 0.000 claims abstract description 111
- 239000000463 material Substances 0.000 claims abstract description 31
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 238000004519 manufacturing process Methods 0.000 claims description 19
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 15
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 9
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 8
- 229910052709 silver Inorganic materials 0.000 claims description 7
- 239000004332 silver Substances 0.000 claims description 7
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 6
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 claims description 6
- 229910044991 metal oxide Inorganic materials 0.000 claims description 6
- 150000004706 metal oxides Chemical class 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 5
- 239000010931 gold Substances 0.000 claims description 4
- 229910052763 palladium Inorganic materials 0.000 claims description 4
- 229910052786 argon Inorganic materials 0.000 claims description 3
- 239000007789 gas Substances 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 229910052697 platinum Inorganic materials 0.000 claims description 3
- 239000011787 zinc oxide Substances 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims description 2
- GRPQBOKWXNIQMF-UHFFFAOYSA-N indium(3+) oxygen(2-) tin(4+) Chemical group [Sn+4].[O-2].[In+3] GRPQBOKWXNIQMF-UHFFFAOYSA-N 0.000 claims 1
- 239000000956 alloy Substances 0.000 abstract description 9
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- 229910052751 metal Inorganic materials 0.000 abstract description 9
- 239000002184 metal Substances 0.000 abstract description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 12
- 229910002601 GaN Inorganic materials 0.000 description 11
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 11
- 230000004888 barrier function Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 8
- 229910052757 nitrogen Inorganic materials 0.000 description 6
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 5
- 229910052733 gallium Inorganic materials 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 4
- 239000007772 electrode material Substances 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- 239000002019 doping agent Substances 0.000 description 3
- 229910052738 indium Inorganic materials 0.000 description 3
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 3
- 238000002310 reflectometry Methods 0.000 description 3
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical group O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 2
- 239000011259 mixed solution Substances 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
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- 238000005215 recombination Methods 0.000 description 2
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- 239000010980 sapphire Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 230000003760 hair shine Effects 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000011777 magnesium Substances 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
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- 238000002156 mixing Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- NICDRCVJGXLKSF-UHFFFAOYSA-N nitric acid;trihydrochloride Chemical compound Cl.Cl.Cl.O[N+]([O-])=O NICDRCVJGXLKSF-UHFFFAOYSA-N 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses a kind of light-emitting diode chip for backlight unit and preparation method thereof, belong to technical field of semiconductors.Chip includes substrate, buffer layer, n type semiconductor layer, reflecting layer, multiple quantum well layer, p type semiconductor layer, N-type electrode and P-type electrode;Buffer layer, n type semiconductor layer, reflecting layer, multiple quantum well layer and p type semiconductor layer stack gradually on substrate, p type semiconductor layer is equipped with the groove for extending to n type semiconductor layer, N-type electrode is arranged on n type semiconductor layer, and P-type electrode is arranged on p type semiconductor layer;Reflecting layer includes the first sublayer, and the material of the first sublayer is metal or alloy.The present invention between n type semiconductor layer and multiple quantum well layer by being arranged reflecting layer, improve the effective rate of utilization of light, reflecting layer includes the first sublayer simultaneously, the material of first sublayer is metal or alloy, with good electric conductivity, be conducive to being uniformly distributed for carrier in multiple quantum well layer, improve the luminous consistency of multiple quantum well layer.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of light-emitting diode chip for backlight unit and preparation method thereof.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) it is electroluminescent using the PN junction of semiconductor
A kind of light emitting semiconductor device made of principle of luminosity.Epitaxial wafer is the primary finished product in light emitting diode preparation process, is shone
Diode chip for backlight unit includes epitaxial wafer and the electrode in the production of extension on piece.
Gallium nitride based LED is received more and more attention and is studied at present, and epitaxial wafer includes substrate and stacks gradually
Buffer layer, undoped gallium nitride layer, n type semiconductor layer, multiple quantum well layer, electronic barrier layer on the first surface of substrate and
P type semiconductor layer.
LED chip opens up the groove for extending to n type semiconductor layer on p type semiconductor layer, and N-type electrode is arranged in groove
N type semiconductor layer on, P-type electrode be arranged on p type semiconductor layer, to inject a current into n type semiconductor layer and P-type semiconductor
Layer, the hole migration that the electronics and p type semiconductor layer for providing n type semiconductor layer provide recombination luminescence into multiple quantum well layer.
While the light directive that multiple quantum well layer issues is from all directions, but the light of only one side is used effectively, therefore logical
Often can on the opposite direction of light-emitting surface distributed bragg reflector mirror (English: Distributed Bragg Reflection, letter
Claim: DBR), the periodic structure formed, the light of every layer material are alternately arranged in the way of ABAB by the material of two kinds of different refractivities
It learns with a thickness of the 1/4 of center reflection wavelength, to increase the light that goes out of light-emitting surface, the positive light extraction efficiency of raising.It is with packed LED chip
Example, DBR are arranged on the second surface of substrate, and second surface is the surface opposite with first surface.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
DBR is arranged on the second surface of substrate, and light is longer from the path that multiple quantum well layer reaches DBR, and loss is larger,
The effective rate of utilization of light need to be improved.
Summary of the invention
In order to solve problems in the prior art, the embodiment of the invention provides a kind of light-emitting diode chip for backlight unit and its production sides
Method.The technical solution is as follows:
On the one hand, the embodiment of the invention provides a kind of light-emitting diode chip for backlight unit, the light-emitting diode chip for backlight unit includes lining
Bottom, buffer layer, n type semiconductor layer, multiple quantum well layer, p type semiconductor layer, N-type electrode and P-type electrode;It is the buffer layer, described
N type semiconductor layer, the multiple quantum well layer and the p type semiconductor layer stack gradually over the substrate, the P-type semiconductor
Layer is equipped with the groove for extending to the n type semiconductor layer, the n type semiconductor layer of the N-type electrode setting in the groove
On, the P-type electrode is arranged on the p type semiconductor layer;
The light-emitting diode chip for backlight unit includes reflecting layer, and reflecting layer setting is in the n type semiconductor layer and described more
Between quantum well layer;The reflecting layer includes the first sublayer, and the material of first sublayer is metal or alloy.
Optionally, the material of first sublayer includes silver.
Optionally, the material of first sublayer further includes any one of gold, palladium, platinum.
Optionally, the reflecting layer further includes the second sublayer, and second sublayer is arranged in first sublayer;It is described
The material of second sublayer is the metal oxide of electrically conducting transparent.
Optionally, the material of second sublayer is tin indium oxide or indium-doped zinc oxide.
Optionally, the reflecting layer with a thickness of 5nm~100nm.
On the other hand, the embodiment of the invention provides a kind of production method of light-emitting diode chip for backlight unit, the production methods
Include:
Successively grown buffer layer and n type semiconductor layer on substrate;
The deposition of reflective layer on the n type semiconductor layer, the reflecting layer include the first sublayer, the material of first sublayer
Material is metal or alloy;
Multiple quantum well layer and p type semiconductor layer are successively grown on the reflecting layer;
The groove for extending to the n type semiconductor layer is opened up on the p type semiconductor layer;
N-type electrode is set on n type semiconductor layer in the groove, while p-type is set on the p type semiconductor layer
Electrode.
Optionally, the deposition of reflective layer on the n type semiconductor layer, comprising:
In the intracavitary setting target of magnetron sputtering;
It is intracavitary that the substrate is put into the magnetron sputtering, the distance between the substrate and the target be 4cm~
15cm;
It is intracavitary to the magnetron sputtering to vacuumize;
Be passed through argon gas to the magnetron sputtering is intracavitary, the pressure for keeping the magnetron sputtering intracavitary be 5mtorr~
150mtorr, temperature are 400 DEG C~800 DEG C;
Target described in rotational speed with 30r/min~200r/min, and established using the power of 2500w~4000w
Magnetic field sputters the target, forms reflecting layer on the n type semiconductor layer.
Optionally, the reflecting layer further includes the second sublayer, and second sublayer is arranged in first sublayer;It is described
The material of second sublayer is the metal oxide of electrically conducting transparent.
Optionally, the reflecting layer with a thickness of 5nm~100nm.
Technical solution provided in an embodiment of the present invention has the benefit that
By the way that reflecting layer is arranged between n type semiconductor layer and multiple quantum well layer, light is substantially reduced from multiple quantum wells
The path that layer reaches reflecting layer improves the effective use of light to effectively reduce the loss of light on the transmit path
Rate.Reflecting layer includes the first sublayer simultaneously, and the material of the first sublayer is metal or alloy, not only has good reflectivity,
Also there is good electric conductivity, be conducive to being uniformly distributed for carrier in multiple quantum well layer, improve multiple quantum well layer shines one
Cause property.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of structural schematic diagram of light-emitting diode chip for backlight unit provided in an embodiment of the present invention;
Fig. 2 is the structural schematic diagram in reflecting layer provided in an embodiment of the present invention;
Fig. 3 is a kind of flow chart of the production method of light-emitting diode chip for backlight unit provided in an embodiment of the present invention;
Fig. 4 a- Fig. 4 e is production method provided in an embodiment of the present invention light-emitting diodes obtained in each step implementation procedure
The structural schematic diagram of tube chip.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
The embodiment of the invention provides a kind of light-emitting diode chip for backlight unit, Fig. 1 is light-emitting diodes provided in an embodiment of the present invention
The structural schematic diagram of tube chip, referring to Fig. 1, which includes substrate 10, buffer layer 20, n type semiconductor layer
30, multiple quantum well layer 40, p type semiconductor layer 50, N-type electrode 60 and P-type electrode 70.It is buffer layer 20, n type semiconductor layer 30, more
Quantum well layer 40 and p type semiconductor layer 50 are sequentially laminated on substrate 10, and p type semiconductor layer 50 is equipped with and extends to N-type and partly lead
The groove of body layer 30, N-type electrode 60 are arranged on the n type semiconductor layer 30 in groove, and P-type electrode 70 is arranged in P-type semiconductor
On layer 50.
In the present embodiment, which further includes reflecting layer 80, and reflecting layer 80 is arranged in n type semiconductor layer
Between 30 and multiple quantum well layer 40.Fig. 2 is the structural schematic diagram in reflecting layer provided in an embodiment of the present invention, referring to fig. 2, reflecting layer
80 include the first sublayer 81, and the material of the first sublayer 81 is metal or alloy.
The embodiment of the present invention substantially reduces light by the way that reflecting layer is arranged between n type semiconductor layer and multiple quantum well layer
Line improves light to effectively reduce the loss of light on the transmit path from the path that multiple quantum well layer reaches reflecting layer
The effective rate of utilization of line.Reflecting layer includes the first sublayer simultaneously, and the material of the first sublayer is metal or alloy, is not only had good
Good reflectivity also has good electric conductivity, is conducive to being uniformly distributed for carrier in multiple quantum well layer, improves multiple quantum wells
The luminous consistency of layer.
Optionally, the material of the first sublayer may include silver-colored (Ag).The reflectivity of silver is high, up to 99% or more, therefore
The material of first sublayer includes silver, can reflect the light of most of directive substrate, effectively improve the utilization rate of light;Silver simultaneously
Electric conductivity it is also fine, be conducive to being uniformly distributed for carrier in multiple quantum well layer, improve multiple quantum well layer shine it is consistent
Property.
Preferably, the material of the first sublayer can also include any one of golden (Au), palladium (Pd), platinum (Pt).Pass through silver
Any one of middle mixing gold, palladium, platinum form alloy, can reinforce the electric conductivity of the first sublayer, be more advantageous to multiple quantum well layer
Middle carrier is uniformly distributed, and is effectively improved the luminous consistency of multiple quantum well layer.
Optionally, as shown in Fig. 2, reflecting layer 81 can also include the second sublayer 82, the setting of the second sublayer 82 is in the first son
On layer 81;The material of second sublayer 82 is the metal oxide of electrically conducting transparent.The material of second sublayer is the metal of electrically conducting transparent
Oxide will not influence the first sublayer to the reflection of light and to the improvement result of multiple quantum well layer emission uniformity, may be used also
To play a protective role to the first sublayer.
Preferably, the material of the second sublayer can for tin indium oxide (English: Indium tin oxide, referred to as: ITO) or
The indium-doped zinc oxide of person (English abbreviation: IZO).Using the common used material of transparent conductive film, cost is relatively low, technical maturity, realizes
It is easy.
Optionally, the thickness in reflecting layer can be 5nm~100nm.It, may be due to if the thickness in reflecting layer is less than 5nm
Thickness is too small and can not play the role of reflection light and promote carrier equally distributed;If the thickness in reflecting layer is greater than 100nm,
Then subsequent epitaxial growth may be influenced since thickness is too big.
Specifically, substrate 10 can be Sapphire Substrate, preferably PSS.Buffer layer 20 can be aln layer or nitrogen
Change gallium layer.N type semiconductor layer 30 can be the gallium nitride layer of n-type doping, and p type semiconductor layer 50 can be the nitridation of p-type doping
Gallium layer.Multiple quantum well layer 40 may include that multiple Quantum Well and multiple quantum are built, and multiple Quantum Well and multiple quantum build alternating layer
Folded, Quantum Well can be indium gallium nitrogen layer, and quantum base can be gallium nitride layer or gallium nitride layer.
More specifically, the thickness of buffer layer 20 can be 15nm~35nm (preferably 25nm).The thickness of n type semiconductor layer 30
Degree can be 1 μm~5 μm (preferably 3 μm), and the doping concentration of N type dopant can be 1018cm-3~1019cm-3(preferably 5*
1018cm-3);The thickness of p type semiconductor layer 50 can be 100nm~800nm (preferably 400nm).The thickness of Quantum Well can be with
For 2.5nm~3.5nm (preferably 3nm), the thickness that quantum is built can be 9nm~20nm (preferably 15nm);The number that quantum is built
Amount is identical as the quantity of Quantum Well, and the quantity of Quantum Well can be 5~11 (preferably 8).
Optionally, which can also include undoped gallium nitride layer, and undoped gallium nitride layer setting exists
It is N further to alleviate the lattice mismatch between Sapphire Substrate and n type semiconductor layer between buffer layer and n type semiconductor layer
The growth of type semiconductor layer etc. improves the preferable bottom of crystal quality.
Specifically, the thickness of undoped gallium nitride layer can be 1 μm~5 μm (preferably 3 μm).
Optionally, which can also include electronic barrier layer, and electronic barrier layer is arranged in multiple quantum wells
Between layer and p type semiconductor layer, non-radiative recombination is carried out into p type semiconductor layer to avoid electron transition.
Specifically, electronic barrier layer can be the gallium nitride layer of p-type doping, such as AlyGa1-y0.5 (preferably y of N, 0.1 < y <
=0.3).
More specifically, the thickness of electronic barrier layer can be 50nm~150nm (preferably 100nm).
Optionally, which can also include p-type contact layer, and p-type contact layer is arranged in p type semiconductor layer
On, to realize the Ohmic contact between p type semiconductor layer and transparent conductive film.
Specifically, p-type contact layer can be the indium gallium nitrogen layer of p-type doping.
More specifically, the thickness of p-type contact layer can be 5nm~300nm (preferably 150nm).
The embodiment of the invention provides a kind of production method of light-emitting diode chip for backlight unit, it is suitable for making hair shown in FIG. 1
Luminous diode chip.Fig. 3 is the production method flow chart of light-emitting diode chip for backlight unit provided in an embodiment of the present invention, should referring to Fig. 3
Production method includes:
Step 201: successively grown buffer layer and n type semiconductor layer on substrate.
Fig. 4 a is the light-emitting diode chip for backlight unit that production method provided in an embodiment of the present invention obtains after step 201 execution
Structural schematic diagram.Wherein, 10 substrate is indicated, 20 indicate buffer layer, and 30 indicate n type semiconductor layer.A referring to fig. 4, buffer layer 20
It is sequentially laminated on substrate 10 with n type semiconductor layer 30.
Specifically, which may include:
Controlled at 400 DEG C~600 DEG C (preferably 500 DEG C), pressure be 400torr~600torr (preferably
500torr), grown buffer layer on substrate;
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), pressure be 400Torr~600Torr (preferably
500torr), the duration is 5 minutes~10 minutes (preferably 8 minutes), carries out in-situ annealing processing to buffer layer;
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), pressure be 100torr~500torr (preferably
300torr), n type semiconductor layer is grown on the buffer layer.
Optionally, before the step 201, which can also include:
Controlled at 1000 DEG C~1200 DEG C (such as 1100 DEG C), substrate is annealed 8 minutes in hydrogen atmosphere, and carries out
Nitrogen treatment, to clean substrate.
Optionally, which can also include:
Controlled at 1000 DEG C~1100 DEG C (preferably 1050 DEG C), pressure be 100torr~500torr (preferably
300torr), undoped gallium nitride layer is grown on the buffer layer.
Correspondingly, n type semiconductor layer is grown on undoped gallium nitride layer.
Step 202: the deposition of reflective layer on n type semiconductor layer.
Fig. 4 b is the light-emitting diode chip for backlight unit that production method provided in an embodiment of the present invention obtains after step 202 execution
Structural schematic diagram.Wherein, 80 reflecting layer is indicated.B referring to fig. 4, reflecting layer 80 are arranged on n type semiconductor layer 30.
In the present embodiment, reflecting layer includes the first sublayer, and the material of the first sublayer is metal or alloy.
Optionally, reflecting layer can also include the second sublayer, and the second sublayer is arranged in the first sublayer;The material of second sublayer
Material is conductive metal oxide.
Optionally, the thickness in reflecting layer can be 5nm~100nm.
Specifically, which may include:
In the intracavitary setting target of magnetron sputtering;
It is intracavitary to place the substrate into magnetron sputtering, the distance between substrate and target are 4cm~15cm;
It is intracavitary to magnetron sputtering to vacuumize;
It is passed through argon gas to magnetron sputtering is intracavitary, the pressure for keeping magnetron sputtering intracavitary is 5mtorr~150mtorr, temperature
It is 400 DEG C~800 DEG C;
With the rotational speed target of 30r/min~200r/min, and the magnetic field established using the power of 2500w~4000w
Target is sputtered, forms reflecting layer on n type semiconductor layer.
In practical applications, the purity of target need to be greater than 99.99%.It realizes as a result, it was confirmed that being formed instead using aforesaid way
Layer is penetrated, the film quality in obtained reflecting layer is preferable.
Step 203: multiple quantum well layer and p type semiconductor layer are successively grown on reflecting layer.
Fig. 4 c is the light-emitting diode chip for backlight unit that production method provided in an embodiment of the present invention obtains after step 203 execution
Structural schematic diagram.Wherein, 40 multiple quantum well layer is indicated, 50 indicate p type semiconductor layer.C referring to fig. 4, multiple quantum well layer 40 and P
Type semiconductor layer 50 is sequentially laminated on reflecting layer 80.
Specifically, which may include:
Control pressure is 100torr~500torr (preferably 300torr), and multiple quantum well layer is grown on reflecting layer, more
Quantum well layer includes that multiple Quantum Well of alternating growth and multiple quantum are built, and temperature control is 720 DEG C~829 when grown quantum trap
DEG C (preferably 770 DEG C), temperature control is 850 DEG C~959 DEG C (preferably 900 DEG C) when grown quantum is built;
Controlled at 850 DEG C~1080 DEG C (preferably 960 DEG C), pressure be 100torr~300torr (preferably
200torr), the growing P-type semiconductor layer on multiple quantum well layer.
In practical applications, electronic barrier layer is first grown on multiple quantum well layer, then growing P-type half on electronic barrier layer
Conductor layer.Specifically, when growing electronic barrier layer, temperature control is 850 DEG C~1080 DEG C (preferably 960 DEG C), pressure control
For 200torr~500torr (preferably 350torr).
Optionally, which can also include:
Controlled at 850 DEG C~1080 DEG C (preferably 960 DEG C), pressure be 200torr~500torr (preferably
300torr), electronic barrier layer is grown on multiple quantum well layer.
Correspondingly, p type semiconductor layer is grown on electronic barrier layer.
Optionally, which can also include:
Controlled at 850 DEG C~1050 DEG C (preferably 95 DEG C), pressure be 100torr~300torr (preferably
200torr), the growing P-type contact layer on p type semiconductor layer.
Optionally, after the step 203, which can also include:
Controlled at 650 DEG C~850 DEG C, the duration is 5 minutes~15 minutes, is carried out at annealing in nitrogen atmosphere
Reason.
It should be noted that in the present embodiment, control temperature, pressure are each meant in the reaction chamber of control growth epitaxial wafer
Temperature, pressure.Using trimethyl gallium or trimethyl second as gallium source when realization, high pure nitrogen is as nitrogen source, trimethyl indium conduct
Indium source, for trimethyl aluminium as silicon source, N type dopant selects silane, and P-type dopant selects two luxuriant magnesium.
Step 204: the groove for extending to n type semiconductor layer is opened up on p type semiconductor layer.
Fig. 4 d is the light-emitting diode chip for backlight unit that production method provided in an embodiment of the present invention obtains after step 204 execution
Structural schematic diagram.D referring to fig. 4, groove extend on n type semiconductor layer 30 from p type semiconductor layer 50.
Specifically, which may include:
Photoresist is formed using region of the photoetching technique on p type semiconductor layer in addition to groove region;
Dry etching p type semiconductor layer and multiple quantum well layer under the protection of photoresist form and extend from p type semiconductor layer
To the groove in reflecting layer;
The wet etching reflecting layer under the protection of photoresist, extends to n type semiconductor layer for groove;
Remove photoresist.
More specifically, can be using chloroazotic acid (mixed solution of hydrochloric acid and nitric acid, the volume of hydrochloric acid and nitric acid in mixed solution
Than corroding reflecting layer for 3:1).
Step 205: N-type electrode being set on the n type semiconductor layer in groove, while p-type is set on p type semiconductor layer
Electrode.
Fig. 4 e is the light-emitting diode chip for backlight unit that production method provided in an embodiment of the present invention obtains after step 205 execution
Structural schematic diagram.Wherein, 60 N-type electrode is indicated, 70 indicate P-type electrode.E referring to fig. 4, N-type electrode 60 are arranged in groove
N type semiconductor layer 30 on, P-type electrode 70 be arranged on p type semiconductor layer 50.
Specifically, which may include:
Using on region of the photoetching technique in groove in addition to N-type electrode region, p type semiconductor layer except p-type electricity
Region except the region of pole forms photoresist;
Electrode material is laid on the n type semiconductor layer and p type semiconductor layer in photoresist, groove;
The electrode material on photoresist and photoresist is removed, the electrode material on n type semiconductor layer forms N-type electrode, p-type
Electrode material on semiconductor layer forms P-type electrode.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (9)
1. a kind of light-emitting diode chip for backlight unit, the light-emitting diode chip for backlight unit includes substrate, buffer layer, n type semiconductor layer, Multiple-quantum
Well layer, p type semiconductor layer, N-type electrode and P-type electrode;The buffer layer, the n type semiconductor layer, the multiple quantum well layer and
The p type semiconductor layer stacks gradually over the substrate, and the p type semiconductor layer is equipped with and extends to the N-type semiconductor
The groove of layer, the N-type electrode are arranged on n type semiconductor layer in the groove, and the P-type electrode is arranged in the p-type
On semiconductor layer;
It is characterized in that, the light-emitting diode chip for backlight unit includes reflecting layer, the reflecting layer setting in the n type semiconductor layer and
Between the multiple quantum well layer;The reflecting layer includes the first sublayer, and the material of first sublayer includes silver.
2. light-emitting diode chip for backlight unit according to claim 1, which is characterized in that the material of first sublayer further includes
Any one of gold, palladium, platinum.
3. light-emitting diode chip for backlight unit according to claim 1 or 2, which is characterized in that the reflecting layer further includes the second son
Layer, second sublayer are arranged in first sublayer;The material of second sublayer is the metal oxide of electrically conducting transparent.
4. light-emitting diode chip for backlight unit according to claim 3, which is characterized in that the material of second sublayer is indium oxide
Tin or indium-doped zinc oxide.
5. light-emitting diode chip for backlight unit according to claim 1 or 2, which is characterized in that the reflecting layer with a thickness of 5nm~
100nm。
6. a kind of production method of light-emitting diode chip for backlight unit, which is characterized in that the production method includes:
Successively grown buffer layer and n type semiconductor layer on substrate;
The deposition of reflective layer on the n type semiconductor layer, the reflecting layer include the first sublayer, the material packet of first sublayer
Include silver;
Multiple quantum well layer and p type semiconductor layer are successively grown on the reflecting layer;
The groove for extending to the n type semiconductor layer is opened up on the p type semiconductor layer;
N-type electrode is set on n type semiconductor layer in the groove, while p-type electricity is set on the p type semiconductor layer
Pole.
7. production method according to claim 6, which is characterized in that the deposition of reflective on the n type semiconductor layer
Layer, comprising:
In the intracavitary setting target of magnetron sputtering;
It is intracavitary that the substrate is put into the magnetron sputtering, the distance between the substrate and the target are 4cm~15cm;
It is intracavitary to the magnetron sputtering to vacuumize;
Be passed through argon gas to the magnetron sputtering is intracavitary, the pressure for keeping the magnetron sputtering intracavitary be 5mtorr~150mtorr,
Temperature is 400 DEG C~800 DEG C;
Target described in rotational speed with 30r/min~200r/min, and the magnetic field established using the power of 2500w~4000w
The target is sputtered, forms reflecting layer on the n type semiconductor layer.
8. production method according to claim 6 or 7, which is characterized in that the reflecting layer further includes the second sublayer, described
Second sublayer is arranged in first sublayer;The material of second sublayer is the metal oxide of electrically conducting transparent.
9. production method according to claim 6 or 7, which is characterized in that the reflecting layer with a thickness of 5nm~100nm.
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