CN108549589A - A kind of model taking method of low overhead - Google Patents

Abstract

The present invention provides a low-overhead modulo-taking method. The method takes modulo m=3 as an example. The modulo-taking operation can be determined by counting the numbers of the remainder 1 and the remainder 2, and then according to the numbers of the remainder 1 and the remainder 2. The remainder, and then determine the final result of the remainder according to the positive or negative of the input data. Compared with the method of directly using % modulo, this method greatly reduces the overhead of the modulo operation.

Description

A low-overhead modulo method

technical field

The invention relates to the field of remainder checking, and more specifically, relates to a low-overhead modulo-taking method.

Background technique

The space radiation environment has a serious impact on the electronic products of the spacecraft, and the single event effect is the main impact to be considered. In space applications, single event effects can have serious consequences, including information loss and functional failure. Single-event effects can occur when charged particles with sufficient transferred energy hit a chip, causing system failure. Transient errors caused by radiation effects have become the main concern of people, and only the application of fault-tolerant technology can ensure the reliability of the circuit.

Triple-mode redundancy technology is widely used in fault-tolerant signal processing in radiation environments. Three-mode redundancy uses three identical modules to perform the same filtering operation on input data, and selects two or three identical results for output, completely eliminating the influence of single-branch faults on signal processing output. However, in the triple-mode redundancy technology, the consumption of all computing and storage resources is tripled, which makes the triple-mode redundancy technology unusable in many resource-constrained applications, such as fault-tolerant signals on the spaceborne platform processing etc.

In order to reduce the fault-tolerance overhead, the researchers proposed a fault-tolerance scheme based on remainder check. In the fault-tolerant scheme based on remainder check, if the check branch uses a smaller modulus, the hardware overhead can be greatly lower than that of the ordinary calculation branch, so the overhead of the overall fault-tolerant system can be significantly reduced.

Modulo data is an essential operation if error-tolerant signal processing techniques based on remainder checking are used. And if the fault-tolerant scheme based on the remainder check is more complex and uses more modulo operations, the resource overhead of the modulo operations in the entire fault-tolerant scheme will also account for a large proportion.

Contents of the invention

The invention provides a low-overhead modulo-taking method to reduce the resource overhead of modulo-taking operations in a fault-tolerant scheme based on remainder checking.

In order to achieve the above-mentioned technical effect, the technical scheme of the present invention is as follows:

A low-overhead modulo method comprising the following steps:

S1: If the binary signed number x is a negative number, first change x to a binary positive number, and then assign it to y; otherwise, if the binary signed number x is a positive number, directly assign the value of x to y;

S2: Count the number of 1s in the even-numbered bits such as 0, 2, 4, and 6 of the binary positive number y, and set it to m; also count the 1s in the odd-numbered bits of the binary positive number 1, 3, 5, and 7 Number, set to n, where m is the number with a remainder of 1, and n is the number with a remainder of 2;

S3: Count the number of 1s on the 0th, 2nd, 4th, etc. even-numbered bits of the binary positive number m, and set it to a; count the number of 1s on the 1st, 3rd, 5th, etc. odd-numbered bits of the binary positive number m, and set it to b, where a is the number whose remainder is 1, and b is the number whose remainder is 2;

S4: Count the number of 1s in the 0th, 2nd, 4th, etc. even-numbered bits of the binary positive number n, and set it to c; count the number of 1s in the 1st, 3rd, 5th, etc. odd-numbered bits of the binary positive number m, and set it to d, where c is the number whose remainder is 2, and d is the number whose remainder is 1;

S5: The number with a remainder of 1 is the sum of a and d, which is set to e; the number with a remainder of 2 is the sum of b and c, which is set to f, the remainder can be determined according to the values of e and f, and a read-only Memory ROM, the read-only memory ROM outputs the corresponding remainder according to the value of e and f;

S6: The remainder output by the ROM is a 2-digit binary positive number. If the input data x is a positive number, the remainder output by the ROM is directly used as the final result of the modulo operation. If the input data x is a negative number, the remainder output by the ROM is bitwise After negation, it is used as the final result of the modulo operation.

Further, in the step S1, if the binary signed number x is a positive number, the value of x is directly assigned to y, and if x is a negative number, then the binary number x is inverted and 1 is assigned to y.

Further, in the step S2, if the 0th, 2nd, 4th, 6th and other even-numbered bits of the binary positive number y are 1, then each corresponding position represents a value of 4 ^N , where N is 0, 1, 2, Integers such as 3, the remainder of 4 ^N to the modulo M=3 is 1, so m is the number of remainders of 1;

If the 1st, 3rd, 5th, 7th and other odd bits of the binary positive number y are 1, then each corresponding position represents a value of 2*4 ^N , where N is an integer such as 0, 1, 2, 3, etc., 2*4 The modulo M=3 of ^N takes a remainder of 2, so n is the number of remainders of 2.

Further, in step S3, since m is the number with remainder 1, a is the number with remainder 1, and b is the number with remainder 2.

Further, in step S4, since n is the number of the remainder 2, if the 0th, 2nd, 4th, 6th, etc. even-numbered bits of the binary number n are 1, then each corresponding position represents a value of 2*4 ^N , where N is an integer such as 0, 1, 2, 3, etc., and 2*4 ^N takes a remainder of modulus M=3 to be 2, so c is the number whose remainder is 2;

Since n is the number of remainder 2, if the 1st, 3rd, 5th, 7th and other odd bits of the binary number n are 1, then each corresponding position represents a value of 4N+1, where N is 0, 1, 2, Integers such as 3, the remainder of 4N+1 to the modulo M=3 is 1, and d is the number of remainders of 1.

Further, in step S5, the number with a remainder of 1 is e; the number with a remainder of 2 is f; according to the values of e and f, the remainder of the remainder operation of 3 can be calculated, and the values of different e and f correspond to For different remainders, this corresponding relationship is equivalent to establishing a truth table of the combinatorial logic function of the read-only memory ROM.

Further, in step S6, the remainder output by the ROM is a 2-bit binary positive number 0, 1, and 2. If the input data x is a positive number, the bit splicing operator is used to splice 0 and the remainder output by the ROM into a highest A signed number whose bit is 0 is output as the final result; if the input data x is a negative number, the remainder is generally also a negative number. You can first invert the remainder output by the ROM bit by bit and then add 1 to become the corresponding negative number. Use the bit concatenation operator to concatenate 1 and this negative number into a signed number with the highest bit being 1, as the final result. If the remainder is 0, it will be output directly without performing the above operation;

Since the remainder generated by the three branches will be compared in the fault-tolerant scheme based on the remainder check, and if the remainder is a negative number, the negative number plus the modulus can be changed into a positive number to facilitate the comparison between the remainder; the modulus is 3, if If the input data x is a negative number, the remainder output by the ROM can be reversed bit by bit, and the result of adding the modulus to the negative number can be obtained to become a positive number. If the remainder is 0, it will be output directly without the above operation. If input If the data x is a positive number, the remainder output by the ROM is directly used as the result.

Compared with the prior art, the beneficial effects of the technical solution of the present invention are:

Taking modulo m=3 as an example in the method of the present invention, the modulus operation can be by counting the number of remainder 1 and remainder 2, then according to the number of remainder 1 and remainder 2, look up the table to determine the remainder, and then determine according to the positive or negative of the input data The final result of the remainder, this method greatly reduces the overhead of the modulo operation compared to directly using the % modulo method.

Description of drawings

Fig. 1 is the method of the present invention.

Detailed ways

The accompanying drawings are for illustrative purposes only and cannot be construed as limiting the patent;

In order to better illustrate this embodiment, some parts in the drawings will be omitted, enlarged or reduced, and do not represent the size of the actual product;

For those skilled in the art, it is understandable that some well-known structures and descriptions thereof may be omitted in the drawings.

The technical solutions of the present invention will be further described below in conjunction with the accompanying drawings and embodiments.

Example 1

As shown in Figure 1, a low-overhead modulo taking method includes the following steps:

S1, if the highest bit of the input binary number x is 1, invert the binary number x and add 1 to become a positive number, assign the value of the positive number to y, if the highest bit of the binary number x is 0, directly assign its value to y;

S2, find the number of 1s in the 0th, 2nd, 4th, 6th, 8th, 10th, 12th, and 14th bits of the binary number y, set it as m, if the number in the above-mentioned position of the binary number y is 1, then the value it represents The remainder obtained modulo 3 is 1;

Find the number of 1s in the 1st, 3rd, 5th, 7th, 9th, 11th, and 13th bits of the binary number y, and set it to n. If the number in the above-mentioned position of the binary number y is 1, then the value it represents is modulo 3 The resulting remainder is 2;

In addition, the maximum value of m is 8, and the maximum value of n is 7;

S3, seek the number of 1 on the 0th and 2nd positions of the binary number m, set it as a, because m is the number of remainder 1 in the S2 step, so a is the number of remainder 1;

Find the number of 1s on the 1st and 3rd bits of the binary number m, set it as b, since m is the number of remainder 1 in the S2 step, so b is the number of remainder 2;

S4, seek the number of 1 on the 0th and 2nd positions of binary number n, set it as c, because n is the number of remainder 2 in the S2 step, so c is the number of remainder 2;

Find the number of 1s on the first bit of the binary number n, set it as d, since n is the number of remainder 2 in the S2 step, so d is the number of remainder 1;

S5, respectively seek the total number of remainders of 1 and 2 in the steps of S3 and S4, obtain the sum of a and d, set it as e, and e is the sum of the remainder of 1 number; obtain the sum of b and c , set as f, f is the sum of 2 numbers with remainder;

The remainder can be determined according to the values of e and f, for example, when both e and f are 1, the output remainder is 0. This relationship is equivalent to a truth table of logical combination, and the information of this truth table is stored by using the read-only memory ROM. Output the corresponding remainder according to the values of e and f, and the remainder has three cases of binary numbers 0, 1, and 2 with a bit width of 2;

S6, if the highest bit of the binary number x in the S1 step is 0, the remainder output by the read-only memory ROM is used as the final result;

S7, if the highest bit of the binary number x in the S1 step is 1, the remainder except 0 output by the read-only memory ROM is bitwise inverted as the final result; if the output remainder is 0, it is directly used as the final result without the inversion operation result. For example, if the output remainder is 2, it means that the result of the remainder operation is actually -2, but after the bitwise inversion of the binary remainder 2 with a bit width of 2, it becomes 1, which is equivalent to adding a modulus to -2 The result of the number 3.

In this embodiment, the number of remainders 1 and 2 of the binary signed number x is calculated first, and then the final remainder of the signed number x is obtained by looking up the number of remainders 1 and 2. Compared with directly using % modulo in the Verilog program, it saves resource overhead.

The method described in this application uses the Vivado tool for simulation and design synthesis, and the results are as follows:

For data x with a bit width of 49, 33, 16, and 6, the resource overhead of using the newly proposed modulo method is 46.2%, 41.8%, 65.0%, and 85.7% less than that of directly using % modulo in the Verilog program. %. It can be seen that a low-overhead modulo calculation method proposed in the present application is very effective in reducing the resource overhead of the modulo calculation.

The same or similar reference numerals correspond to the same or similar components;

The positional relationship described in the drawings is only for illustrative purposes and cannot be construed as a limitation to this patent;

Apparently, the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, rather than limiting the implementation of the present invention. For those of ordinary skill in the art, other changes or changes in different forms can be made on the basis of the above description. It is not necessary and impossible to exhaustively list all the implementation manners here. All modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the claims of the present invention.

Claims (7)

1. a low overhead modulo method, characterized in that, may further comprise the steps: S1: If the binary signed number x is a negative number, first change x to a binary positive number, and then assign it to y; otherwise, if the binary signed number x is a positive number, directly assign the value of x to y; S2: Count the number of 1s in the even-numbered bits such as 0, 2, 4, and 6 of the binary positive number y, and set it to m; also count the 1s in the odd-numbered bits of the binary positive number 1, 3, 5, and 7 Number, set to n, where m is the number with a remainder of 1, and n is the number with a remainder of 2; S3: Count the number of 1s on the 0th, 2nd, 4th, etc. even-numbered bits of the binary positive number m, and set it to a; count the number of 1s on the 1st, 3rd, 5th, etc. odd-numbered bits of the binary positive number m, and set it to b, where a is the number whose remainder is 1, and b is the number whose remainder is 2; S4: Count the number of 1s in the 0th, 2nd, 4th, etc. even-numbered bits of the binary positive number n, and set it to c; count the number of 1s in the 1st, 3rd, 5th, etc. odd-numbered bits of the binary positive number m, and set it to d, where c is the number whose remainder is 2, and d is the number whose remainder is 1; S5: The number with a remainder of 1 is the sum of a and d, which is set to e; the number with a remainder of 2 is the sum of b and c, which is set to f, the remainder can be determined according to the values of e and f, and a read-only Memory ROM, the read-only memory ROM outputs the corresponding remainder according to the value of e and f; S6: The remainder output by the ROM is a 2-digit binary positive number. If the input data x is a positive number, the remainder output by the ROM is directly used as the final result of the modulo operation. If the input data x is a negative number, the remainder output by the ROM is bitwise After negation, it is used as the final result of the modulo operation. 2. The modulo method of low overhead according to claim 1, characterized in that, in the step S1, if the binary signed number x is a positive number, then directly assign the value of x to y, if x is a negative number , then assign the binary number x to y after bitwise inversion and adding 1. 3. The modulo method of low overhead according to claim 2, characterized in that, in the step S2, if the 0th, 2nd, 4th, 6th even-numbered bits of the binary positive number y are 1, then each The corresponding position represents a value of 4 ^N , wherein N is an integer such as 0, 1, 2, 3, etc., and the remainder of 4 ^N to the modulus M=3 is 1, so m is the number of remainder 1; If the 1st, 3rd, 5th, 7th and other odd bits of the binary positive number y are 1, then each corresponding position represents a value of 2*4 ^N , where N is an integer such as 0, 1, 2, 3, etc., 2*4 The modulo M=3 of ^N takes a remainder of 2, so n is the number of remainders of 2. 4. the modulo method of low overhead according to claim 3 is characterized in that, in step S3, since m is the number of remainder 1, so a is the number of remainder 1, and b is the number of remainder 2 number. 5. the modulo method of low cost according to claim 4, is characterized in that, in step S4, because n is the number of remainder 2, if on the 0th, 2, 4, 6 etc. even number positions of binary number n is 1, then each corresponding position represents a value of 2*4 ^N , where N is an integer such as 0, 1, 2, 3, etc., and the remainder of 2*4 ^N to modulus M=3 is 2, so c is the remainder of 2 number; Since n is the number of remainder 2, if the 1st, 3rd, 5th, 7th and other odd bits of the binary number n are 1, then each corresponding position represents a value of 4N+1, where N is 0, 1, 2, Integers such as 3, the remainder of 4N+1 to the modulo M=3 is 1, and d is the number of remainders of 1. 6. the modulo method of low overhead according to claim 5, is characterized in that, in step S5, the number that remainder is 1 is e; The number that remainder is 2 is f; Can calculate according to the value of e and f To get the remainder of the 3 remainder operation, different values of e and f correspond to different remainders. This correspondence is equivalent to establishing a truth table of the combinatorial logic function of the read-only memory ROM. 7. The modulo method of low overhead according to claim 6, characterized in that, in step S6, the remainder output by the ROM is a 2-bit binary positive number 0, 1, 2, if the input data x is a positive number, then use The bit splicing operator splices 0 and the remainder output by ROM into a signed number whose highest bit is 0, and outputs it as the final result; if the input data x is a negative number, the remainder is generally also a negative number, and the ROM can be first The remainder of the output is inverted bit by bit and then added with 1 to become the corresponding negative number. Use the bit splicing operator to splice 1 and the negative number into a signed number with the highest bit being 1 as the final result. If the remainder is 0, then output directly without performing the above operations; Since the remainder generated by the three branches will be compared in the fault-tolerant scheme based on the remainder check, and if the remainder is a negative number, the negative number plus the modulus can be changed into a positive number to facilitate the comparison between the remainder; the modulus is 3, if If the input data x is a negative number, the remainder output by the ROM can be reversed bit by bit, and the result of adding the modulus to the negative number can be obtained to become a positive number. If the remainder is 0, it will be output directly without the above operation. If input If the data x is a positive number, the remainder output by the ROM is directly used as the result.