CN108513403B - Control circuit and control method of power converter - Google Patents
Control circuit and control method of power converter Download PDFInfo
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- CN108513403B CN108513403B CN201810341641.1A CN201810341641A CN108513403B CN 108513403 B CN108513403 B CN 108513403B CN 201810341641 A CN201810341641 A CN 201810341641A CN 108513403 B CN108513403 B CN 108513403B
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
- H05B45/30—Driver circuits
- H05B45/37—Converter circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
Abstract
The application discloses a control circuit and a control method of a power converter. According to the technical scheme of the embodiment of the invention, when the difference value of the input voltage and the output voltage of the power converter is larger than the first reference voltage or the current flowing through the second power tube is larger than the first reference current, the first power tube is controlled to be turned off, and the driving voltage of the second power tube is regulated along with the input voltage, so that the second power tube works in a saturated state and plays a role of a constant current source, and the current flowing through the second power tube is kept at a constant value. When the output of the power converter is connected with the LED load, the second power tube serves as a constant current source, so that the constant current source connected with the LED load in series can be omitted, the circuit design is effectively simplified, and the system efficiency is improved.
Description
Technical Field
The invention relates to the power electronic technology, in particular to the LED driving circuit technology, and more particularly to a control circuit and a control method of a power converter.
Background
In flash applications, LEDs are widely used due to their advantages of low power consumption, fast stroboscopic speed, etc. Since LEDs have high forward voltage and current, and mobile phones, cameras, etc. have only a given battery voltage, BOOST converters are typically employed to BOOST the given battery voltage to drive the LED load. Further, since the LED is a current drive type device, it is necessary to perform constant current control of the LED drive current. As shown in fig. 1, a conventional LED constant current driving circuit includes a BOOST converter and a constant current source. Forward voltage of LED is VFThe reference voltage of the error amplifier is VREF. When the input voltage Vin is less than (V)F+VREF) The BOOST converter is operated to BOOST, the switching tubes Q1 and Q2 are both in a switching state, and the output voltage Vout is equal to (V) in a steady stateF+VREF) The input voltage of the constant current source is equal to VREF. When the input voltage Vin is greater than (V)F+VREF) When the switch tube Q1 is turned off, the switch tube Q2 is turned on completely, and the constant current source can be adjusted along with the change of the input voltage Vin to keep the LED current constant. However, in such a driving circuit, on the one hand, the introduction of the constant current source increases the complexity, area and cost of the circuit control; on the other hand, when the switching tube Q2 is fully turned on, power loss occurs, and the operating efficiency of the circuit is reduced.
Disclosure of Invention
In view of this, embodiments of the present invention provide a control circuit and a control method for a power converter, which control a second power transistor in the power converter to operate in a switching state or a saturation state, so as to implement constant current control without additionally introducing a constant current source, thereby effectively simplifying circuit design and improving system efficiency.
According to a first aspect of the embodiments of the present invention, there is provided a control circuit of a power converter, the power converter including a first power transistor and a second power transistor, wherein,
the current sampling circuit is coupled with the second power tube and used for sampling the current flowing through the second power tube to obtain a current sampling signal;
and the driving circuit receives the input voltage, the output voltage and the current sampling signal of the power converter, and controls the first power tube to be switched off and the driving voltage of the second power tube to be adjusted along with the input voltage when the difference value of the input voltage and the output voltage is greater than a first reference voltage or the current sampling signal is greater than a first reference current.
Preferably, the controlling the driving voltage of the second power transistor to follow the input voltage regulation comprises: and controlling the second power tube to work in a saturation state, so that the current flowing through the second power tube is kept at a constant value.
Preferably, when the driving voltage of the second power tube is smaller than the conduction threshold value thereof and the current flowing through the second power tube is smaller than a second reference current, the driving circuit controls the first power tube and the second power tube to work in a switching state.
Preferably, the current sampling circuit includes:
the sampling resistor is coupled with the second power tube and used for sampling the current flowing through the second power tube;
and the filter circuit is connected with the sampling resistor in parallel and is used for filtering the signal obtained by the sampling resistor into a direct current signal serving as the current sampling signal.
Preferably, the drive circuit comprises an error feedback circuit for comparing the current sample signal with a reference voltage to generate an error feedback signal.
Preferably, the driving circuit includes a bypass control signal generating circuit and a bypass driving voltage generating circuit;
when the current sampling signal is larger than a first reference current or the difference value of the input voltage and the output voltage is larger than a first reference voltage, the bypass control signal generating circuit generates the bypass control signal;
the bypass driving voltage generating circuit receives the bypass control signal, and switches off the first power tube by connecting the driving voltage of the first power tube with reference ground and controls the driving voltage of the second power tube to follow the input voltage according to the error feedback signal.
Preferably, the driving circuit includes a PWM signal generating circuit for generating a PWM signal according to the error feedback signal.
Preferably, the drive voltage generation circuit includes a boost control signal generation circuit and a boost drive voltage generation circuit;
when the driving voltage of the second power tube is smaller than the conduction threshold value of the second power tube and the current sampling signal is smaller than a second reference current, the boost control signal generation circuit generates the boost control signal;
and the boost driving voltage generation circuit controls the first power tube and the second power tube to work in a switching state according to the boost control signal and the PWM signal.
Preferably, the power converter is a BOOST topology or a FLYBACK topology.
Preferably, the second power tube is a bidirectional turn-off MOSFET, and the substrate of the second power tube is selected to enable the body diode of the second power tube to be blocked in the reverse direction, so as to control the second power tube to operate in a saturation state.
Preferably, the average current flowing through the second power tube is equal to the average value of the output currents of the power converters.
Preferably, the first reference voltage is set according to an on-resistance of the second power transistor.
According to a second aspect of the embodiments of the present invention, there is provided a control method for a power converter including a first power transistor and a second power transistor, wherein,
sampling the current flowing through the second power tube to obtain a current sampling signal;
receiving an input voltage, an output voltage and the current sampling signal of the power converter;
and when the difference value of the input voltage and the output voltage of the power converter is greater than a first reference voltage or the current sampling signal is greater than a first reference current, controlling the first power tube to be switched off, and controlling the driving voltage of the second power tube to be adjusted along with the input voltage.
Preferably, the controlling the driving voltage of the second power transistor to follow the input voltage regulation comprises: and controlling the second power tube to work in a saturation state, so that the current flowing through the second power tube is kept at a constant value.
Preferably, when the driving voltage of the second power tube is smaller than the conduction threshold value thereof and the current flowing through the second power tube is smaller than a second reference current, the first power tube and the second power tube are controlled to work in a switch state.
According to the technical scheme of the embodiment of the invention, when the difference value of the input voltage and the output voltage of the power converter is larger than the first reference voltage or the current flowing through the second power tube is larger than the first reference current, the first power tube is controlled to be turned off, and the driving voltage of the second power tube is regulated along with the input voltage, so that the second power tube works in a saturated state and plays a role of a constant current source, and the current flowing through the second power tube is kept at a constant value. When the output of the power converter is connected with the LED load, the second power tube serves as a constant current source, so that the constant current source connected with the LED load in series can be omitted, the circuit design is effectively simplified, and the system efficiency is improved.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 is a conventional LED constant current driving circuit;
FIG. 2 is a circuit diagram of a power converter with a control circuit according to an embodiment of the present invention;
FIGS. 3a and 3b are circuit diagrams of current sampling circuits according to embodiments of the present invention;
FIG. 4 is a circuit diagram of a power converter including an error feedback circuit embodiment of the present invention;
FIG. 5 is a circuit diagram of a mode switching circuit according to an embodiment of the present invention;
FIG. 6 is a circuit diagram of a driving voltage generating circuit according to an embodiment of the present invention;
FIG. 7 is a waveform illustrating operation of a power converter according to an embodiment of the present invention;
fig. 8 is a flowchart of a control method of the power converter according to the embodiment of the present invention.
Detailed Description
The present invention will be described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth. It will be apparent to one skilled in the art that the present invention may be practiced without these specific details. Well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present invention.
Further, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.
Meanwhile, it should be understood that, in the following description, a "circuit" refers to a conductive loop constituted by at least one element or sub-circuit through electrical or electromagnetic connection. When an element or circuit is referred to as being "connected to" another element or element/circuit is referred to as being "connected between" two nodes, it may be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled" or "directly connected" to another element, it is intended that there are no intervening elements present.
Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, what is meant is "including, but not limited to".
In the description of the present invention, it is to be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified.
Fig. 2 is a circuit diagram of a control circuit of a power converter according to an embodiment of the present invention. As shown in fig. 2, the power converter 2 of the present embodiment includes a power stage circuit, where the power stage circuit is a BOOST topology, and specifically includes an inductor Lf, and a first end of the inductor Lf is connected to an input end of the power converter; a first power transistor Q1, a first power terminal of which is connected to the second terminal of the inductor Lf, and a second power terminal of which is connected to the reference ground of the power converter 2; and a second power tube Q2, a first power end of which is connected to the second end of the inductor Lf, and a second power end of which is connected to the output end of the power converter 2. The control circuit includes a current sampling circuit 20 and a drive circuit 21. Wherein the current sampling circuit 20 is coupled to the second power transistor Q2 for sampling the current flowing through the second power transistor Q2 to obtain a current sample signal (characterized by the difference between the first sample signal Vi + and the second sample signal Vi-); the driving circuit 21 receives an input voltage Vin, an output voltage Vout, a threshold voltage Vgth of the second power transistor Q2 and the current sampling signal of the power converter 2, and when a difference between the input voltage Vin and the output voltage Vout is greater than a first reference voltage or the current sampling signal is greater than a first reference current, the driving circuit 21 controls the first power transistor Q1 to turn off, and controls the driving voltage VQ2 of the second power transistor Q2 to follow the input voltage Vin for regulation.
Specifically, the drive circuit 21 includes an error feedback circuit 211, a PWM signal generation circuit 222, a mode switching circuit 223, and a drive voltage generation circuit 224. The error feedback circuit 211 receives the current sample signal (characterized by the difference between the first sample signal Vi + and the second sample signal Vi-), and compares the current sample signal with the first reference current to output an error feedback signal Vc. And the PWM signal generating circuit receives the error feedback signal Vc and generates a PWM signal. The mode switching circuit 223 receives an input voltage Vin, an output voltage Vout and the current sampling signal of the power converter 2, and when a difference value between the input voltage Vin and the output voltage Vout is greater than a first reference voltage or the current sampling signal is greater than a first reference current, the mode switching circuit 223 outputs a Bypass control signal Bypass. The driving voltage generating circuit 224 receives the Bypass control signal Bypass, and accordingly generates a first driving voltage VQ1 to control the first power transistor Q1 to be turned off, and a second driving voltage VQ2 to control the driving voltage of the second power transistor Q2 to follow the input voltage Vin.
The PWM signal generating circuit may generate the error feedback signal by comparing the error feedback signal with a sawtooth wave signal or a triangular wave signal, or may be implemented by using other common technical solutions.
In addition, the mode switching circuit 223 may further receive a driving voltage VQ2 of the second power transistor Q2, and when the driving voltage VQ2 is less than a turn-on threshold Vgth thereof and a current flowing through the second power transistor Q2 is less than a second reference current, the mode switching circuit 223 outputs a Boost control signal Boost. At this time, the driving voltage generating circuit receives the Boost control signal Boost and the PWM signal, and generates a first driving voltage VQ1 and a second driving voltage VQ2 accordingly to control the first power transistor Q1 and the second power transistor Q2 to operate in a switching state.
In this embodiment, when the second driving voltage VQ2 for controlling the second power transistor Q2 is adjusted to follow the input voltage Vin, the second power transistor Q2 operates in saturation and can function as a constant current source. As a preferable scheme, a bidirectional turn-off MOSFET may be selected as the second power transistor, and the substrate of the second power transistor Q2 is selected by the second driving voltage VQ2 so that the body diode of the second power transistor Q2 is blocked in the reverse direction, so as to control the second power transistor Q2 to operate in a saturation state.
In this embodiment, when the output terminal of the power converter is connected to an LED load, compared to the technical solution shown in fig. 1, the control circuit can operate the second power tube in a saturation state without a constant current source, so as to function as a constant current source, and thus the output current of the power converter is kept constant.
In another embodiment, the power stage circuit of the power converter may be a FLYBACK topology. Of course, when the average current flowing through the second power tube is equal to the output current of the power converter, the power stage circuit may adopt other topologies meeting the condition, and is not limited to the illustrated BOOST topology or the FLYBACK topology.
Fig. 3a and 3b are circuit diagrams of a current sampling circuit according to an embodiment of the present invention.
Fig. 3a illustrates a resistance sampling method, wherein the current sampling circuit includes a sampling resistor Rs and a filter circuit, the sampling resistor Rs is connected in series between the second power terminal of the second power transistor Q2 and the output terminal of the power converter, and the filter circuit is connected in parallel at two ends of the sampling resistor Rs. In this embodiment, the filter circuit is an RC filter circuit, and is configured to filter a signal sampled by the sampling resistor Rs into a dc signal. Specifically, the RC filter circuit includes filter resistor R1 and filter capacitor C1, the one end of filter resistor R1 with the one end of sampling resistor Rs is connected, the other end with the one end of filter capacitor C1 is connected, the other end of filter capacitor C1 with the other end of sampling resistor Rs is connected. And two ends of the filter capacitor C1 are used as the output end of the current sampling circuit to respectively output a first sampling signal Vi + and a second sampling signal Vi-, and when the sampling circuit is in a steady state, the difference value of the first sampling signal Vi + and the second sampling signal Vi-represents the current sampling signal, namely the current sampling signal flows through the current average value of the second power tube. Of course, those skilled in the art will appreciate that the filter circuit may be implemented by other technical solutions, and is not limited to the embodiment shown in fig. 3 a.
Fig. 3b shows a mirror sampling method, and the current sampling circuit includes a third power transistor Q3, a fourth power transistor Q4, an error amplifier EA, a sampling resistor Rs, and a filter circuit. The third power tube Q3 and the second power tube Q2 form a mirror image structure, that is, the control terminal of the third power tube Q3 is connected to the control terminal of the second power tube Q2, the first power terminal of the third power tube Q3 is connected to the first power terminal of the second power tube Q2, and the second power terminal Q3 of the third power tube is connected to the first power terminal of the fourth power tube Q4; two input ends of the error amplifier EA are respectively connected to the second power end of the second power tube Q2 and the second power end of the third power tube Q3, and an output end of the error amplifier EA is connected to a control end of the fourth power tube Q4; the sampling resistor Rs is connected between the second power terminal of the fourth power tube Q4 and the reference ground; the filter circuit is connected in parallel to two ends of the sampling resistor, and the specific structure of the filter circuit is the same as that of the filter circuit in fig. 3a, which is not described herein again. The loss of the mirror sampling method is smaller compared to the resistive sampling method shown in fig. 3 a.
Fig. 4 is a circuit diagram of a power converter including an error feedback circuit embodying features of the present invention. The error feedback circuit 211 includes a first error amplifier a1 and a reference voltage Vref. The positive pole of the reference voltage Vref receives the first sampling signal Vi +, and the negative pole is connected to a first input terminal (e.g., an inverting input terminal) of the first error amplifier a 1; a second input (e.g., a non-inverting input) of the first error amplifier a1 receives the second sampled signal Vi-, and an output outputs an error feedback signal Vc.
Fig. 5 is a circuit diagram of a mode switching circuit according to an embodiment of the present invention. As shown in fig. 5, the mode switching circuit 223 includes a bypass control signal generating circuit 501 and a boost control signal generating circuit 502.
The bypass control signal generating circuit 501 includes a second comparator a2, a third comparator A3 and an or gate. The first input (e.g., non-inverting input) of the second comparator a2 receives the difference between the first sampled signal Vi + and the first reference current Vi _ ref1, and the second input (e.g., inverting input) receives the second sampled signal Vi-, the output signal of the second comparator a2 is active high when the difference between the first sampled signal Vi + and the second sampled signal Vi-, i.e., the current sampled signal that is characteristic of the current flowing through the second power transistor, is greater than the first reference current Vi _ ref 1. A first input (e.g., a non-inverting input) of the third comparator A3 receives the difference between the input voltage Vin and a first reference voltage Vv _ ref1, a second input (e.g., an inverting input) receives the output voltage Vout, and the output signal of the third comparator A3 is active high when the difference between the input voltage and the output voltage is greater than the first reference voltage Vv _ ref 1. The output signal of the second comparator a2 and the output signal of the third comparator A3 are both input to the or gate, and the or gate outputs a bypass control signal when either of the two output signals is active high. That is, the Bypass control signal generation circuit 501 generates the Bypass control signal Bypass when the current sampling signal (characterized by the difference between the first sampling signal Vi + and the second sampling signal Vi-) is greater than a first reference current Vi _ ref1 or the difference between the input voltage Vin and the output voltage Vout is greater than a first reference voltage Vv _ ref 1.
The boost control signal generation circuit 502 includes a fourth comparator a4, a fifth comparator a5, and an and gate. The first input (e.g., non-inverting input) of the fourth comparator a4 receives the second sampled signal Vi ", the second input (e.g., inverting input) receives the difference between the first sampled signal Vi + and the second reference current Vi _ ref2, and the output signal of the fourth comparator a4 is active high when the difference between the first sampled signal Vi + and the second sampled signal Vi", i.e., the current sampled signal representing the current flowing through the second power transistor, is less than the second reference current Vi _ ref 2. A first input terminal (e.g., a non-inverting input terminal) of the fifth comparator a5 receives the threshold voltage Vgth of the second power transistor Q2, a second input terminal (e.g., an inverting input terminal) receives the driving voltage VQ2 of the second power transistor Q2, and an output signal of the fifth comparator is active high when the driving voltage VQ2 is less than the threshold voltage Vgth. And the output signal of the fourth comparator and the output signal of the fifth comparator are both input to the AND gate, and when the high level of both the output signals is effective, the AND gate outputs a Boost control signal Boost. That is, when the driving voltage VQ2 of the second power transistor Q2 is less than the turn-on threshold Vgth thereof and the current sampling signal is less than the second reference current Vi _ ref2, the Boost control signal generation circuit 502 outputs the Boost control signal Boost.
In this embodiment, the first reference voltage Vv _ ref1 is set according to the on-resistance of the second power transistor, and may be 270mV, for example. The reference voltage Vref is greater than the second reference current Vi _ ref2 but less than the first reference current Vi _ ref 1.
Fig. 6 is a circuit diagram of a driving voltage generating circuit according to an embodiment of the present invention. As shown in fig. 6, the drive voltage generation circuit 224 includes a bypass drive voltage generation circuit 601 and a boosted drive voltage generation circuit 602.
The Bypass driving voltage generating circuit 601 includes a first buffer B1 and a second buffer B2, an input terminal of the first buffer B1 is connected to a reference ground, an enable terminal is connected to a Bypass control signal Bypass, an output terminal generates a first driving voltage VQ1 for controlling the first power transistor Q1, and an output terminal controls the first power transistor Q1 to be turned off; the input end of the second buffer B2 is connected with the error feedback signal Vc, the enable end is connected with the Bypass control signal Bypass, the output end generates a second driving voltage VQ2 for controlling the second power tube Q2, and the driving voltage for controlling the second power tube Q2 is adjusted along with the input voltage Vin. That is, the bypass driving voltage generating circuit turns off the first power transistor Q1 by connecting the driving voltage VQ1 of the first power transistor Q1 to ground, and controls the driving voltage VQ2 of the second power transistor Q2 to follow the input voltage Vin according to the error feedback signal Vc.
The boosted driving voltage generating circuit 602 includes a dead time generating circuit, a third buffer B3 and a fourth buffer B4. The input end of the dead time generating circuit receives the PWM signal, and the output end of the dead time generating circuit is respectively connected with the input ends of the third buffer B3 and the fourth buffer B4, so that the first driving voltage Q1 and the second driving voltage Q2 are generated at certain time intervals; an enable end of the third buffer B3 receives the Boost control signal Boost, and an output end generates a first driving voltage VQ1 for controlling the first power transistor Q1; an enable terminal of the fourth buffer B4 is connected to the Boost control signal Boost, and an output terminal generates a second driving voltage VQ2 for controlling the second power transistor Q2. That is, the Boost driving voltage generating circuit 602 controls the first power transistor Q1 and the second power transistor Q2 to operate in a switching state according to the Boost control signal Boost and the PWM signal
Fig. 7 is a waveform diagram illustrating operation of a power converter in accordance with an embodiment of the present invention.
During the period from t0 to t1, the power converter is in a steady state, and the working mode of the power converter is a Boost (Boost) mode;
during the period from t1 to t2, the input voltage Vin slowly rises, and the control circuit makes the output voltage Vout and the current IQ2 flowing through the second power tube Q2 keep stable by adjusting the duty ratio. When the duty cycle reaches the minimum and cannot be adjusted downward any more, the output voltage Vout and the current IQ2 will rise with the input voltage Vin. When the current IQ2 rises to the first reference current Iref1 (for example, at time t2 in fig. 7) or the difference between the input voltage Vin and the output voltage Vout is greater than the first reference voltage, the control circuit controls the operation mode of the power converter to switch to a Bypass (Bypass) mode;
during the period from t2 to t3, the power converter works in a Bypass mode, the control circuit controls the first power tube Q1 to be closed, adjusts the driving voltage of the second power tube Q2 according to the input voltage Vin, and enables the second power tube Q2 to work in a saturation state, which is equivalent to a constant current source, so that the current IQ2 is stabilized at a set value.
During the period from t3 to t4, the input voltage Vin is unchanged, and the power converter is kept in a Bypass (Bypass) mode and enters a new steady state.
During a period from t4 to t5, the input voltage Vin gradually decreases, the power converter still continues to work in a Bypass mode, the control circuit controls the first power tube Q1 to be turned off, and adjusts the driving voltage of the second power tube Q2 according to the input voltage Vin, so that the current IQ2 continues to be stabilized at a set value;
during t5-t 6: the driving voltage VQ2 of the second power tube Q2 is smaller than the conduction threshold Vgth thereof, the current IQ2 flowing through the second power tube Q2 drops along with the input voltage Vin until the input voltage Vin drops to the second reference current Iref2, and the operating mode of the power converter is switched to a Boost (Boost) mode.
During the period from t6 to t7, the input voltage Vin continues to drop, the driving voltage VQ2 of the second power tube Q2 is smaller than the conduction threshold Vgth of the second power tube Q2, the current IQ2 flowing through the second power tube Q2 is smaller than the second reference current Iref, the power converter works in a Boost (Boost) mode, and the current IQ2 is stabilized at a set value by adjusting the duty ratio;
during the period from t7 to t8, the input voltage Vin is unchanged, and the power converter is kept in a Boost (Boost) mode and enters a new steady state.
Fig. 8 is a flowchart of a control method of the power converter according to the embodiment of the present invention. The control method comprises the following steps:
step S80: sampling the current flowing through the second power tube to obtain a current sampling signal;
step S81: receiving an input voltage, an output voltage and the current sampling signal of the power converter;
step S82: and when the difference value of the input voltage and the output voltage of the power converter is greater than a first reference voltage or the current sampling signal is greater than a first reference current, controlling the first power tube to be switched off, and controlling the driving voltage of the second power tube to be adjusted along with the input voltage.
Wherein, in step S82, controlling the driving voltage of the second power transistor to follow the input voltage regulation comprises: and controlling the second power tube to work in a saturation state, so that the current flowing through the second power tube is kept at a constant value.
Further, the control method may further include step S83: and when the driving voltage of the second power tube is smaller than the conduction threshold value of the second power tube and the current flowing through the second power tube is smaller than a second reference current, controlling the first power tube and the second power tube to work in a switch state.
According to the technical scheme of the embodiment of the invention, when the difference value of the input voltage and the output voltage of the power converter is larger than the first reference voltage or the current flowing through the second power tube is larger than the first reference current, the first power tube is controlled to be turned off, and the driving voltage of the second power tube is regulated along with the input voltage, so that the second power tube works in a saturated state and plays a role of a constant current source, and the current flowing through the second power tube is kept at a constant value. When the output of the power converter is connected with the LED load, the second power tube serves as a constant current source, so that the constant current source connected with the LED load in series can be omitted, the circuit design is effectively simplified, and the system efficiency is improved.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (15)
1. A control circuit of a power converter, the power converter comprises a first power tube and a second power tube,
the current sampling circuit is coupled with the second power tube and used for sampling the current flowing through the second power tube to obtain a current sampling signal;
the driving circuit receives the input voltage, the output voltage and the current sampling signal of the power converter, and when the difference value of the input voltage and the output voltage is greater than a first reference voltage or the current sampling signal is greater than a first reference current, the driving circuit controls the first power tube to be turned off and controls the driving voltage of the second power tube to be adjusted along with the input voltage;
the second power tube is a rectifier switch tube.
2. The control circuit of claim 1, wherein controlling the driving voltage of the second power tube to follow the input voltage regulation comprises: and controlling the second power tube to work in a saturation state, so that the current flowing through the second power tube is kept at a constant value.
3. The control circuit of claim 1, wherein the driving circuit controls the first power transistor and the second power transistor to operate in a switching state when the driving voltage of the second power transistor is smaller than the turn-on threshold thereof and the current flowing through the second power transistor is smaller than a second reference current.
4. The control circuit of claim 1, wherein the current sampling circuit comprises:
the sampling resistor is coupled with the second power tube and used for sampling the current flowing through the second power tube;
and the filter circuit is connected with the sampling resistor in parallel and is used for filtering the signal obtained by the sampling resistor into a direct current signal serving as the current sampling signal.
5. The control circuit of claim 1, wherein the drive circuit includes an error feedback circuit for comparing the current sample signal to a reference voltage to generate an error feedback signal.
6. The control circuit of claim 5, wherein the drive circuit comprises a bypass control signal generation circuit and a bypass drive voltage generation circuit;
when the current sampling signal is larger than a first reference current or the difference value of the input voltage and the output voltage is larger than a first reference voltage, the bypass control signal generating circuit generates the bypass control signal;
the bypass driving voltage generating circuit receives the bypass control signal, and switches off the first power tube by connecting the driving voltage of the first power tube with reference ground and controls the driving voltage of the second power tube to follow the input voltage according to the error feedback signal.
7. The control circuit of claim 5, wherein the drive circuit comprises a PWM signal generation circuit for generating a PWM signal based on the error feedback signal.
8. The control circuit according to claim 7, wherein the drive circuit includes a boosted control signal generation circuit and a boosted drive voltage generation circuit;
when the driving voltage of the second power tube is smaller than the conduction threshold value of the second power tube and the current sampling signal is smaller than a second reference current, the boost control signal generation circuit generates the boost control signal;
and the boost driving voltage generation circuit controls the first power tube and the second power tube to work in a switching state according to the boost control signal and the PWM signal.
9. The control circuit of claim 1 wherein the power converter is a BOOST topology or a FLYBACK topology.
10. The control circuit of claim 1, wherein the second power transistor is a bidirectional turn-off MOSFET, and the substrate of the second power transistor is selected such that the body diode of the second power transistor is blocked in a reverse direction, so as to control the second power transistor to operate in a saturation state.
11. The control circuit of claim 1 wherein an average current flowing through the second power tube is equal to an output current of the power converter.
12. The control circuit of claim 1, wherein the first reference voltage is set according to an on-resistance of the second power transistor.
13. A control method for a power converter including a first power transistor and a second power transistor,
sampling the current flowing through the second power tube to obtain a current sampling signal;
receiving an input voltage, an output voltage and the current sampling signal of the power converter;
when the difference value of the input voltage and the output voltage of the power converter is larger than a first reference voltage or the current sampling signal is larger than a first reference current, controlling the first power tube to be switched off, and controlling the driving voltage of the second power tube to be adjusted along with the input voltage;
the second power tube is a rectifier switch tube.
14. The control method of claim 13, wherein controlling the driving voltage of the second power transistor to follow the input voltage regulation comprises: and controlling the second power tube to work in a saturation state, so that the current flowing through the second power tube is kept at a constant value.
15. The control method according to claim 13, wherein the first power tube and the second power tube are controlled to operate in a switching state when the driving voltage of the second power tube is smaller than the turn-on threshold thereof and the current flowing through the second power tube is smaller than a second reference current.
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| CN113301255B (en) * | 2021-05-21 | 2022-12-02 | 上海富瀚微电子股份有限公司 | Power consumption adjusting method and device and storage medium |
| CN114096040A (en) * | 2021-11-17 | 2022-02-25 | 启攀微电子（上海）有限公司 | Double-circuit independent control flash lamp drive structure |
| CN115313862B (en) * | 2022-08-08 | 2023-05-05 | 深圳创客恒源科技有限公司 | Direct-connection control device and method of DC-DC conversion circuit |
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