CN108493151A - Jump through-hole structure - Google Patents

Jump through-hole structure Download PDF

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Publication number
CN108493151A
CN108493151A CN201810132709.5A CN201810132709A CN108493151A CN 108493151 A CN108493151 A CN 108493151A CN 201810132709 A CN201810132709 A CN 201810132709A CN 108493151 A CN108493151 A CN 108493151A
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China
Prior art keywords
hole
wiring layer
layer
jump
distribution
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Granted
Application number
CN201810132709.5A
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Chinese (zh)
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CN108493151B (en
Inventor
张洵渊
林萱
J·J·麦克马洪
S·B·劳
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GlobalFoundries US Inc
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GlobalFoundries Inc
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    • HELECTRICITY
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    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877Filling of holes, grooves or trenches, e.g. vias, with conductive material
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    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76816Aspects relating to the layout of the pattern or to the size of vias or trenches
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Abstract

This disclosure is related to jumping through-hole structure, about semiconductor structure, and more particularly, about jump through-hole structure and its preparation method.The structure includes:First wiring layer has one or more distribution structures;Upper layer wiring layer has one or more distribution structures, is located above first wiring layer;Barrier material contacts at least one of the distribution structure of the upper layer wiring layer;Through-hole is jumped, there is metal compound, the jump through-hole to pass through the upper layer wiring layer and be contacted with the one or more distribution structures of first wiring layer;And conductive material, in the jump through-hole above the metal compound and in the through-hole interconnection above the barrier material.

Description

Jump through-hole structure
Technical field
This disclosure is about semiconductor structure, and more particularly, about jumping through-hole structure and its preparation method.
Background technology
In through-hole technology, the jump through-hole across many insulator layers can be formed, for example, skipping one in insulator layer Or more distribution structure, to be connect with lower layer distribution structure.This provides the resistance characteristic of improvement, minimizes lower layer's distribution structure The capacitance of (for example, at M0 layers), and the area efficiency of chip technology is provided.
Using through-hole is jumped, there are many challenges.For example, in process, jump through-hole needs fall in lower stratum (for example, M0 ranks Layer) in distribution structure on, while regular through-hole needs fall the distribution structure in upper stratum (for example, stratum of M1 or more) On.However, due to jumping via etch process, the interface of distribution structure and through-hole interconnection structure in upper stratum can cause to damage Wound.Also that is, due to etch depth difference, jumping via etch process can cause upper layer distribution structure (for example, copper product) surface to be damaged Wound.This damage causes higher resistivity, followed by reducing apparatus efficiency.
Furthermore in jumping via process, known copper-plating technique is used for filling through-hole.However, copper-plating technique is in all directions Growth, including the side wall of through-hole and bottom, cause to generate a large amount of cavities, because with the pinching (pinch- derived from side wall growth Off) and derived from insufficient physical vapour deposition (PVD) (PVD) seed it is covered in the bottom cavitation on high aspect ratio through-hole.Cavity The selectively formed undercutting wheel of damage (PID) or cap for interlayer dielectric can be induced due to by ultralow k (ULK) plasma-based Wide (undercut profile).Furthermore lining/seed is not enough to the overall length of covering high aspect ratio through-hole, also leads to empty shape At.There is negative effect in these cavities for the resistivity for jumping through-hole, followed by reduction device efficiency.
Invention content
In an aspect of this disclosure, a kind of structure, it includes:First wiring layer has one or more with knot Structure;Upper layer wiring layer has one or more distribution structures, is located above first wiring layer;Barrier material contacts on this At least one of the distribution structure of layer wiring layer;Through-hole is jumped, there is metal compound, the jump through-hole to pass through the upper layer wiring layer And it is contacted with the one or more distribution structures of first wiring layer;And conductive material, being somebody's turn to do above the metal compound It jumps in through-hole and in the through-hole interconnection above the barrier material.
In an aspect of this disclosure, a kind of method, it includes:Formed through-hole with expose upper layer wiring layer one or More distribution structures;It is formed and jumps through-hole, pass through the one or more distribution structures of the upper layer wiring layer and exposure lower layer wiring layer; The barrier material for the one or more distribution structures of the exposure for covering the upper layer wiring layer is formed in the through-hole;Selectivity growth gold Belong to material in the jump through-hole;And fill the jump through-hole and the rest part of the through-hole with conductive material.
In an aspect of this disclosure, a kind of method, it includes:Form the wiring with one or more distribution structures Layer is in lower layer's wiring layer;The wiring layer with one or more distribution structures is formed in the upper layer above lower layer's wiring layer In wiring layer;It forms the first through hole for the one or more distribution structures for exposing the upper layer wiring layer and passes through the upper layer wiring layer And the second through-hole terminated above lower layer's wiring layer;Barrier material is formed in the first through hole to stop the upper layer wiring The one or more distribution structures of the exposure of layer;Extend second through-hole fallen on lower layer's wiring layer to form the exposure lower layer The jump through-hole of the one or more distribution structures of wiring layer, at the same the barrier material protect the upper layer wiring layer the exposure one or More distribution structures;At least jump through-hole is filled to contact the one or more distribution structures of lower layer's wiring layer with conductive material And it is electrically connected with the one or more distribution structures of the upper layer wiring layer;And with different conductive materials fill the jump through-hole and The rest part of the first through hole.
Description of the drawings
Illustrate that this disclosure is described in detail below, wherein with reference to multiple attached drawings by do not have it is limited in a manner of illustrate and originally take off Show the Illustrative embodiments of content.
Fig. 1 is according to several aspect schematic structures of this disclosure and each technique.
Fig. 2 is formed in the barrier material in via openings (but not limited to) according to several aspects of this disclosure diagram And each technique.
Fig. 3 jumps through-hole structure (but not limited to) and each technique according to several aspect icons of this disclosure.
Fig. 4 is jumping through-hole structure and regular through-hole structure (but not limited to) according to several aspect icons of this disclosure In metal compound feature and each technique.
Fig. 5 illustrates the alternative structure of other aspects according to this disclosure and each technique.
Specific implementation mode
This disclosure relates to semiconductor structure, and more particularly, about jump through-hole structure and preparation method.It is more special Other to be, this disclosure provides the jump through-hole structure of technique and gained, when the through-hole of the upper stratum's through-hole formation of solutions etches Between unequal problem, for example, upper layer wiring layer damages during jumping via etch process.Accordingly and advantageously, technique and The jump through-hole structure of gained will not cause upper layer distribution structure to damage because of any difference of through-hole etch depth.In other words, Method provided herein will not cause logical in jump in the copper of upper wiring stratum (for example, M1 stratum) or other metal compound materials Over etching during hole is formed.
In additional specific embodiment, this disclosure describes a kind of selectivity without electric (cobalt or nickel) technique, logical jumping Grow up from top to bottom in pore structure metal.Using selective electroless metal (for example, cobalt or nickel) growing process, cobalt or nickel will not It is formed on the side wall for jumping through-hole, followed by, it is ensured that this is filled without cavity, no matter jumping the profile and aspect ratio of through-hole. By this method, it is advantageous to the pinching by growing up derived from side wall can be prevented and planted derived from insufficient physical vapour deposition (PVD) (PVD) Son is covered in a large amount of cavities caused by the bottom cavitation on high aspect ratio through-hole, then, can lower jump through-hole resistivity from And improve device efficiency.
In additional specific embodiment, it is described in processes herein and provides one kind during jumping via etch process on upper layer Barrier material above the exposed surface of distribution structure (for example, M1 stratum).In several specific embodiments, which can It protects the exposed surface of upper layer distribution structure and prevents cobalt from excessively growing up in through-hole and upper layer wiring layer.Also that is, the blocking Material can be used as shielding to protect upper layer distribution structure during jumping via etch process.The barrier material can also be used for preventing cobalt Material is excessively grown up in regular through-hole interconnection and distribution structure.Furthermore, it is advantageous to it is described in the metal interconnection structure of this paper For for 7 nanometers of devices below back segment (BEOL) and stage casing (MOL) interconnection structure have impact, known copper metallization herein Object possibly can not extend.
Many different tools can be used to manufacture the jump through-hole structure of this disclosure in many ways.However, usually should Method and tool are for forming the structure with micron and nano-grade size.For manufacturing the jump through-hole structure of this disclosure This method also that is, technology be to be selected from integrated circuit (IC) technology.For example, the structure builds on chip and is implemented in With in photoetching process (photolithographic process) patterned material membrane above chip.In particular, the jump through-hole The manufacture of structure uses following 3 basic construction blocks:(i) several material films are deposited on substrate, (ii) uses optical patterning Method laying pattern is shielded from above film, and (i ii) is etched selectively to film for the shielding.
Fig. 1 is according to several aspect schematic structures of this disclosure and each technique.In several specific embodiments, Fig. 1 The structure 10 of middle icon may be, for example, BEOL or MOL structures.In particular, structure 10 is included in multiple wiring stratum in crystal grain, Such as M0, M1 etc..For example, structure 10 includes the distribution structure 14 being set in insulating material 12.Those skilled in the art answer Understand, the distribution structure 14 in insulating material 12 is the lower layer's distribution structure typically specified in M0 stratum;However wiring Structure 14 may be provided in any lower stratum of structure.
Distribution structure 14 can be made of any conductive material, such as copper, cobalt, ruthenium, tungsten, aluminium etc., be lined with titanium nitride (TiN), tantalum nitride (TaN), titanium, tantalum, ruthenium, cobalt etc..In several specific embodiments, insulating material 14 is that can be used for example to change Learn the oxide of the known deposition of vapor deposition (CVD), such as interlayer dielectric material.Insulating material 14 is alternatively Ultra low k dielectric materials, carbon dope insulating material have other porous insulating materials.
Distribution structure 14 can be formed with conventional photolithographic, etching and the deposition method known by those skilled in the art.For example, The resist being formed in above insulating material 12 is exposed to energy (light) to form pattern (opening).With selective chemical object Etch process can be used for the shape in insulating material 12 by the opening of resist for example, reactive ion etching (RIE) At one or more grooves.Then, resist can be with known oxygen ashing method (oxygen ashing process) or other are known Stripper (stripant) removes.It, can be with any known depositing operation (for example, chemical vapor deposition after removing resist (CVD) technique) conductive material is deposited in one or more grooves.Any residual materials 14 on 12 surface of insulating material can be used Known chemical mechanical grinding (CMP) technique removes.
After the cmp process, coating 16 is formed on distribution structure 14 and insulating material 12.In several specific embodiments In, coating 16 can be diffused barrier layer, for example, copper diffused barrier layer, prevents copper or other metal compounds to be diffused into upper layer Insulator layer 18.Coating 16 is diffused into distribution structure 14 prevented also from oxygen.
Still referring to FIG. 1, distribution structure 20 and through-hole interconnection structure 22 are all formed in upper layer insulator layer 18.In several tools In body embodiment, distribution structure 20 and interconnection structure 22 can be formed in any wiring layer above distribution structure 14.For example, Distribution structure 20 in insulating material 18 is denoted as the upper layer distribution structure in stratum such as M1, M2;However, interconnection structure 22 Respectively it is denoted as V0, V1 etc..Distribution structure 20 and interconnection structure 22 can be formed with conventional photolithographic, etching and depositing operation, this With when illustrating the formation of lower layer's distribution structure 14 described in it is similar.Distribution structure 20 and through-hole interconnection structure 22 can be led by any Electric material is constituted, such as copper, cobalt, ruthenium, tungsten, aluminium etc., is lined with titanium nitride, tantalum nitride, titanium, tantalum, ruthenium, cobalt etc..
After removing the CMP process of any residual materials on 18 surface of insulating material, coating 24 is formed in knot On structure 20 and insulating material 18.In several specific embodiments, coating 24 can be diffused barrier layer, such as copper diffusion barrier Layer, it is such as above-mentioned.
For example, form shielding material 28 on the surface of insulating material 26, the selected distribution structure 20 in M1 stratum Edge and M0 stratum on distribution structure 14 between.Shielding material 28 can be the known deposition and etch process with such as RIE The titanium nitride being deposited and patterned.Resist 30 is formed on shielding material 28 and insulating material 26, is exposed to energy Amount (light) with formed respectively with the pattern (opening) that is aligned of one or more distribution structures 14,22 in M0, M1 stratum.With selection Property chemicals etch process, such as RIE can be used for forming insulating material 26 and coating 24 by the opening of resist 30 In one or more through-hole 32a, 32b.The etch process is clocked to sudden and violent by through-hole 32b on the surface of upper layer distribution structure 20 Depth when dew stops.By this method, the depth of through-hole 32b falls on the surface of the distribution structure 20 in M1 stratum and sudden and violent Expose the surface.
In fig. 2, directly on 20 surface of upper layer distribution structure and/or on formed barrier material 34 in through-hole 32b In.In several specific embodiments, barrier material 34 can be selectivity growth in the manganese on the exposed surface of distribution structure 20. In several specific embodiments, manganese chemical vapor deposition (CVD) or the growth of atomic layer deposition (ALD) process selectivity are in copper table On face, for example, copper wiring structures.The depth of barrier material 34 is preferably 3 nanometers or smaller, such as.Substituting specific embodiment In, barrier material 34 can be each personal SiH4Or GeH4The copper silicon (CuSi) or copper germanium for handling the copper surface of distribution structure and being formed (CuGe)。
In figure 3, it jumps via etch process and continues across stratum (for example, M1 stratum) to lower stratum's (example in structure Such as, M0 stratum) distribution structure 14.In several specific embodiments, jumps through-hole etching and extend (intensification) through-hole 32a', fall On the distribution structure 14 in lower stratum and expose it.During jumping via etch process herein, barrier material 34 can protect (screen Cover) it is located at the surface of distribution structure 20 (distribution structure 14 above) on upper layer in order to avoid being used in jump via etch process Etch chemistries are damaged.
Then, resist 30 can be removed with known oxygen ashing method or other known strippers, followed by progress groove RIE With formation (upper stratum, such as stratum M2) groove 36, then with wet technique removal shielding material 28.Barrier material 34 also can be Protection is located at the surface of the distribution structure 20 in M1 stratum during removing shielding material.
As shown in figure 4, through-hole 32a' and 32b and groove 36 are filled with conductive material 38 to form dual damascene layer structure (dual damascene structure), for example, interconnection structure and upper layer distribution structure.It will be understood by a person skilled in the art that The interconnection structure being formed in through-hole 32a' can be that the jump of distribution structure that is electrical and being connected directly in M0 stratum 14 is logical Pore structure, for example, it skips any connection in the stratum of M1 or more.On the other hand, the conductive material in through-hole 32b 38 can be regular through-hole interconnection structure, provide and distribution structure 20 electrical being located in lower stratum and be directly connected to.
In specific embodiment particularly, jumping through-hole 32a' is partially filled with cobalt (Co) 38;However, several specific In embodiment, barrier material 34 can substantially prevent cobalt from growing up in through-hole interconnection 32b.In several specific embodiments, cobalt (Co) 38 are formed in M0, M1 stratum in a manner of from lower to upper without electric growing process in through-hole 32a' with selectivity.Specifically, In several specific embodiments, cobalt (Co) 38 can selectively grow up in the exposure of the one or more distribution structures 14 of lower layer's wiring layer On metal surface, while not growing up on the barrier material 34 on the insulator side wall of through-hole 32a', 32b or in through-hole 32b, For example, cobalt (Co) 38 will not grow up on the insulating material of side wall for forming through-hole.
By this method, 38 growing process of cobalt (Co) can be filled up completely the lower half for jumping through-hole 32a' in a manner of from lower to upper Portion prevents from forming any cavity in through-hole 32a.In other words, the selection growing process can ensure to jump through-hole 32a without cavity Filling, no matter its profile and aspect ratio, seed covering (seed coverage), ultralow k (ULK) electricity on distribution structure 14 Slurry induce damage (PID) or cap for interlayer dielectric selectivity how.Then, this no cavity of interconnection structure Form the resistivity that can increase and jump through-hole 32a'.Those skilled in the art it will also be appreciated that cobalt (Co) it is compatible without electric growing process In dielectric material, thus exclude the needs of barrier layer.
More as shown in figure 4, jumping its remaining part of through-hole 32a', regular through-hole 32b and groove 36 (being used for upper layer distribution structure) Divide and is filled with conductive material 40 to form dual damascene layer structure, such as interconnection structure and upper layer distribution structure.In several specific realities It applies in example, conductive material 40 can be the several materials expected of such as copper, aluminium, tungsten etc..Conductive material 40 can use known deposition side Method deposits, for example, plating, electroless deposition, CVD and/or plasma-based vapor deposition (PVD) and/or atomic layer deposition (ALD), then It is known flatening process, for example, CMP, to remove any residual materials on insulator layer 26.Then, coating can be formed 42 above insulator layer 26 and conductive material 40, then carries out known BEOL techniques (for example, welding structure).
Fig. 5 is according to several alternative aspect icon alternative structures of this disclosure and each technique.It substitutes herein specific real It applies in example, in the growth of cobalt (Co) 38 under any situation in through-hole 32b, through-hole 32b, groove is partially filled with cobalt material 38 Barrier material 34 in 32b can inhibit cobalt (Co) 38 excessively to grow up in through-hole 32b, for example, growing to the height for exceeding through-hole 32b Degree.Also that is, cobalt rate of growth should be smaller than the situation in through-hole 32a, and even this smaller cobalt rate of growth can be used to fill Through-hole 32b.Therefore, in this particular embodiment, the barrier material 34 in through-hole 32b can substantially slow down cobalt material 38 at farm labourer Skill, while being directly electrically connected with the distribution structure 20 in M1 stratum and the cobalt 38 in through-hole 32b.For example, cobalt (Co) material Rate of growth of the material 38 in through-hole 32a', 32b may be about 2 on each surface:1, for example, distribution structure 14 is by through-hole 32a' And the copper surface that the barrier material 34 in through-hole 32b exposes.Then, cobalt (Co) material 38 can be with remaining conductive material 40 directly electricity Gas contacts.
Above-mentioned method of being somebody's turn to do (s) is to be used in the manufacture of IC chip.Gained IC chip can by producer with Raw wafer form (the raw wafer form) single wafer of multiple unpackaged chips (namely with), as bare crystalline grain (bare die) or the form that has encapsulated are sold.In the latter case, chip is mounted in single-chip package body (for example, plastics Carrier (plastic carrier) has and is fixed to mainboard or the pin (lead) of other higher carriers) or multi-chip envelope It fills in body (for example, having surface interconnection piece (surface interconnection) or embedded interconnection piece (buried Interconnection) any or both ceramic monolith).Then, in either case, chip and other chips, from It dissipates circuit unit and/or other signal processing apparatus is integrated into the following part of any one:(a) intermediate products are (for example, main Plate), or (b) final products.The final products can be any product for including IC chip, be answered from toy and other low sides The advanced computers product for using display, keyboard or other input equipments and central processing unit differs.
In order to illustrate, the description of the various specific embodiments of this disclosure has been presented, but has been not intended to limit Or it is defined in revealed specific embodiment.Persons skilled in the art understand that still there are many modifications and variant without departing from institute State the scope and spirit of specific embodiment.The term for being used in this paper is selected at the original that can best explain specific embodiment Reason, practical application or the technology better than the technology that can be found in city improve, or enable persons skilled in the art much of that Solution is disclosed in the specific embodiment of this paper.

Claims (20)

1. a kind of structure, including:
First wiring layer has one or more distribution structures;
There are upper layer wiring layer one or more distribution structures, the upper layer wiring layer to be located above first wiring layer;
Barrier material contacts at least one of the distribution structure of the upper layer wiring layer;
Through-hole is jumped, there is metal compound, the jump through-hole to pass through the upper layer wiring layer and one or more with this of first wiring layer Distribution structure contacts;And
Conductive material, in the jump through-hole above the metal compound and in the through-hole interconnection above the barrier material.
2. structure as described in claim 1, wherein the conductive material is that the jump through-hole matches knot with above the jump through-hole A part for structure.
3. structure as claimed in claim 2, wherein the metal compound is cobalt or nickel of the selectivity growth in via openings, The via openings pass through the one or more distribution structures of the upper layer wiring layer and exposure first wiring layer.
4. structure as claimed in claim 3, wherein the cobalt or nickel are partially filled with the via openings.
5. structure as claimed in claim 4, wherein the jump through-hole is without cavity.
6. structure as claimed in claim 4, wherein the cobalt or nickel are partially fill in the through-hole above the barrier material.
7. structure as claimed in claim 6, wherein the conductive material is filled in matching above the through-hole and the upper layer wiring layer Line trenches and the conductive material form distribution structure.
8. structure as described in claim 1, wherein the barrier material is manganese.
9. structure as described in claim 1, wherein the barrier material is copper silicon or copper germanium, passes through each personal SiH4Or GeH4 It handles the copper surface of the distribution structure of the upper layer wiring layer and is formed.
10. a kind of method, including:
Through-hole is formed to expose the one or more distribution structures of upper layer wiring layer;
It is formed and jumps through-hole, pass through the one or more distribution structures of the upper layer wiring layer and exposure lower layer wiring layer;
The barrier material for the one or more distribution structures of the exposure for covering the upper layer wiring layer is formed in the through-hole;
Selectivity growth metal material is in the jump through-hole;And
The jump through-hole and the rest part of the through-hole are filled with conductive material.
11. method as claimed in claim 10, wherein the selectivity growth of the metal material is comprising selectivity growth cobalt in this It jumps in through-hole to be partially filled with the jump through-hole.
12. method as claimed in claim 11, wherein the selection of the cobalt or nickel is grown into without electric growing process.
13. method as claimed in claim 12, wherein this is in the jump through-hole from lower layer's wiring layer without electric growing process The expose portions of the one or more distribution structures start from the bottom up.
14. method as claimed in claim 10, wherein the conductive material is copper.
15. method as claimed in claim 10, wherein the growth of the cobalt or nickel is partially filled with the through-hole and this method more Including filling the rest part of the through-hole with the conductive material and matching line trenches above the upper layer wiring layer.
16. method as claimed in claim 10, wherein form the barrier material by sedimentation manganese.
17. structure as claimed in claim 10, wherein the barrier material is copper silicon or copper germanium, passes through each personal SiH4Or GeH4It handles the surface of the distribution structure of the upper layer wiring layer and is formed.
18. a kind of method, including:
The wiring layer with one or more distribution structures is formed in lower layer's wiring layer;
The wiring layer with one or more distribution structures is formed in the upper layer wiring layer above lower layer's wiring layer;
Formed exposure the upper layer wiring layer the one or more distribution structures first through hole with across the upper layer wiring layer and The second through-hole terminated above lower layer's wiring layer;
Barrier material is formed in the first through hole to stop the one or more distribution structures of the exposure of the upper layer wiring layer;
Extend second through-hole fallen on lower layer's wiring layer to form the one or more wirings of exposure lower layer's wiring layer The jump through-hole of structure, while the barrier material protects the one or more distribution structures of the exposure of the upper layer wiring layer;
With conductive material filling at least the jump through-hole with contact lower layer's wiring layer the one or more distribution structures and on this The one or more distribution structure electrical connections of layer wiring layer;And
The jump through-hole and the rest part of the first through hole are filled with different conductive materials.
19. method as claimed in claim 18, wherein the barrier material is manganese, copper silicon or copper germanium.
20. method as claimed in claim 18, wherein with conductive material filling at least jump through-hole be cobalt or nickel without electricity at Long technique.
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