CN108470777B - Preparation method of material testing unit with nano-scale interval small electrodes for in-situ power-on chip of transmission electron microscope - Google Patents
Preparation method of material testing unit with nano-scale interval small electrodes for in-situ power-on chip of transmission electron microscope Download PDFInfo
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- H—ELECTRICITY
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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Abstract
The invention discloses a method forA method for preparing the material testing unit of transmission electron microscope in-situ chip with nano-class small electrodes includes such steps as preparing the testing unit of material from small-size metal layer, insulating layer, testing material and protecting layer, and etching on SiO layer by Focused Ion Beam (FIB) technique2The method comprises the steps of obtaining a metal electrode groove with a nanoscale on a substrate through a metal layer, filling a test material into the metal electrode groove, covering a protective layer, adopting an FIB (focused ion beam) method to prepare a TEM (transverse electric field) sample, extracting a unit containing the metal layer and the test material, transferring the unit onto a through cell chip to form a material test unit with a nano-scale small-interval electrode, and carrying out in-situ electrification on the unit in a TEM (transverse electric field), wherein the unit can be used for researching the relation between the microstructure change and the electrical property of the test material.
Description
Technical Field
The invention belongs to the field of semiconductor device processing, and relates to a preparation method of a material testing unit with small electrodes at a nanometer-scale interval for a transmission electron microscope in-situ power-on chip.
Background
A Transmission Electron Microscope (TEM) is a precision Electron optical instrument that uses an Electron beam as a light source, uses an electromagnetic coil as a magnetic lens to focus the Electron beam, and uses electrons penetrating through a sample to perform imaging to obtain information on the atomic scale structure of the material. The TEM is mainly applied to the aspects of appearance observation, phase analysis, crystal structure determination, defect analysis, material component analysis, element distribution analysis, chemical state analysis and the like of a sample, and is an essential research tool in the current material, partial physics, chemistry, biology and medicine research. Focused Ion Beam (FIB) is an Ion Beam generated by a liquid metal (such as Ga) Ion source, which is accelerated and Focused by an Ion gun and then irradiated on the surface of a sample to generate a secondary electron signal to obtain an electron image. FIB can strip surface atoms with strong current ion beam, carries out micro-nano surface morphology processing, realizes fixed point cutting, selective material evaporation: conductive/non-conductive deposition, and enhanced or selective etching are performed in localized areas, and thus FIB is an integral means of preparing high quality TEM samples.
In recent years, many studies have been conducted to observe the microstructure changes occurring in real time inside the material under the action of external field (electricity/heat/force/gas) by means of TEM (in-situ TEM techniquein-situTEM) has the characteristics of direct observation and real-time monitoring, emphasizes on the analysis of the change process, and is helpful for further understanding the material performance and guiding the optimization of the material structure. An in-situ electric field is applied in a TEM, and some manufacturers at home and abroad have commercialized in-situ electrified sample rods which can communicate an electric signal into a TEM sample chamber for researching the structure transformation behavior of a material under an external electric field. The electrodes in the in-situ sample rod are prepared by adopting optical exposure and stripping processes, the electrode spacing is larger and is more than 3 um, and a test unit formed by directly carrying a test material has an overlarge size and cannot well simulate the performance of the test material in an actual device.
Disclosure of Invention
The invention aims to provide a preparation method of a material test unit with nano-scale small-spacing electrodes for a transmission electron microscope in-situ power-on chip, aiming at overcoming the defects in the prior art, solving the problem that the size of the test unit formed by directly carrying a test material is overlarge in the past, being capable of well simulating the performance of the test material in an actual device and providing great convenience for the research of the relation between the structure and the performance of the material.
The specific technical scheme for realizing the purpose of the invention is as follows:
a preparation method of a material testing unit with small electrodes at a nanometer-scale interval for a transmission electron microscope in-situ power-on chip comprises the following specific steps:
1) selecting a silicon wafer as a substrate, and cleaning the Si substrate;
2) preparing 500-1000 nm SiO on the surface of the Si substrate by using a thermal oxidation process2A substrate;
3) by magnetron sputtering, electron beam evaporation, chemical vapor deposition or atomic depositionA sublayer deposition film preparation device, SiO obtained in step 2)2Depositing a 1-500 nm metal film on a substrate, wherein the metal is Au, Pt, W, Al or Cu;
4) continuously depositing an insulating material film of 1-500 nm on the metal film obtained in the step 3) by utilizing magnetron sputtering, electron beam evaporation, chemical vapor deposition or atomic layer deposition film preparation equipment, wherein the insulating material is SiO2Or SiN;
5) etching a long-strip-shaped groove on the insulating material film obtained in the step 4) by using an FIB ion beam etching process, wherein the depth of the groove is the common thickness of the metal film and the insulating material film, the length of the groove is 100 nm-10 um, the width D of the groove is small electrode distance, and D =1-1000 nm;
6) depositing a test material on the strip-shaped groove obtained in the step 5) by utilizing magnetron sputtering, electron beam evaporation, chemical vapor deposition or atomic layer deposition film preparation equipment, wherein the deposition thickness of the test material is the common thickness of the metal film in the step 3) and the insulating material film in the step 4);
7) continuously depositing a protective layer material on the test material obtained in the step 6) by utilizing magnetron sputtering, electron beam evaporation, chemical vapor deposition or atomic layer deposition film preparation equipment; the protective layer is made of SiO2Or SiN with a thickness of at least 10 nm;
8) extracting the section of the multilayer film material obtained in the step 7) in a sheet form by using an FIB method, wherein the section is vertical to the direction of the long-strip-shaped groove, the length of the extracted sheet is 5-10 um, and the thickness of the extracted sheet is 10-100 nm;
9) cutting off the Si substrate in the slice obtained in the step 8);
10) transferring the thin sheet obtained in the step 9) onto a through cell, and connecting a metal electrode of the chip and a metal film on the thin sheet by using a method of FIB deposition of Pt to prepare the material testing unit with the nano-scale small-space electrode.
The invention provides a preparation method of a material testing unit with nano-scale interval small electrodes for a transmission electron microscope in-situ power-on chip, which is used for meeting the requirement of a material test on the interval of smaller-sized electrodes.
The small electrode distance is controllable, the preparation method has high portability, and microstructure representation of the material unit can be realized in a nanometer scale when the material unit is electrified, so that the relation between the microstructure and the performance of the nanometer material can be conveniently researched.
Drawings
FIG. 1 shows the process of the present invention at step 4 in SiO2A schematic cross-sectional view of a substrate after a metal film and an insulating material film are sequentially deposited thereon;
FIG. 2 is a schematic cross-sectional view of the present invention after step 5 in which a trench is etched by using FIB ion beam;
FIG. 3 is a schematic cross-sectional view of the present invention after sequentially depositing a test material and a protective layer through step 7;
FIG. 4 is a schematic diagram of a sliced Si substrate obtained by cutting Si substrate in step 8 and step 9;
fig. 5 is a schematic structural diagram of the material testing unit with the nano-scale small-pitch electrodes obtained in step 10.
Detailed Description
The essential features and advantages of the invention will be further elucidated by the following examples, which are given only by way of illustration and are not to be construed as limiting the invention.
Examples
A preparation method of a material testing unit with small electrodes at a nanometer-scale interval for a transmission electron microscope in-situ power-on chip comprises the following specific steps:
firstly, step 1) is carried out, a 4-inch silicon wafer substrate is provided, and the silicon wafer substrate is cleaned, so that a high-purity oxide insulating layer can be prepared in the subsequent steps. In this embodiment, the process of cleaning the silicon wafer substrate includes:
step 1-1), placing the silicon wafer substrate in a reaction tank containing ammonia water, hydrogen peroxide and deionized water according to a volume ratio of 1: 2: 5, boiling the mixed solution in proportion for 5 min, cooling, washing with deionized water for 3 min, and drying with nitrogen to remove oil stains and large particles on the surface of the silicon wafer substrate;
step 1-2), placing the silicon wafer substrate in a reaction tank containing hydrochloric acid, hydrogen peroxide and deionized water according to a volume ratio of 1: 2: 5, boiling the mixed solution in proportion for 5 min, cooling, washing with deionized water for 3 min, and then blowing with nitrogen to dry to remove metal ions on the surface of the silicon wafer substrate;
and 1-3), placing the silicon wafer substrate in an oven at 120 ℃ for baking for 30 min so as to remove the surface moisture again.
Then, step 2) is carried out, a layer of SiO with the thickness of 500 nm is prepared on the surface of the cleaned silicon wafer substrate by adopting a thermal oxidation process2A substrate.
Then, step 3) is carried out, using a direct current PVD process, on the SiO2And depositing a W metal layer with the thickness of 10 nm on the surface of the substrate, wherein the sputtering power is 150W, and the flow rate of the sputtering Ar gas is 80 sccm.
Then, step 4) is carried out, SiO with the thickness of 5 nm is deposited on the surface of the W metal layer after the step 3 is carried out by utilizing an alternating current PVD process2Insulating layer, RF sputtering power is 95W, sputtering Ar gas flow is 20 sccm, SiO deposition is finished2The rear cross-sectional view is schematically shown in fig. 1.
And 5) etching a groove with the width of 20 nm and the length of 1um on the W metal layer obtained in the step 4 by using an FIB focused ion beam etching process, wherein the depth of the groove is 15 nm (SiO)2The thickness of the insulating layer plus the thickness of the W metal layer), the cross-sectional view after etching the trench with the FIB ion beam is shown in fig. 2.
And 6) depositing Ge with the thickness of 15 nm on the groove after the step 5 by using a direct current PVD process2Sb2Te5The direct current sputtering power of the phase-change material is 20W, and the flow rate of the sputtering Ar gas is 110 sccm.
Then, step 7) is carried out, and SiO with the thickness of 20 nm is deposited on the material subjected to the step 6 by utilizing an alternating current PVD process2The radio frequency sputtering power of the protective layer is 95W, the flow rate of the sputtering Ar is 20 sccm, and SiO deposition is finished2The rear cross-sectional view is schematically shown in fig. 3.
And 8) extracting the section of the multilayer film material obtained in the step 7 in a sheet form by adopting a method for preparing a TEM sample by FIB, wherein the section is vertical to the direction of the long-strip-shaped groove to obtain the sheet with the dimension of 5 um in length, 1um in height and 100 nm in thickness.
Step 9) is then performed, and the Si substrate in the sheet obtained in step 8) is cut as shown in fig. 4.
And then, step 10) is performed, the sheet obtained in step 9) is transferred to a powered chip, the electrode pitch of the powered chip used in this embodiment is 3 um, a FIB deposition Pt method is used to connect a large metal electrode of the chip and a metal thin film on the sheet, and finally, a material testing unit with a small electrode pitch of 20 nm is manufactured, where a structural schematic diagram is shown in fig. 5.
In conclusion, the invention utilizes the nanometer processing characteristic of FIB to manufacture the material testing unit with controllable small electrode distance, solves the problem that the size of the testing unit formed by directly carrying the testing material is overlarge in the past, can well simulate the performance of the testing material in an actual device, provides great convenience for the research of the relation between the material structure and the performance, and has high industrial utilization value.
The above embodiments are merely illustrative and not restrictive of the technical solutions of the present invention. Variations and modifications to the disclosed examples may become apparent to those skilled in the art that alternate and equivalent elements of the disclosed examples may be made. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other substrates, materials, and components, without departing from the spirit or essential characteristics thereof. Any technical solutions that do not depart from the spirit and scope of the present invention should be construed as being included therein.
Claims (1)
1. A preparation method of a material testing unit with small electrodes at a nanometer-scale interval for a transmission electron microscope in-situ power-on chip is characterized by comprising the following specific steps:
1) selecting a silicon wafer as a substrate, and cleaning the Si substrate;
2) preparing 500-1000 nm SiO on the surface of the Si substrate by using a thermal oxidation process2A substrate;
3) preparing the SiO obtained in step 2) by utilizing magnetron sputtering, electron beam evaporation, chemical vapor deposition or atomic layer deposition film preparation equipment2Depositing a 1-500 nm metal film on a substrate, wherein the metal is Au, Pt, W, Al or Cu;
4) continuously depositing an insulating material film of 1-500 nm on the metal film obtained in the step 3) by utilizing magnetron sputtering, electron beam evaporation, chemical vapor deposition or atomic layer deposition film preparation equipment, wherein the insulating material is SiO2Or SiN;
5) etching a long-strip-shaped groove on the insulating material film obtained in the step 4) by using an FIB ion beam etching process, wherein the depth of the groove is the common thickness of the metal film and the insulating material film, the length of the groove is 100 nm-10 um, the width D of the groove is small electrode distance, and D =1-1000 nm;
6) depositing a test material on the strip-shaped groove obtained in the step 5) by utilizing magnetron sputtering, electron beam evaporation, chemical vapor deposition or atomic layer deposition film preparation equipment, wherein the deposition thickness of the test material is the common thickness of the metal film in the step 3) and the insulating material film in the step 4);
7) continuously depositing a protective layer material on the test material obtained in the step 6) by utilizing magnetron sputtering, electron beam evaporation, chemical vapor deposition or atomic layer deposition film preparation equipment; the protective layer is made of SiO2Or SiN with a thickness of at least 10 nm;
8) extracting the section of the multilayer film material obtained in the step 7) in a sheet form by using an FIB method, wherein the section is vertical to the direction of the long-strip-shaped groove, the length of the extracted sheet is 5-10 um, and the thickness of the extracted sheet is 10-100 nm;
9) cutting off the Si substrate in the slice obtained in the step 8);
10) transferring the thin sheet obtained in the step 9) onto a through cell, and connecting a metal electrode of the chip and a metal film on the thin sheet by using a method of FIB deposition of Pt to prepare the material testing unit with the nano-scale small-space electrode.
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| CN109946340B (en) * | 2019-04-15 | 2020-02-18 | 华东师范大学 | Preparation method of two-dimensional layered material sample electrical testing microelectrode |
| CN110797457B (en) * | 2019-10-22 | 2021-10-12 | 华东师范大学 | Preparation method of multilayer storage structure transmission electron microscope in-situ electrical test unit |
| CN113218977A (en) * | 2021-04-29 | 2021-08-06 | 苏州鲲腾智能科技有限公司 | In-situ observation integrated circuit structure and preparation method of transmission electron microscope sample evolved by same |
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