CN108459972A - A kind of efficient cache management design method of multichannel solid state disk - Google Patents

A kind of efficient cache management design method of multichannel solid state disk Download PDF

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Publication number
CN108459972A
CN108459972A CN201611140866.8A CN201611140866A CN108459972A CN 108459972 A CN108459972 A CN 108459972A CN 201611140866 A CN201611140866 A CN 201611140866A CN 108459972 A CN108459972 A CN 108459972A
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data
caching
cold
request
buffer storage
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CN108459972B (en
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杨明伟
李亚晖
谢建春
郭鹏
白林亭
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Xian Aeronautics Computing Technique Research Institute of AVIC
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Xian Aeronautics Computing Technique Research Institute of AVIC
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0877Cache access modes
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12Replacement control
    • G06F12/121Replacement control using replacement algorithms
    • G06F12/123Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1016Performance improvement
    • G06F2212/1021Hit rate improvement
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/20Employing a main memory using a specific memory technology
    • G06F2212/202Non-volatile memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/21Employing a record carrier using a specific recording technology
    • G06F2212/214Solid state disk

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

The invention belongs to airborne embedded computer fields, are related to a kind of efficient cache management design method of multichannel solid state disk.Including:Step 1, read request service procedure;The identification of the cold and hot attribute of step 2, write request, most recently requested mean size determine the badge of cold and hot request plus basic threshold value;The caching internal control of step 3, cold data caching and dsc data caching, adjusts according to demand to writing back threshold value into Mobile state, and in chip idle periods write back data;Step 4, cold data caching and dsc data caching carry out the dynamic adjustment of cache size according to the demand of performance and service life.The present invention updates different features using different data, in the chip idle periods of multichannel solid state disk, data in data buffer storage are write back in advance, and it is combined with the dynamic adjustment between cold data caching and dsc data caching, not only it ensure that the buffer service ability of multi-channel solid-state disc, but also do not caused too big life loss.

Description

A kind of efficient cache management design method of multichannel solid state disk
Technical field
The invention belongs to airborne embedded computer field, it is related to a kind of efficient cache management of multichannel solid state disk and sets Meter method.
Background technology
As Modern Avionics system high-speed develops, to Generation of Airborne storage device, more stringent requirements are proposed, passes Unite mechanical hard disk there are intrinsic limitations so that its be difficult apply in machine missile-borne, and the appearance of flash memory make it is airborne Storage system provides a new selection.Flash memory is widely noticed always as a kind of new storage medium, its unique low energy The advantages that consumption, small, light-weight and anti-vibration, it is made to be widely used in a variety of embedded devices.Based on NAND Flash Solid-state disk (solid-state drive, SSD) there is shorter startup time, faster speed of random access and by disappearing Except the more low energy consumption that the mechanical expense in disk obtains, these make its storage performance more superior than disk, become disk Strong substitute, be adaptive to airborne circumstance.NAND Flash itself some intrinsic faults of construction, can be turned by flash memory It changes layer (Flash Translation Layer, FTL) to be shielded so that it can be easy to use as traditional magnetic disk, herein On, the use of caching can further promote the performance and durability of solid state disk.
It is buffered in solid state disk and plays a crucial role, first, caching is generally used for two parts, mapped cache And data buffer storage, mapped cache preserve required map entry, data buffer storage preserves nearest write request data;Secondly, data The read or write speed of caching is far above the read or write speed of Flash, is written and read by caching, can significantly improve the property of solid state disk Energy;Finally, data buffer storage can absorb the data of writing of frequent updating, and reduction writes number to Flash, to extend the longevity of SSD Life.Presently, there are buffer scheduling, laid particular emphasis on mostly in the case where caching expire, how to select write back data, improved and cache Hit rate, but this passive mode that writes back is very unstable to the promotion effect of solid-state disk performance, when the hit of request When rate is relatively low, the promotion of performance will be especially small, it is difficult to play the due performance of caching.
Invention content
The purpose of the present invention:
The present invention is directed to requirement of the airborne embedded computer to readwrite performance, proposes one kind towards multichannel solid state disk Cache management design method, not using the chip idle periods of multi-channel solid-state disc and different size of data cached renewal frequency Same feature, significant performance boost is obtained by cost of a small amount of service life.
Technical scheme of the present invention:
A kind of efficient cache management design method of multichannel solid state disk, including:
Step 1, when read request to up to multi-channel solid-state disc when, first determine whether it has hit data buffer storage, if life Middle data buffer storage, then directly serviced by data buffer storage.If without hiting data cache, next if need to judge the number According to corresponding map entry whether in mapped cache, if corresponding map entry is not in mapped cache, it is necessary to first read The corresponding map entry of the data is taken, is then finally to read target data;If corresponding map entry in mapped cache, Data directly are read from the corresponding positions Flash, complete read operation.
Step 2 adds the mode of threshold value to determine a threshold asked greatly using the average value of most recently requested size, ensures Big request not only exceeds a basic value, but also can exceed most recently requested mean size.It is judged as cold number beyond this threshold According to otherwise it is assumed that being dsc data.
Data buffer storage is divided into cold data caching and dsc data caching by step 3, is respectively intended to the cold data that storage obtains And dsc data still needs to judge whether that hiting data caches first, if life when write request reaches multi-channel solid-state disc In, then buffer service is carried out by the data buffer storage hit, the cold and hot attribute that miss is then obtained according to judgement adds it to phase It is serviced in the data buffer storage answered.After service finishes, if there is chip is in idle condition, then basis writes back the big of threshold value It is small, a certain number of data in end node in cold data caching and dsc data caching LRU chained lists are write back in advance In Flash.
Step 4, when data are written in data buffer storage, should if the free space of current data caching is insufficient Data buffer storage captures free space from another data buffer storage so that current data can be buffered and be serviced.
The present invention has the advantage that effect:
The present invention updates different features using different data, in the chip idle periods of multichannel solid state disk, by data Data in caching are write back in advance, and are combined with the dynamic adjustment between cold data caching and dsc data caching, are both protected The buffer service ability of multi-channel solid-state disc has been demonstrate,proved, and has not caused too big life loss.
Description of the drawings
Fig. 1 cache management flow diagrams.
The cold and hot data buffer storage internal services flow charts of Fig. 2.
Cold and hot data buffer storage dynamic adjustment schematic diagram in Fig. 3 embodiments 1.
Specific implementation mode
The present invention is described in further details.
A kind of cache design method of multichannel solid state disk, as shown in Figure 1, including:
Step 1, when read request to up to multi-channel solid-state disc when, first determine whether it has hit data buffer storage, if life Middle data buffer storage, then directly serviced by data buffer storage.If without hiting data cache, next if need to judge the number According to corresponding map entry whether in mapped cache, if corresponding map entry is not in mapped cache, it is necessary to first read The corresponding map entry of the data is taken, is then finally to read target data;If corresponding map entry in mapped cache, Data directly are read from the corresponding positions Flash, complete read operation.
Step 2 finds when the load collected in general-purpose computing system is observed, the locality that write request accesses with The size of write request is closely related, and after write request is more than certain value, such as 32KB, renewal frequency can significantly reduce.One As say, for big request, the renewal frequency higher of small request, however the differentiation of size request be not it is fixed, Both related to most recently requested size, it is also related to the size of request itself.It is fixed using the average value of most recently requested size The mode of threshold value determines a threshold value asked greatly, both can guarantee that big request not only exceeded basic value, but also can guarantee big The size of request obviously exceeds most recently requested mean size.
When determining the size for the write request come, threshold value s and the most recently requested relationship of judgement are:
Wherein, N is the number for including the request including current request, takes 64, n in embodiment 1iIndicate i-th of request Size, Base then indicates a basic threshold value, the determination of the threshold value can by the historical data to institute's application system into Row statistics obtains, and takes 32 in embodiment 1.After bringing most recently requested size into formula, obtain threshold value S, then with work as Preceding request size is compared, more than being then considered to ask greatly, as cold data, conversely, being then small request, dsc data.
Data buffer storage is divided into cold data caching and dsc data caching by step 3, is respectively intended to the cold data that storage obtains And dsc data still needs to judge whether that hiting data caches first, if life when write request reaches multi-channel solid-state disc In, then buffer service is carried out by the data buffer storage hit, the cold and hot attribute that miss is then obtained according to judgement adds it to phase It is serviced in the data buffer storage answered.
The strategy taken when cold data caches and dsc data caching services data is identical, and includes two kinds The back end of type, clean node show that the data of the intra-node have write back in Flash, and dirty node shows the node Internal data have not been written back in Flash.Next by taking dsc data caches as an example, illustrate cold data caching and dsc data caching Service strategy.If write request hits dsc data caching, the attribute of the back end hit to it is needed further to judge.Life Interior joint shows the overabundance of data write back if it is clean node, then will write back threshold value and subtract analog value, and by the back end The state for being seated in the head end of LRU chained lists, and changing the back end is dirty node;If hit is dirty node, directly Connect the head end that the back end is placed in LRU chained lists.If miss dsc data caches, and write request needs are written to Dsc data caches, then needs to check in dsc data caching with the presence or absence of free space, free space includes that data are not written Node and clean node then directly write data into if there is free space, and node is promoted to LRU heads of the queue, if not In the presence of, then need from another data buffer storage i.e. cold data caching in capture free space, as shown in figure 3, and threshold value will be write back Accordingly increased.After the completion of dsc data buffer service, when there is the chip being in idle condition in multichannel solid state disk, root According to the size for writing back threshold value, in advance by the fixed number in end node in cold data caching and dsc data caching LRU chained lists The data of amount write back in Flash.
The size of step 4, cold and hot data buffer storage in write buffer is not fixed, but can be slow with cold and hot data The demand to memory is deposited and dynamic change, to reach the balance between speed and service life.On the one hand, dsc data caching represents In the service life of Flash, dsc data caching is bigger, then the update operation that can be absorbed is more, and the Flash service life is longer;Another party Face, cold data caching is bigger, and the big request of arrival, which then may be more buffered, to be serviced, thus speed is also faster.
In dsc data caching, when dsc data and miss dsc data caching, and without idle empty in dsc data caching Between when, H-DAT will from cold data caching in capture free space.As shown in Fig. 3 (a), data 15 will be added in embodiment 1 Entering to dsc data and cache, but in dsc data caching and idle node is not present, cold data caching deletes the idle node of oneself, And obtained free space is added in dsc data caching.
It is identical as dsc data caching in cold data caching, when cold data inadequate buffer space, can be cached from dsc data Middle acquisition space.But, there are two kinds of situations:
(1) there are free spaces in dsc data caching, then the space in dsc data caching can be added directly into cold data In caching, for the data service of arrival, just as shown in Fig. 3 (a);
(2) free space is not present in heat caching, and the threshold value WB that writes back in cold data caching has been over cold caching Size, then in order to enable following big request can be buffered and be serviced, so delete dirty node in being cached from dsc data, The data preserved in the node are write back in Flash.It is new data clothes that obtained space, which is added in cold data caching, Business, as shown in Fig. 3 (b).

Claims (2)

1. a kind of efficient cache management design method of multichannel solid state disk, characterized in that including:
Step 1, when read request to up to multi-channel solid-state disc when, first determine whether it has hit data buffer storage, if hits According to caching, then directly serviced by data buffer storage;If without hiting data cache, next if need to judge the data pair Whether the map entry answered is in mapped cache, if corresponding map entry is not in mapped cache, it is necessary to which first reading should The corresponding map entry of data is then finally to read target data;If corresponding map entry is in mapped cache, directly Data are read from the corresponding positions Flash, complete read operation;
Step 2 adds the mode of threshold value to determine that a threshold asked greatly, guarantee are asked greatly using the average value of most recently requested size It asks and not only exceeds a basic value, but also most recently requested mean size can be exceeded;It is judged as cold data beyond this threshold, it is no Then it is considered dsc data;
Data buffer storage is divided into cold data caching and dsc data caching by step 3, is respectively intended to cold data and heat that storage obtains Data still need to judge whether that hiting data caches first when write request reaches multi-channel solid-state disc, if hit, Buffer service is carried out by the data buffer storage hit, the cold and hot attribute that miss is then obtained according to judgement adds it to corresponding It is serviced in data buffer storage;After service finishes, if there is chip is in idle condition, then basis writes back the size of threshold value, A certain number of data in end node in cold data caching and dsc data caching LRU chained lists are write back in advance In Flash;
Step 4, when data are written in data buffer storage, if the free space of current data caching is insufficient, the data Caching captures free space from another data buffer storage so that current data can be buffered and be serviced.
2. a kind of efficient cache management design method of multichannel solid state disk as described in claim 1, characterized in that sentencing When the size of the disconnected write request to arrive, threshold value s and the most recently requested relationship of judgement are:
N is the number for including the request including current request, and ni indicates that the size of i-th of request, Base then indicate one substantially Threshold value, the determination of the threshold value can be counted to obtain by the historical data to institute's application system.
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CN112527194A (en) * 2020-12-04 2021-03-19 北京浪潮数据技术有限公司 Solid state hard disk write amplification setting method, system, device and readable storage medium
CN113342265A (en) * 2021-05-11 2021-09-03 中天恒星(上海)科技有限公司 Cache management method and device, processor and computer device
WO2021189203A1 (en) * 2020-03-23 2021-09-30 华为技术有限公司 Bandwidth equalization method and apparatus

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109324761A (en) * 2018-10-09 2019-02-12 郑州云海信息技术有限公司 A kind of data cache method, device, equipment and storage medium
WO2021189203A1 (en) * 2020-03-23 2021-09-30 华为技术有限公司 Bandwidth equalization method and apparatus
CN112527194A (en) * 2020-12-04 2021-03-19 北京浪潮数据技术有限公司 Solid state hard disk write amplification setting method, system, device and readable storage medium
CN112527194B (en) * 2020-12-04 2024-02-13 北京浪潮数据技术有限公司 Method, system and device for setting write amplification of solid state disk and readable storage medium
CN113342265A (en) * 2021-05-11 2021-09-03 中天恒星(上海)科技有限公司 Cache management method and device, processor and computer device
CN113342265B (en) * 2021-05-11 2023-11-24 中天恒星(上海)科技有限公司 Cache management method and device, processor and computer device

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