CN108441946B - Method for reducing resistance deviation of whole ingot head and tail of polycrystalline silicon target - Google Patents

Method for reducing resistance deviation of whole ingot head and tail of polycrystalline silicon target Download PDF

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Publication number
CN108441946B
CN108441946B CN201810090867.9A CN201810090867A CN108441946B CN 108441946 B CN108441946 B CN 108441946B CN 201810090867 A CN201810090867 A CN 201810090867A CN 108441946 B CN108441946 B CN 108441946B
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purity
polycrystalline silicon
silicon
boron
silicon material
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CN108441946A (en
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王峰
张磊
姚玉杰
谭毅
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Qingdao Languang Jingke New Material Co ltd
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Qingdao Languang Jingke New Material Co ltd
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    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B28/00—Production of homogeneous polycrystalline material with defined structure
    • C30B28/04—Production of homogeneous polycrystalline material with defined structure from liquids
    • C30B28/06—Production of homogeneous polycrystalline material with defined structure from liquids by normal freezing or freezing under temperature gradient
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
    • C23C14/3414—Metallurgical or chemical aspects of target preparation, e.g. casting, powder metallurgy
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/02—Heat treatment

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Thermal Sciences (AREA)
  • Silicon Compounds (AREA)

Abstract

The invention relates to the technical field of polycrystalline silicon target casting, in particular to a method for reducing resistance deviation of the tail part of the head of a whole ingot of a polycrystalline silicon target. The invention realizes the purpose of smaller range of the whole ingot resistance interval by using the boron-phosphorus double compensation method and utilizing the different segregation coefficients of boron and phosphorus in the silicon liquid and the controllable change of resistivity.

Description

Method for reducing resistance deviation of whole ingot head and tail of polycrystalline silicon target
Technical Field
The invention relates to the technical field of polycrystalline silicon target casting, in particular to a method for reducing resistance deviation of the tail part of the head of a whole ingot of a polycrystalline silicon target.
Background
At present, in the casting process of the polycrystalline silicon target, a boron compensation mode is mainly used for controlling the resistivity range, under the normal segregation condition, when the resistivity is required to be 1-2, the deviation of the head and tail resistivity is 0.5-0.8, and for the polycrystalline silicon target product, the optimal state is that the head and tail resistivity is basically consistent. The segregation coefficient of boron is 0.8, and segregation phenomenon still exists in a silicon ingot, so that the head and tail resistivity difference is large, the requirement of an optimal state cannot be met, and the resistivity of a part of regions is unqualified.
Disclosure of Invention
In order to overcome the problems in the prior art, the invention aims to provide a method for reducing the resistance deviation of the head and the tail of the whole ingot of a polycrystalline silicon target.
The technical scheme adopted by the invention for realizing the purpose is as follows: a method for reducing the resistance deviation of the head and the tail of the whole ingot of a polycrystalline silicon target material is characterized by comprising the following steps: the boron-phosphorus double compensation method comprises the following steps:
(1) adding 0.1-0.8g of high-purity boron powder and 0.05-0.4g of high-purity phosphorus powder into 800-900kg of silicon material, loading the raw materials into a crucible, and loading the boron powder, the silicon material and the phosphorus powder into the crucible from bottom to top;
(2) placing the loaded raw materials in a polycrystalline silicon ingot furnace, vacuumizing to below 10Pa, and heating to 1500-1550 ℃ until the silicon materials are completely melted;
(3) after the silicon material is completely melted, gradually cooling to 1410 and 1420 ℃ within 0.5-1h, gradually opening the heat insulation cage for 0.3-0.5cm/h to realize directional solidification of the silicon material;
(4) and (4) annealing after crystal growth is finished, cooling and discharging.
The purities of the high-purity boron powder and the high-purity phosphorus powder in the step (1) are both 5N.
When the silicon material achieves a resistivity P-type of 0.9-1, the compensatable P element in the raw material is 0.14-0.17ppmw according to the method.
When the silicon material achieves the resistivity P type of 1.9-2, the compensatable P element in the raw material is 0.08-0.1ppmw according to the method.
The invention realizes the purpose of smaller range of the whole ingot resistance interval by using the boron-phosphorus double compensation method and utilizing the different segregation coefficients of boron and phosphorus in the silicon liquid and the controllable change of resistivity.
Detailed Description
In order to better understand the present invention, the following examples are further provided to illustrate the present invention, but the present invention is not limited to the following examples.
Example 1
A method for reducing the resistance deviation of the head and the tail of a whole polycrystalline silicon target ingot adopts a boron-phosphorus double compensation method, and specifically comprises the following steps:
(1) adding 0.1g of high-purity boron powder with the purity of 5N into 800kg of silicon material, simultaneously adding 0.05g of high-purity phosphorus powder with the purity of 5N, putting the raw materials into a crucible, and putting the boron powder, the silicon material and the phosphorus powder into the crucible from bottom to top;
(2) placing the loaded raw materials in a polycrystalline silicon ingot furnace, vacuumizing to below 10Pa, heating to 1500 ℃ until the silicon materials are completely melted;
(3) after the silicon material is completely melted, gradually cooling to 1410 ℃ within 0.5h, and gradually opening the heat insulation cage for 0.3cm/h to realize directional solidification of the silicon material;
(5) and (4) annealing after crystal growth is finished, cooling and discharging.
In the embodiment, the resistivity P type of the silicon material is 0.9-1, and according to the method, the amount of the P element which can be compensated in the raw material is 0.14-0.17 ppmw; when the silicon material achieves the resistivity P type of 1.9-2, the compensatable P element in the raw material is 0.08-0.1ppmw according to the method.
Example 2
The steps of the method for reducing the resistance deviation of the head and the tail of the whole ingot of the polycrystalline silicon target material in the embodiment are the same as those in the embodiment 1, and different technical parameters are as follows:
1. in the step (1), 850kg of silicon material is added with 0.45g of high-purity boron powder with the purity of 5N, and simultaneously 0.25g of high-purity phosphorus powder with the purity of 5N is added;
2. heating to 1525 ℃ in the step (2);
3. and (4) gradually cooling to 1415 ℃ within 0.75h in the step (3), and gradually opening the heat insulation cage for 0.4 cm/h.
Example 3
The steps of the method for reducing the resistance deviation of the head and the tail of the whole ingot of the polycrystalline silicon target material in the embodiment are the same as those in the embodiment 1, and different technical parameters are as follows:
1. adding 0.8g of high-purity boron powder with the purity of 5N into 900kg of silicon material in the step (1), and simultaneously adding 0.4g of high-purity phosphorus powder with the purity of 5N;
2. heating to 1550 ℃ in the step (2);
3. and (4) after the temperature is gradually reduced to 1420 ℃ within 1h in the step (3), gradually opening the heat insulation cage for 0.5 cm/h.
While the foregoing embodiments illustrate the principles and advantages of the invention, it will be appreciated by those skilled in the art that the invention is not limited to the embodiments described above, but is capable of numerous variations and modifications without departing from the spirit and scope of the invention as set forth in the appended claims.

Claims (1)

1. A method for reducing the resistance deviation of the head and the tail of the whole ingot of a polycrystalline silicon target material is characterized by comprising the following steps: the boron-phosphorus double compensation method comprises the following steps:
(1) adding 0.1-0.8g of high-purity boron powder and 0.05-0.4g of high-purity phosphorus powder into 800-900kg of silicon material, loading the raw materials into a crucible, and loading the boron powder, the silicon material and the phosphorus powder into the crucible from bottom to top; the purity of the high-purity boron powder and the purity of the high-purity phosphorus powder are both 5N;
(2) placing the loaded raw materials in a polycrystalline silicon ingot furnace, vacuumizing to below 10Pa, and heating to 1500-1550 ℃ until the silicon materials are completely melted;
(3) after the silicon material is completely melted, gradually cooling to 1410 and 1420 ℃ within 0.5-1h, gradually opening the heat insulation cage for 0.3-0.5cm/h to realize directional solidification of the silicon material;
(4) annealing and cooling the crystal after crystal growth is finished, and discharging the crystal out of the furnace;
when the silicon material realizes the resistivity P type of 0.9-1, according to the method, the compensatable P element in the raw material is 0.14-0.17 ppmw;
when the silicon material achieves the resistivity P type of 1.9-2, the compensatable P element in the raw material is 0.08-0.1ppmw according to the method.
CN201810090867.9A 2018-01-30 2018-01-30 Method for reducing resistance deviation of whole ingot head and tail of polycrystalline silicon target Active CN108441946B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103422165A (en) * 2013-07-22 2013-12-04 湖南红太阳光电科技有限公司 Polycrystalline silicon and preparation method thereof
CN107419328A (en) * 2017-08-18 2017-12-01 晶科能源有限公司 A kind of preparation method of P-type silicon foundry alloy

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101560693A (en) * 2009-04-22 2009-10-21 浙江碧晶科技有限公司 Method for preparing solar energy level silicon crystals containing doped element
US8072049B2 (en) * 2009-04-24 2011-12-06 Fairchild Semiconductor Corporation Polysilicon drift fuse
CN102560646B (en) * 2012-03-20 2015-05-20 浙江大学 N-type casting monocrystalline silicon with uniform doping resistivity and preparation method thereof
CN106222743A (en) * 2016-09-19 2016-12-14 江西赛维Ldk太阳能高科技有限公司 A kind of polycrystal silicon ingot and preparation method thereof and for preparing the ingot furnace of polycrystal silicon ingot

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103422165A (en) * 2013-07-22 2013-12-04 湖南红太阳光电科技有限公司 Polycrystalline silicon and preparation method thereof
CN107419328A (en) * 2017-08-18 2017-12-01 晶科能源有限公司 A kind of preparation method of P-type silicon foundry alloy

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